import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / dispsys / mt8127 / ddp_hal.h
1 #ifndef __DDP_HAL_H__
2 #define __DDP_HAL_H__
3
4 #include "DpDataType.h"
5
6 struct DISP_REGION
7 {
8 unsigned int x;
9 unsigned int y;
10 unsigned int width;
11 unsigned int height;
12 };
13
14 enum OVL_LAYER_SOURCE {
15 OVL_LAYER_SOURCE_MEM = 0,
16 OVL_LAYER_SOURCE_RESERVED = 1,
17 OVL_LAYER_SOURCE_SCL = 2,
18 OVL_LAYER_SOURCE_PQ = 3,
19 };
20
21 enum OVL_LAYER_SECURE_MODE {
22 OVL_LAYER_NORMAL_BUFFER = 0,
23 OVL_LAYER_SECURE_BUFFER = 1,
24 OVL_LAYER_PROTECTED_BUFFER = 2
25 };
26
27 typedef struct _OVL_CONFIG_STRUCT
28 {
29 unsigned int layer;
30 unsigned int layer_en;
31 enum OVL_LAYER_SOURCE source;
32 unsigned int fmt;
33 unsigned int addr;
34 unsigned int vaddr;
35 unsigned int src_x;
36 unsigned int src_y;
37 unsigned int src_w;
38 unsigned int src_h;
39 unsigned int src_pitch;
40 unsigned int dst_x;
41 unsigned int dst_y;
42 unsigned int dst_w;
43 unsigned int dst_h; // clip region
44 unsigned int keyEn;
45 unsigned int key;
46 unsigned int aen;
47 unsigned char alpha;
48
49 unsigned int isTdshp;
50 unsigned int isDirty;
51
52 int buff_idx;
53 int identity;
54 int connected_type;
55 unsigned int security;
56 int fence_fd;
57 struct ion_handle *ion_handles;
58 bool fgIonHandleImport;
59 }OVL_CONFIG_STRUCT;
60
61 struct disp_path_config_struct
62 {
63 unsigned int srcModule; // DISP_MODULE_ENUM
64
65 // if srcModule=RDMA0, set following value, else do not have to set following value
66 unsigned int addr;
67 unsigned int inFormat;
68 unsigned int pitch;
69 struct DISP_REGION srcROI; // ROI
70
71 OVL_CONFIG_STRUCT ovl_config;
72
73 struct DISP_REGION bgROI; // background ROI
74 unsigned int bgColor; // background color
75
76 unsigned int dstModule; // DISP_MODULE_ENUM
77 unsigned int outFormat;
78 unsigned int dstAddr; // only take effect when dstModule=DISP_MODULE_WDMA or DISP_MODULE_WDMA1
79 unsigned int enableUFOE;
80 int srcWidth, srcHeight;
81 int dstWidth, dstHeight;
82 int dstPitch;
83 #ifdef CONFIG_MTK_SEC_VIDEO_PATH_SUPPORT
84 unsigned int RDMA0Security;
85 unsigned int WDMA1Security;
86 #endif
87 };
88
89 struct disp_path_config_mem_out_struct
90 {
91 unsigned int enable;
92 unsigned int dirty;
93 unsigned int outFormat;
94 unsigned int dstAddr;
95 unsigned int dstPitch;
96 struct DISP_REGION srcROI; // ROI
97 unsigned int security;
98 int ion_fd;
99 };
100
101 struct disp_path_config_ovl_mode_t
102 {
103 unsigned int mode;
104 unsigned int pitch;
105 unsigned int format;
106 unsigned int address;
107 struct DISP_REGION roi;
108 };
109
110 enum RDMA_OUTPUT_FORMAT {
111 RDMA_OUTPUT_FORMAT_ARGB = 0,
112 RDMA_OUTPUT_FORMAT_YUV444 = 1,
113 };
114
115 enum RDMA_MODE {
116 RDMA_MODE_DIRECT_LINK = 0,
117 RDMA_MODE_MEMORY = 1,
118 };
119 typedef struct _RDMA_CONFIG_STRUCT
120 {
121 unsigned idx; // instance index
122 enum RDMA_MODE mode; // data mode
123 DpColorFormat inputFormat;
124 unsigned address;
125 unsigned pitch;
126 bool isByteSwap;
127 enum RDMA_OUTPUT_FORMAT outputFormat;
128 unsigned width;
129 unsigned height;
130 bool isRGBSwap;
131 }RDMA_CONFIG_STRUCT;
132
133 int disp_wait_timeout(bool flag, unsigned int timeout);
134 int disp_path_config(struct disp_path_config_struct* pConfig);
135 int disp_path_config_layer(OVL_CONFIG_STRUCT* pOvlConfig);
136 int disp_path_config_layer_addr(unsigned int layer, unsigned int addr);
137 int disp_path_get_mutex(void);
138 int disp_path_release_mutex(void);
139 int disp_path_wait_reg_update(unsigned int mutexID);
140 int disp_path_get_mutex_(int mutexId);
141 int disp_path_release_mutex_(int mutexId);
142 int disp_path_config_(struct disp_path_config_struct* pConfig, int mutexId);
143
144 int disp_path_config_mem_out(struct disp_path_config_mem_out_struct* pConfig);
145
146 #ifdef CONFIG_MTK_SEC_VIDEO_PATH_SUPPORT
147 int disp_path_config_mem_out_(struct disp_path_config_mem_out_struct* pConfig, int OvlSecure);
148 #endif
149
150 int disp_path_config_mem_out_without_lcd(struct disp_path_config_mem_out_struct* pConfig);
151 void disp_path_wait_mem_out_done(void);
152 int disp_path_clock_on(char* name);
153 int disp_path_clock_off(char* name);
154 int disp_path_change_tdshp_status(unsigned int layer, unsigned int enable);
155
156 int disp_hdmi_path_clock_on(char* name);
157 int disp_hdmi_path_clock_off(char* name);
158
159 void disp_path_clear_mem_out_done_flag(void);
160 int disp_path_query(void); // return different functions according to chip type
161 int disp_bls_set_max_backlight(unsigned int level);
162
163 int disp_path_config_rdma (RDMA_CONFIG_STRUCT* pRdmaConfig);
164 int disp_path_config_wdma (struct disp_path_config_mem_out_struct* pConfig);
165 int disp_path_switch_ovl_mode (struct disp_path_config_ovl_mode_t *pConfig);
166 int disp_path_get_mem_read_mutex (void);
167 int disp_path_release_mem_read_mutex (void);
168 int disp_path_get_mem_write_mutex (void);
169 int disp_path_release_mem_write_mutex (void);
170 int disp_path_wait_frame_done(void);
171 #if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) && defined(CONFIG_MTK_SEC_VIDEO_PATH_SUPPORT)
172 int disp_path_update_secure_port(void);
173 #endif
174
175 #ifdef MTK_OVERLAY_ENGINE_SUPPORT
176 int disp_path_config_layer_ovl_engine_control(int enable);
177 int disp_path_config_layer_ovl_engine(OVL_CONFIG_STRUCT* pOvlConfig,int OvlSecure);
178 void disp_path_register_ovl_wdma_callback(void (*callback)(unsigned int param),unsigned int param);
179 void disp_path_register_ovl_rdma_callback(void (*callback)(unsigned int param),unsigned int param);
180 void disp_path_unregister_ovl_wdma_callback(void (*callback)(unsigned int param),unsigned int param);
181 void disp_path_unregister_ovl_rdma_callback(void (*callback)(unsigned int param),unsigned int param);
182 int disp_path_config_OVL_WDMA_path(int mutex_id);
183 int disp_path_config_OVL_WDMA(struct disp_path_config_mem_out_struct* pConfig, int OvlSecure);
184 void disp_path_wait_ovl_wdma_done(void);
185 #endif
186
187 #endif