import PULS_20180308
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / dispsys / mt8127 / ddp_bls.c
1 #include <linux/kernel.h>
2 #include <linux/delay.h>
3 #include <linux/types.h>
4 #include <linux/xlog.h>
5 #include <linux/mutex.h>
6 #include <mach/mt_clkmgr.h>
7
8 #include "ddp_drv.h"
9 #include "ddp_reg.h"
10 #include "ddp_debug.h"
11 #include "ddp_bls.h"
12 #include "disp_drv.h"
13 #include "ddp_hal.h"
14
15 #include <cust_leds.h>
16 #include <cust_leds_def.h>
17
18 #define DDP_GAMMA_SUPPORT
19
20 #define POLLING_TIME_OUT 1000
21
22 #define PWM_DEFAULT_DIV_VALUE 0x0
23
24 unsigned int bls_dbg_log = 0;
25 #define BLS_DBG(string, args...) if(bls_dbg_log) printk("[BLS]"string,##args) // default off, use "adb shell "echo dbg_log:1 > sys/kernel/debug/dispsys" to enable
26 #define BLS_MSG(string, args...) printk("[BLS]"string,##args) // default on, important msg, not err
27 #define BLS_ERR(string, args...) printk("[BLS]error:"string,##args) //default on, err msg
28
29 #if !defined(CONFIG_MTK_AAL_SUPPORT)
30 #ifdef USE_DISP_BLS_MUTEX
31 static int gBLSMutexID = 3;
32 #endif
33 static int gBLSPowerOn = 0;
34 #endif
35 static int gMaxLevel = 1023;
36 static int gPWMDiv = PWM_DEFAULT_DIV_VALUE;
37
38 static DEFINE_MUTEX(backlight_mutex);
39
40 static DISPLAY_PWM_T g_pwm_lut;
41 static DISPLAY_GAMMA_T g_gamma_lut;
42 static DISPLAY_GAMMA_T g_gamma_index =
43 {
44 entry:
45 {
46 {
47 0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 96,
48 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 148, 152, 156, 160, 164, 168, 172, 176, 180, 184, 188, 192, 196,
49 200, 204, 208, 212, 216, 220, 224, 228, 232, 236, 240, 244, 248, 252, 256, 260, 264, 268, 272, 276, 280, 284, 288, 292, 296,
50 300, 304, 308, 312, 316, 320, 324, 328, 332, 336, 340, 344, 348, 352, 356, 360, 364, 368, 372, 376, 380, 384, 388, 392, 396,
51 400, 404, 408, 412, 416, 420, 424, 428, 432, 436, 440, 444, 448, 452, 456, 460, 464, 468, 472, 476, 480, 484, 488, 492, 496,
52 500, 504, 508, 512, 516, 520, 524, 528, 532, 536, 540, 544, 548, 552, 556, 560, 564, 568, 572, 576, 580, 584, 588, 592, 596,
53 600, 604, 608, 612, 616, 620, 624, 628, 632, 636, 640, 644, 648, 652, 656, 660, 664, 668, 672, 676, 680, 684, 688, 692, 696,
54 700, 704, 708, 712, 716, 720, 724, 728, 732, 736, 740, 744, 748, 752, 756, 760, 764, 768, 772, 776, 780, 784, 788, 792, 796,
55 800, 804, 808, 812, 816, 820, 824, 828, 832, 836, 840, 844, 848, 852, 856, 860, 864, 868, 872, 876, 880, 884, 888, 892, 896,
56 900, 904, 908, 912, 916, 920, 924, 928, 932, 936, 940, 944, 948, 952, 956, 960, 964, 968, 972, 976, 980, 984, 988, 992, 996,
57 1000, 1004, 1008, 1012, 1016, 1020, 1023
58 },
59 {
60 0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 96,
61 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 148, 152, 156, 160, 164, 168, 172, 176, 180, 184, 188, 192, 196,
62 200, 204, 208, 212, 216, 220, 224, 228, 232, 236, 240, 244, 248, 252, 256, 260, 264, 268, 272, 276, 280, 284, 288, 292, 296,
63 300, 304, 308, 312, 316, 320, 324, 328, 332, 336, 340, 344, 348, 352, 356, 360, 364, 368, 372, 376, 380, 384, 388, 392, 396,
64 400, 404, 408, 412, 416, 420, 424, 428, 432, 436, 440, 444, 448, 452, 456, 460, 464, 468, 472, 476, 480, 484, 488, 492, 496,
65 500, 504, 508, 512, 516, 520, 524, 528, 532, 536, 540, 544, 548, 552, 556, 560, 564, 568, 572, 576, 580, 584, 588, 592, 596,
66 600, 604, 608, 612, 616, 620, 624, 628, 632, 636, 640, 644, 648, 652, 656, 660, 664, 668, 672, 676, 680, 684, 688, 692, 696,
67 700, 704, 708, 712, 716, 720, 724, 728, 732, 736, 740, 744, 748, 752, 756, 760, 764, 768, 772, 776, 780, 784, 788, 792, 796,
68 800, 804, 808, 812, 816, 820, 824, 828, 832, 836, 840, 844, 848, 852, 856, 860, 864, 868, 872, 876, 880, 884, 888, 892, 896,
69 900, 904, 908, 912, 916, 920, 924, 928, 932, 936, 940, 944, 948, 952, 956, 960, 964, 968, 972, 976, 980, 984, 988, 992, 996,
70 1000, 1004, 1008, 1012, 1016, 1020, 1023
71 },
72 {
73 0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92, 96,
74 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 148, 152, 156, 160, 164, 168, 172, 176, 180, 184, 188, 192, 196,
75 200, 204, 208, 212, 216, 220, 224, 228, 232, 236, 240, 244, 248, 252, 256, 260, 264, 268, 272, 276, 280, 284, 288, 292, 296,
76 300, 304, 308, 312, 316, 320, 324, 328, 332, 336, 340, 344, 348, 352, 356, 360, 364, 368, 372, 376, 380, 384, 388, 392, 396,
77 400, 404, 408, 412, 416, 420, 424, 428, 432, 436, 440, 444, 448, 452, 456, 460, 464, 468, 472, 476, 480, 484, 488, 492, 496,
78 500, 504, 508, 512, 516, 520, 524, 528, 532, 536, 540, 544, 548, 552, 556, 560, 564, 568, 572, 576, 580, 584, 588, 592, 596,
79 600, 604, 608, 612, 616, 620, 624, 628, 632, 636, 640, 644, 648, 652, 656, 660, 664, 668, 672, 676, 680, 684, 688, 692, 696,
80 700, 704, 708, 712, 716, 720, 724, 728, 732, 736, 740, 744, 748, 752, 756, 760, 764, 768, 772, 776, 780, 784, 788, 792, 796,
81 800, 804, 808, 812, 816, 820, 824, 828, 832, 836, 840, 844, 848, 852, 856, 860, 864, 868, 872, 876, 880, 884, 888, 892, 896,
82 900, 904, 908, 912, 916, 920, 924, 928, 932, 936, 940, 944, 948, 952, 956, 960, 964, 968, 972, 976, 980, 984, 988, 992, 996,
83 1000, 1004, 1008, 1012, 1016, 1020, 1023
84 }
85 }
86 };
87
88 DISPLAY_GAMMA_T * get_gamma_index(void)
89 {
90 BLS_DBG("get_gamma_index!\n");
91 return &g_gamma_index;
92 }
93
94 DISPLAY_PWM_T * get_pwm_lut(void)
95 {
96 BLS_DBG("get_pwm_lut!\n");
97 return &g_pwm_lut;
98 }
99
100 /* [FEATURE]-Mod-BEGIN by TCTSZ.yaohui.zeng, 2015/04/20,use customized brightness_mapping()*/
101 //static unsigned int brightness_mapping(unsigned int level);
102 extern unsigned int brightness_mapping(unsigned int level);
103 /* [FEATURE]-Mod-END by TCTSZ.yaohui.zeng, 2015/04/20*/
104
105 void disp_onConfig_bls(DISP_AAL_PARAM *param)
106 {
107 unsigned long prevSetting = DISP_REG_GET(DISP_REG_BLS_BLS_SETTING);
108 unsigned int regVal;
109 unsigned int level = brightness_mapping(param->pwmDuty);
110
111 BLS_DBG("disp_onConfig_bls!\n");
112
113 BLS_DBG("pwm duty = %lu => %u \n", param->pwmDuty, level);
114 regVal = DISP_REG_GET(DISP_REG_BLS_EN);
115 if (level == 0)
116 {
117 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);
118 if (regVal & 0x10000)
119 DISP_REG_SET(DISP_REG_BLS_EN, regVal & 0xFFFEFFFF);
120 }
121 else
122 {
123 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, level);
124 if (!(regVal & 0x10000))
125 DISP_REG_SET(DISP_REG_BLS_EN, regVal | 0x10000);
126 }
127
128
129 BLS_DBG("bls setting = %lu\n", param->setting);
130
131 if (param->setting & ENUM_FUNC_BLS)
132 {
133 BLS_DBG("distion threshold = %lu\n", param->maxClrDistThd);
134 BLS_DBG("predistion threshold = %lu\n", param->preDistThd);
135 // TODO: BLS porting
136 }
137
138 if (prevSetting & 0x10100)
139 {
140 // TODO: BLS porting
141 }
142 else if (param->setting & ENUM_FUNC_BLS)
143 {
144 disp_set_aal_alarm(1);
145 }
146
147 }
148
149 /* [FEATURE]-Mod-BEGIN by TCTSZ.yaohui.zeng, 2015/04/20,use customized brightness_mapping()*/
150 /*
151 static unsigned int brightness_mapping(unsigned int level)
152 {
153 unsigned int mapped_level;
154
155 mapped_level = level;
156
157 if (mapped_level > gMaxLevel)
158 mapped_level = gMaxLevel;
159
160 return mapped_level;
161 }
162 */
163 /* [FEATURE]-Mod-END by TCTSZ.yaohui.zeng, 2015/04/20*/
164
165 #if !defined(CONFIG_MTK_AAL_SUPPORT)
166 #ifdef USE_DISP_BLS_MUTEX
167 static int disp_poll_for_reg(unsigned int addr, unsigned int value, unsigned int mask, unsigned int timeout)
168 {
169 unsigned int cnt = 0;
170
171 while ((DISP_REG_GET(addr) & mask) != value)
172 {
173 msleep(1);
174 cnt++;
175 if (cnt > timeout)
176 {
177 return -1;
178 }
179 }
180
181 return 0;
182 }
183
184
185 static int disp_bls_get_mutex(void)
186 {
187 if (gBLSMutexID < 0)
188 return -1;
189
190 DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 1);
191 if(disp_poll_for_reg(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0x2, 0x2, POLLING_TIME_OUT))
192 {
193 BLS_ERR("get mutex timeout! \n");
194 disp_dump_reg(DISP_MODULE_CONFIG);
195 return -1;
196 }
197 return 0;
198 }
199
200 static int disp_bls_release_mutex(void)
201 {
202 if (gBLSMutexID < 0)
203 return -1;
204
205 DISP_REG_SET(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0);
206 if(disp_poll_for_reg(DISP_REG_CONFIG_MUTEX(gBLSMutexID), 0, 0x2, POLLING_TIME_OUT))
207 {
208 BLS_ERR("release mutex timeout! \n");
209 disp_dump_reg(DISP_MODULE_CONFIG);
210 return -1;
211 }
212 return 0;
213 }
214 #endif
215 #endif
216
217 void disp_bls_update_gamma_lut(void)
218 {
219 #if defined(DDP_GAMMA_SUPPORT)
220 int index, i;
221 unsigned long CurVal, Count;
222
223 BLS_MSG("disp_bls_update_gamma_lut!\n");
224
225 if (DISP_REG_GET(DISP_REG_BLS_EN) & 0x1)
226 {
227 BLS_ERR("try to update gamma lut while BLS is active\n");
228 return;
229 }
230
231 // init gamma table
232 for(index = 0; index < 3; index++)
233 {
234 for(Count = 0; Count < 257 ; Count++)
235 {
236 g_gamma_lut.entry[index][Count] = g_gamma_index.entry[index][Count];
237 }
238 }
239
240 DISP_REG_SET(DISP_REG_BLS_LUT_UPDATE, 0x1);
241
242 for (i = 0; i < 256 ; i++)
243 {
244 CurVal = (((g_gamma_lut.entry[0][i]&0x3FF)<<20) | ((g_gamma_lut.entry[1][i]&0x3FF)<<10) | (g_gamma_lut.entry[2][i]&0x3FF));
245 DISP_REG_SET(DISP_REG_BLS_GAMMA_LUT(i), CurVal);
246 BLS_DBG("[%d] GAMMA LUT = 0x%x, (%lu, %lu, %lu)\n", i, DISP_REG_GET(DISP_REG_BLS_GAMMA_LUT(i)),
247 g_gamma_lut.entry[0][i], g_gamma_lut.entry[1][i], g_gamma_lut.entry[2][i]);
248 }
249
250 /* Set Gamma Last point*/
251 DISP_REG_SET(DISP_REG_BLS_GAMMA_SETTING, 0x00000001);
252
253 // set gamma last index
254 CurVal = (((g_gamma_lut.entry[0][256]&0x3FF)<<20) | ((g_gamma_lut.entry[1][256]&0x3FF)<<10) | (g_gamma_lut.entry[2][256]&0x3FF));
255 DISP_REG_SET(DISP_REG_BLS_GAMMA_BOUNDARY, CurVal);
256
257 DISP_REG_SET(DISP_REG_BLS_LUT_UPDATE, 0);
258 #endif
259 }
260
261 void disp_bls_update_pwm_lut(void)
262 {
263 int i;
264 unsigned int regValue;
265
266 BLS_MSG("disp_bls_update_pwm_lut!\n");
267
268 regValue = DISP_REG_GET(DISP_REG_BLS_EN);
269 if (regValue & 0x1) {
270 BLS_ERR("update PWM LUT while BLS func enabled!\n");
271 disp_dump_reg(DISP_MODULE_BLS);
272 }
273 //DISP_REG_SET(DISP_REG_BLS_EN, (regValue & 0x00010000));
274
275 for (i = 0; i < PWM_LUT_ENTRY; i++)
276 {
277 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(i), g_pwm_lut.entry[i]);
278 BLS_DBG("[%d] PWM LUT = 0x%x (%lu)\n", i, DISP_REG_GET(DISP_REG_BLS_LUMINANCE(i)), g_pwm_lut.entry[i]);
279
280 }
281 DISP_REG_SET(DISP_REG_BLS_LUMINANCE_255, g_pwm_lut.entry[PWM_LUT_ENTRY-1]);
282 //DISP_REG_SET(DISP_REG_BLS_EN, regValue);
283 }
284
285 void disp_bls_init(unsigned int srcWidth, unsigned int srcHeight)
286 {
287 struct cust_mt65xx_led *cust_led_list = get_cust_led_list();
288 struct cust_mt65xx_led *cust = NULL;
289 struct PWM_config *config_data = NULL;
290
291 if(cust_led_list)
292 {
293 cust = &cust_led_list[MT65XX_LED_TYPE_LCD];
294 if((strcmp(cust->name,"lcd-backlight") == 0) && (cust->mode == MT65XX_LED_MODE_CUST_BLS_PWM))
295 {
296 config_data = &cust->config_data;
297 if (config_data->clock_source >= 0 && config_data->clock_source <= 3)
298 {
299 unsigned int regVal = DISP_REG_GET(CLK_CFG_1);
300 clkmux_sel(MT_MUX_PWM, config_data->clock_source, "DISP_PWM");
301 BLS_DBG("disp_bls_init : CLK_CFG_1 0x%x => 0x%x\n", regVal, DISP_REG_GET(CLK_CFG_1));
302 }
303 gPWMDiv = (config_data->div == 0) ? PWM_DEFAULT_DIV_VALUE : config_data->div;
304 gPWMDiv &= 0x3FF;
305 BLS_MSG("disp_bls_init : PWM config data (%d,%d)\n", config_data->clock_source, config_data->div);
306 }
307 }
308
309 BLS_DBG("disp_bls_init : srcWidth = %d, srcHeight = %d\n", srcWidth, srcHeight);
310 BLS_MSG("disp_bls_init : BLS_EN=0x%x, PWM_DUTY=%d, PWM_DUTY_RD=%d, CG=0x%x, %d, %d\n",
311 DISP_REG_GET(DISP_REG_BLS_EN),
312 DISP_REG_GET(DISP_REG_BLS_PWM_DUTY),
313 DISP_REG_GET(DISP_REG_BLS_PWM_DUTY_RD),
314 DISP_REG_GET(DISP_REG_CONFIG_MMSYS_CG_CON0),
315 clock_is_on(MT_CG_DISP0_MDP_BLS_26M),
316 clock_is_on(MT_CG_DISP0_DISP_BLS));
317
318 DISP_REG_SET(DISP_REG_BLS_SRC_SIZE, (srcHeight << 16) | srcWidth);
319 DISP_REG_SET(DISP_REG_BLS_PWM_CON, 0x0 | (gPWMDiv << 16));
320 DISP_REG_SET(DISP_REG_BLS_BLS_SETTING, 0x0);
321 DISP_REG_SET(DISP_REG_BLS_INTEN, 0xF);
322 if (!(DISP_REG_GET(DISP_REG_BLS_EN) & 0x10000))
323 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);
324
325 disp_bls_update_gamma_lut();
326 //disp_bls_update_pwm_lut();
327
328 disp_bls_config_full(srcWidth, srcHeight);
329
330 if (dbg_log)
331 disp_dump_reg(DISP_MODULE_BLS);
332 }
333
334 int disp_bls_config(void)
335 {
336 #if !defined(CONFIG_MTK_AAL_SUPPORT)
337 struct cust_mt65xx_led *cust_led_list = get_cust_led_list();
338 struct cust_mt65xx_led *cust = NULL;
339 struct PWM_config *config_data = NULL;
340
341 if(cust_led_list)
342 {
343 cust = &cust_led_list[MT65XX_LED_TYPE_LCD];
344 if((strcmp(cust->name,"lcd-backlight") == 0) && (cust->mode == MT65XX_LED_MODE_CUST_BLS_PWM))
345 {
346 config_data = &cust->config_data;
347 if (config_data->clock_source >= 0 && config_data->clock_source <= 3)
348 {
349 unsigned int regVal = DISP_REG_GET(CLK_CFG_1);
350 clkmux_sel(MT_MUX_PWM, config_data->clock_source, "DISP_PWM");
351 BLS_DBG("disp_bls_init : CLK_CFG_1 0x%x => 0x%x\n", regVal, DISP_REG_GET(CLK_CFG_1));
352 }
353 gPWMDiv = (config_data->div == 0) ? PWM_DEFAULT_DIV_VALUE : config_data->div;
354 gPWMDiv &= 0x3FF;
355 BLS_MSG("disp_bls_config : PWM config data (%d,%d)\n", config_data->clock_source, config_data->div);
356 }
357 }
358
359 if (!clock_is_on(MT_CG_DISP0_MDP_BLS_26M) || !gBLSPowerOn)
360 {
361 BLS_MSG("disp_bls_config: enable clock\n");
362 enable_clock(MT_CG_DISP0_SMI_LARB0, "DDP");
363 enable_clock(MT_CG_DISP0_MDP_BLS_26M , "DDP");
364 gBLSPowerOn = 1;
365 }
366
367 BLS_MSG("disp_bls_config : BLS_EN=0x%x, PWM_DUTY=%d, PWM_DUTY_RD=%d, CG=0x%x, %d, %d\n",
368 DISP_REG_GET(DISP_REG_BLS_EN),
369 DISP_REG_GET(DISP_REG_BLS_PWM_DUTY),
370 DISP_REG_GET(DISP_REG_BLS_PWM_DUTY_RD),
371 DISP_REG_GET(DISP_REG_CONFIG_MMSYS_CG_CON0),
372 clock_is_on(MT_CG_DISP0_MDP_BLS_26M),
373 clock_is_on(MT_CG_DISP0_DISP_BLS));
374
375 #ifdef USE_DISP_BLS_MUTEX
376 BLS_MSG("disp_bls_config : gBLSMutexID = %d\n", gBLSMutexID);
377
378 DISP_REG_SET(DISP_REG_CONFIG_MUTEX_RST(gBLSMutexID), 1);
379 DISP_REG_SET(DISP_REG_CONFIG_MUTEX_RST(gBLSMutexID), 0);
380 DISP_REG_SET(DISP_REG_CONFIG_MUTEX_MOD(gBLSMutexID), 0x200); // BLS
381 DISP_REG_SET(DISP_REG_CONFIG_MUTEX_SOF(gBLSMutexID), 0); // single mode
382 DISP_REG_SET(DISP_REG_CONFIG_MUTEX_EN(gBLSMutexID), 1);
383
384 if (disp_bls_get_mutex() == 0)
385 {
386
387 #else
388 BLS_MSG("disp_bls_config\n");
389 DISP_REG_SET(DISP_REG_BLS_DEBUG, 0x3);
390 #endif
391
392 if (!(DISP_REG_GET(DISP_REG_BLS_EN) & 0x10000))
393 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);
394 DISP_REG_SET(DISP_REG_BLS_PWM_CON, 0x0 | (gPWMDiv << 16));
395 //DISP_REG_SET(DISP_REG_BLS_EN, 0x00010001); //Enable BLS_EN
396
397 #ifdef USE_DISP_BLS_MUTEX
398
399 if (disp_bls_release_mutex() == 0)
400 return 0;
401 }
402 return -1;
403 #else
404 DISP_REG_SET(DISP_REG_BLS_DEBUG, 0x0);
405 #endif
406
407 #endif
408 BLS_MSG("disp_bls_config:-\n");
409 return 0;
410 }
411
412 void disp_bls_config_full(unsigned int width, unsigned int height)
413 {
414 unsigned int regVal;
415 unsigned int dither_bpp = DISP_GetOutputBPPforDithering();
416
417 BLS_DBG("disp_bls_config_full, width=%d, height=%d, reg=0x%x \n",
418 width, height, ((height<<16) + width));
419
420 //DISP_REG_SET(DISP_REG_BLS_DEBUG ,0x00000003);
421
422 #if defined(DDP_GAMMA_SUPPORT)
423 DISP_REG_SET(DISP_REG_BLS_BLS_SETTING ,0x00100007);
424 #else
425 DISP_REG_SET(DISP_REG_BLS_BLS_SETTING ,0x00100000);
426 #endif
427 DISP_REG_SET(DISP_REG_BLS_SRC_SIZE ,((height<<16) + width));
428 DISP_REG_SET(DISP_REG_BLS_GAMMA_SETTING ,0x00000001);
429 DISP_REG_SET(DISP_REG_BLS_GAMMA_BOUNDARY ,0x3fffffff);
430
431 /* BLS Luminance LUT */
432 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(0) ,0x00000000);
433 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(1) ,0x00000004);
434 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(2) ,0x00000010);
435 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(3) ,0x00000024);
436 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(4) ,0x00000040);
437 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(5) ,0x00000064);
438 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(6) ,0x00000090);
439 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(7) ,0x000000C4);
440 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(8) ,0x00000100);
441 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(9) ,0x00000144);
442 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(10) ,0x00000190);
443 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(11) ,0x000001E4);
444 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(12) ,0x00000240);
445 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(13) ,0x00000244);
446 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(14) ,0x00000310);
447 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(15) ,0x00000384);
448 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(16) ,0x00000400);
449 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(17) ,0x00000484);
450 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(18) ,0x00000510);
451 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(19) ,0x000005A4);
452 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(20) ,0x00000640);
453 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(21) ,0x000006E4);
454 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(22) ,0x00000790);
455 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(23) ,0x00000843);
456 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(24) ,0x000008FF);
457 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(25) ,0x000009C3);
458 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(26) ,0x00000A8F);
459 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(27) ,0x00000B63);
460 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(28) ,0x00000C3F);
461 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(29) ,0x00000D23);
462 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(30) ,0x00000E0F);
463 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(31) ,0x00000F03);
464 DISP_REG_SET(DISP_REG_BLS_LUMINANCE(32) ,0x00000FFF);
465 /* BLS Luminance 255 */
466 DISP_REG_SET(DISP_REG_BLS_LUMINANCE_255 ,0x00000FDF);
467
468 /* Dither */
469 DISP_REG_SET(DISP_REG_BLS_DITHER(5) ,0x00000000);
470 DISP_REG_SET(DISP_REG_BLS_DITHER(6) ,0x00003004);
471 DISP_REG_SET(DISP_REG_BLS_DITHER(7) ,0x00000000);
472 DISP_REG_SET(DISP_REG_BLS_DITHER(8) ,0x00000000);
473 DISP_REG_SET(DISP_REG_BLS_DITHER(9) ,0x00000000);
474 DISP_REG_SET(DISP_REG_BLS_DITHER(10) ,0x00000000);
475 DISP_REG_SET(DISP_REG_BLS_DITHER(11) ,0x00000000);
476 DISP_REG_SET(DISP_REG_BLS_DITHER(12) ,0x00000011);
477 DISP_REG_SET(DISP_REG_BLS_DITHER(13) ,0x00000000);
478 DISP_REG_SET(DISP_REG_BLS_DITHER(14) ,0x00000000);
479 /* output RGB888 */
480 if (dither_bpp == 16) // 565
481 {
482 DISP_REG_SET(DISP_REG_BLS_DITHER(15), 0x50500001);
483 DISP_REG_SET(DISP_REG_BLS_DITHER(16), 0x50504040);
484 DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000001);
485 }
486 else if (dither_bpp == 18) // 666
487 {
488 DISP_REG_SET(DISP_REG_BLS_DITHER(15), 0x40400001);
489 DISP_REG_SET(DISP_REG_BLS_DITHER(16), 0x40404040);
490 DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000001);
491 }
492 else if (dither_bpp == 24) // 888
493 {
494 DISP_REG_SET(DISP_REG_BLS_DITHER(15), 0x20200001);
495 DISP_REG_SET(DISP_REG_BLS_DITHER(16), 0x20202020);
496 DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000001);
497 }
498 else
499 {
500 BLS_MSG("error diter bpp = %d\n", dither_bpp);
501 DISP_REG_SET(DISP_REG_BLS_DITHER(0), 0x00000000);
502 }
503
504
505 DISP_REG_SET(DISP_REG_BLS_INTEN ,0x0000000f); // no scene change
506
507 regVal = DISP_REG_GET(DISP_REG_BLS_EN);
508 if (regVal & 0x10000) // PWM_EN has been enabled
509 DISP_REG_SET(DISP_REG_BLS_EN ,0x00010001);
510 else // on resume
511 DISP_REG_SET(DISP_REG_BLS_EN ,0x00000001);
512
513 //DISP_REG_SET(DISP_REG_BLS_EN ,0x00000001);
514
515 //DISP_REG_SET(DISP_REG_BLS_DEBUG ,0x00000000);
516 }
517
518
519 int disp_bls_set_max_backlight_(unsigned int level)
520 {
521 mutex_lock(&backlight_mutex);
522 BLS_MSG("disp_bls_set_max_backlight: level = %d, current level = %d\n", level * 1023 / 255, gMaxLevel);
523 //PWM duty input = PWM_DUTY_IN / 1024
524 gMaxLevel = level * 1023 / 255;
525 mutex_unlock(&backlight_mutex);
526 return 0;
527 }
528
529
530 int disp_bls_get_max_backlight(void)
531 {
532 int max_bl;
533
534 mutex_lock(&backlight_mutex);
535 max_bl = gMaxLevel;
536 mutex_unlock(&backlight_mutex);
537
538 return max_bl;
539 }
540
541
542 #if !defined(CONFIG_MTK_AAL_SUPPORT)
543 int disp_bls_set_backlight(unsigned int level)
544 {
545 unsigned int regVal;
546 unsigned int mapped_level;
547 BLS_MSG("disp_bls_set_backlight: %d, gBLSPowerOn = %d\n", level, gBLSPowerOn);
548
549 mutex_lock(&backlight_mutex);
550
551 // if (level && (!clock_is_on(MT_CG_DISP0_MDP_BLS_26M) || !gBLSPowerOn))
552 // {
553 // disp_bls_config();
554 // }
555 #ifdef USE_DISP_BLS_MUTEX
556 disp_bls_get_mutex();
557 #else
558 DISP_REG_SET(DISP_REG_BLS_DEBUG, 0x3);
559 #endif
560
561 mapped_level = brightness_mapping(level);
562 BLS_MSG("after mapping, mapped_level: %d\n", mapped_level);
563 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, mapped_level);
564 if(level != 0)
565 {
566 regVal = DISP_REG_GET(DISP_REG_BLS_EN);
567 if (!(regVal & 0x10000))
568 DISP_REG_SET(DISP_REG_BLS_EN, regVal | 0x10000);
569 }
570 else
571 {
572 regVal = DISP_REG_GET(DISP_REG_BLS_EN);
573 if (regVal & 0x10000)
574 DISP_REG_SET(DISP_REG_BLS_EN, regVal & 0xFFFEFFFF);
575 }
576 BLS_MSG("after SET, PWM_DUTY: %d\n", DISP_REG_GET(DISP_REG_BLS_PWM_DUTY));
577
578 #ifdef USE_DISP_BLS_MUTEX
579 disp_bls_release_mutex();
580 #else
581 DISP_REG_SET(DISP_REG_BLS_DEBUG, 0x0);
582 #endif
583
584 // if (!level && (clock_is_on(MT_CG_DISP0_MDP_BLS_26M) && gBLSPowerOn))
585 // {
586 // BLS_MSG("disp_bls_set_backlight: disable clock\n");
587 // disable_clock(MT_CG_DISP0_MDP_BLS_26M , "DDP");
588 // disable_clock(MT_CG_DISP0_SMI_LARB0 , "DDP");
589 // gBLSPowerOn = 0;
590 // }
591 mutex_unlock(&backlight_mutex);
592 return 0;
593 }
594 #else
595 int disp_bls_set_backlight(unsigned int level)
596 {
597 DISP_AAL_PARAM *param;
598 BLS_MSG("disp_bls_set_backlight: %d\n", level);
599
600 mutex_lock(&backlight_mutex);
601 disp_aal_lock();
602 param = get_aal_config();
603 param->pwmDuty = level;
604 disp_aal_unlock();
605 mutex_unlock(&backlight_mutex);
606 return 0;
607 }
608 #endif
609 static unsigned long prev_debug = 0;
610 void disp_bls_contrl_directly(bool enable)
611 {
612 if(!prev_debug)
613 {
614 prev_debug = DISP_REG_GET(DISP_REG_BLS_DEBUG);
615 }
616
617 if(enable)
618 {
619 DISP_REG_SET(DISP_REG_BLS_DEBUG, prev_debug);
620 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);
621 DISP_REG_SET(DISP_REG_BLS_EN,0x00010001);
622 }
623 else
624 {
625 DISP_REG_SET(DISP_REG_BLS_DEBUG, 0x3);
626 DISP_REG_SET(DISP_REG_BLS_PWM_DUTY, 0);
627 DISP_REG_SET(DISP_REG_BLS_EN, 0);
628 }
629 }
630