drivers/misc/mediatek/connectivity/combo/common/include/wmt_plat.h

   1 /*! \file
   2     \brief  Declaration of library functions
   3
   4     Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
   5 */
   6
   7
   8
   9 #ifndef _WMT_PLAT_H_
  10 #define _WMT_PLAT_H_
  11 #include <mach/mtk_wcn_cmb_stub.h>
  12 #include "mtk_wcn_cmb_hw.h"
  13 #include "stp_exp.h"
  14 #include "osal.h"
  15
  16 /*******************************************************************************
  17 *                         C O M P I L E R   F L A G S
  18 ********************************************************************************
  19 */
  20
  21 /*******************************************************************************
  22 *                                 M A C R O S
  23 ********************************************************************************
  24 */
  25 #if defined(MT6630)
  26 #define CONSYS_WMT_REG_SUSPEND_CB_ENABLE 1
  27 /*disable early_suspend/late_resume handling by default*/
  28 #ifdef CONFIG_EARLYSUSPEND
  29 #define CONSYS_EARLYSUSPEND_ENABLE 0
  30 #else
  31 #define CONSYS_EARLYSUSPEND_ENABLE 0
  32 #endif
  33 #else
  34 #define CONSYS_WMT_REG_SUSPEND_CB_ENABLE 0
  35 #define CONSYS_EARLYSUSPEND_ENABLE 0
  36 #endif
  37
  38 #if defined(MTK_MERGE_INTERFACE_SUPPORT) && (defined(MT6628) || defined(MT6630))
  39 #define MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT 1
  40 #else
  41 #define MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT 0
  42 #endif
  43
  44 #if MTK_WCN_CMB_FOR_SDIO_1V_AUTOK
  45 #define WMT_FOR_SDIO_1V_AUTOK 1
  46 #else
  47 #define WMT_FOR_SDIO_1V_AUTOK 0
  48 #endif
  49
  50 #if (MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT)
  51 /* Supported AP platform:MT6589, MT6595, MT8135 */
  52 /* Supported Connectiity platform: MT6628, MT6630 */
  53
  54 #if defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_1) || defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_2)
  55
  56 #define GPIO_PCM_DAICLK_PIN_PINMUX_MODE     GPIO_PCM_DAICLK_PIN_M_CLK
  57 #define GPIO_PCM_DAIPCMOUT_PIN_PINMUX_MODE  GPIO_PCM_DAIPCMOUT_PIN_M_MRG_I2S_PCM_TX
  58 #define GPIO_PCM_DAIPCMIN_PIN_PINMUX_MODE   GPIO_PCM_DAIPCMIN_PIN_M_MRG_I2S_PCM_RX
  59 #define GPIO_PCM_DAISYNC_PIN_PINMUX_MODE    GPIO_PCM_DAISYNC_PIN_M_MRG_I2S_PCM_SYNC
  60
  61 #if defined(GPIO_COMBO_I2S_CK_PIN)
  62 #define GPIO_COMBO_I2S_CK_PIN_PINMUX_MODE   GPIO_COMBO_I2S_CK_PIN_M_CLK
  63 #define GPIO_COMBO_I2S_WS_PIN_PINMUX_MODE   GPIO_COMBO_I2S_WS_PIN_M_MRG_I2S_PCM_SYNC
  64 #define GPIO_COMBO_I2S_DAT_PIN_PINMUX_MODE  GPIO_COMBO_I2S_DAT_PIN_M_MRG_I2S_PCM_RX
  65 #define GPIO_PCM_DAIPCMOUT_PIN_PINMUX_MODE  GPIO_PCM_DAIPCMOUT_PIN_M_MRG_I2S_PCM_TX
  66 #endif
  67
  68 #elif defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_3)
  69 /* MT6595 */
  70
  71 #define GPIO_PCM_DAICLK_PIN_PINMUX_MODE     GPIO_PCM_DAICLK_PIN_M_CLK
  72 #define GPIO_PCM_DAIPCMOUT_PIN_PINMUX_MODE  GPIO_PCM_DAIPCMOUT_PIN_M_MRG_DO
  73 #define GPIO_PCM_DAIPCMIN_PIN_PINMUX_MODE   GPIO_PCM_DAIPCMIN_PIN_M_MRG_DI
  74 #define GPIO_PCM_DAISYNC_PIN_PINMUX_MODE    GPIO_PCM_DAISYNC_PIN_M_MRG_SYNC
  75
  76 #if defined(GPIO_COMBO_I2S_CK_PIN)
  77 #error "need to config I2S Only mode pinmux marco"
  78 #endif
  79
  80
  81 #endif
  82
  83 #endif
  84
  85
  86 #if defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_1)
  87 /* platform: MT6589, MT8135 */
  88 /* PCM Pin */
  89 #define GPIO_PCM_DAICLK_PIN_PCMONLY_MODE       GPIO_PCM_DAICLK_PIN_M_PCM0_CK
  90 #define GPIO_PCM_DAIPCMOUT_PIN_PCMONLY_MODE    GPIO_PCM_DAIPCMOUT_PIN_M_PCM0_DO
  91 #define GPIO_PCM_DAIPCMIN_PIN_PCMONLY_MODE     GPIO_PCM_DAIPCMIN_PIN_M_PCM0_DI
  92 #define GPIO_PCM_DAISYNC_PIN_PCMONLY_MODE      GPIO_PCM_DAISYNC_PIN_M_PCM0_WS
  93
  94 /* I2S Pin */
  95 #if defined(GPIO_COMBO_I2S_CK_PIN)
  96 #define GPIO_COMBO_I2S_CK_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_CK_PIN_M_I2SIN_CK
  97 #define GPIO_COMBO_I2S_WS_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_WS_PIN_M_I2SIN_WS
  98 #define GPIO_COMBO_I2S_DAT_PIN_I2SONLY_MODE    GPIO_COMBO_I2S_DAT_PIN_M_I2SIN_DAT
  99 #endif
 100
 101 #elif defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_2)
 102 /* platform: MT6592 */
 103 /* PCM Pin */
 104 #define GPIO_PCM_DAICLK_PIN_PCMONLY_MODE       GPIO_PCM_DAICLK_PIN_M_F2W_CK
 105 #define GPIO_PCM_DAIPCMOUT_PIN_PCMONLY_MODE    GPIO_PCM_DAIPCMOUT_PIN_M_MRG_I2S_PCM_TX
 106 #define GPIO_PCM_DAIPCMIN_PIN_PCMONLY_MODE     GPIO_PCM_DAIPCMIN_PIN_M_MRG_I2S_PCM_RX
 107 #define GPIO_PCM_DAISYNC_PIN_PCMONLY_MODE      GPIO_PCM_DAISYNC_PIN_M_MRG_I2S_PCM_SYNC
 108
 109 /* I2S Pin */
 110 #if defined(GPIO_COMBO_I2S_CK_PIN)
 111 #define GPIO_COMBO_I2S_CK_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_CK_PIN_M_I2SIN1_BCK
 112 #define GPIO_COMBO_I2S_WS_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_WS_PIN_M_I2SIN1_LRCK
 113 #define GPIO_COMBO_I2S_DAT_PIN_I2SONLY_MODE    GPIO_COMBO_I2S_DAT_PIN_M_I2SIN1_DATA_IN
 114 #endif
 115
 116 #elif defined(MTK_WCN_CMB_AUD_IO_NAMING_STYLE_3)
 117 /* platform: MT6595 */
 118 /* PCM Pin */
 119 #define GPIO_PCM_DAICLK_PIN_PCMONLY_MODE       GPIO_PCM_DAICLK_PIN_M_PCM0_CLK
 120 #define GPIO_PCM_DAIPCMOUT_PIN_PCMONLY_MODE    GPIO_PCM_DAIPCMIN_PIN_M_PCM0_DI
 121 #define GPIO_PCM_DAIPCMIN_PIN_PCMONLY_MODE     GPIO_PCM_DAIPCMOUT_PIN_M_PCM0_DO
 122 #define GPIO_PCM_DAISYNC_PIN_PCMONLY_MODE      GPIO_PCM_DAISYNC_PIN_M_PCM0_SYNC
 123
 124 /* I2S Pin */
 125 #if defined(GPIO_COMBO_I2S_CK_PIN)
 126 #error "need to config I2S Only mode pinmux marco"
 127 #endif
 128
 129 #else
 130 /* platform: MT6573/MT6575/MT6577 */
 131 #define GPIO_PCM_DAICLK_PIN_PCMONLY_MODE       GPIO_PCM_DAICLK_PIN_M_CLK
 132 #define GPIO_PCM_DAIPCMOUT_PIN_PCMONLY_MODE    GPIO_PCM_DAIPCMOUT_PIN_M_DAIPCMOUT
 133 #define GPIO_PCM_DAIPCMIN_PIN_PCMONLY_MODE     GPIO_PCM_DAIPCMIN_PIN_M_DAIPCMIN
 134 #define GPIO_PCM_DAISYNC_PIN_PCMONLY_MODE      GPIO_PCM_DAISYNC_PIN_M_BTSYNC
 135
 136 #if defined(GPIO_COMBO_I2S_CK_PIN)
 137 #define GPIO_COMBO_I2S_CK_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_CK_PIN_M_I2S0_CK
 138 #define GPIO_COMBO_I2S_WS_PIN_I2SONLY_MODE     GPIO_COMBO_I2S_WS_PIN_M_I2S0_WS
 139 #define GPIO_COMBO_I2S_DAT_PIN_I2SONLY_MODE    GPIO_COMBO_I2S_DAT_PIN_M_I2S0_DAT
 140 #endif
 141
 142 #endif
 143 /*******************************************************************************
 144 *                              C O N S T A N T S
 145 ********************************************************************************
 146 */
 147
 148 #if 0                           /* [GeorgeKuo] remove COMBO_AUDIO FLAG */
 149 #define COMBO_AUDIO_BT_MASK (0x1UL)
 150 #define COMBO_AUDIO_BT_PCM_ON (0x1UL << 0)
 151 #define COMBO_AUDIO_BT_PCM_OFF (0x0UL << 0)
 152
 153 #define COMBO_AUDIO_FM_MASK (0x2UL)
 154 #define COMBO_AUDIO_FM_LINEIN (0x0UL << 1)
 155 #define COMBO_AUDIO_FM_I2S (0x1UL << 1)
 156
 157 #define COMBO_AUDIO_PIN_MASK     (0x4UL)
 158 #define COMBO_AUDIO_PIN_SHARE    (0x1UL << 2)
 159 #define COMBO_AUDIO_PIN_SEPARATE (0x0UL << 2)
 160 #endif
 161
 162 /*******************************************************************************
 163 *                             D A T A   T Y P E S
 164 ********************************************************************************
 165 */
 166
 167 typedef enum _ENUM_FUNC_STATE_ {
 168         FUNC_ON = 0,
 169         FUNC_OFF = 1,
 170         FUNC_RST = 2,
 171         FUNC_STAT = 3,
 172         FUNC_CTRL_MAX,
 173 } ENUM_FUNC_STATE, *P_ENUM_FUNC_STATE;
 174
 175 typedef enum _ENUM_PIN_ID_ {
 176         PIN_LDO = 0,
 177         PIN_PMU = 1,
 178         PIN_RTC = 2,
 179         PIN_RST = 3,
 180         PIN_BGF_EINT = 4,
 181         PIN_WIFI_EINT = 5,
 182         PIN_ALL_EINT = 6,
 183         PIN_UART_GRP = 7,
 184         PIN_PCM_GRP = 8,
 185         PIN_I2S_GRP = 9,
 186         PIN_SDIO_GRP = 10,
 187         PIN_GPS_SYNC = 11,
 188         PIN_GPS_LNA = 12,
 189         PIN_UART_RX = 13,
 190         PIN_ID_MAX
 191 } ENUM_PIN_ID, *P_ENUM_PIN_ID;
 192
 193 typedef enum _ENUM_PIN_STATE_ {
 194         PIN_STA_INIT = 0,
 195         PIN_STA_OUT_L = 1,
 196         PIN_STA_OUT_H = 2,
 197         PIN_STA_IN_L = 3,
 198         PIN_STA_MUX = 4,
 199         PIN_STA_EINT_EN = 5,
 200         PIN_STA_EINT_DIS = 6,
 201         PIN_STA_DEINIT = 7,
 202         PIN_STA_SHOW = 8,
 203         PIN_STA_IN_PU = 9,
 204         PIN_STA_IN_NP = 10,
 205         PIN_STA_MAX
 206 } ENUM_PIN_STATE, *P_ENUM_PIN_STATE;
 207
 208 typedef enum _CMB_IF_TYPE_ {
 209         CMB_IF_UART = 0,
 210         CMB_IF_WIFI_SDIO = 1,
 211         CMB_IF_BGF_SDIO = 2,
 212         CMB_IF_BGWF_SDIO = 3,
 213         CMB_IF_TYPE_MAX
 214 } CMB_IF_TYPE, *P_CMB_IF_TYPE;
 215
 216 typedef INT32(*fp_set_pin) (ENUM_PIN_STATE);
 217
 218 typedef enum _ENUM_WL_OP_ {
 219         WL_OP_GET = 0,
 220         WL_OP_PUT = 1,
 221         WL_OP_MAX
 222 } ENUM_WL_OP, *P_ENUM_WL_OP;
 223
 224 typedef VOID(*irq_cb) (VOID);
 225 typedef INT32(*device_audio_if_cb) (CMB_STUB_AIF_X aif, MTK_WCN_BOOL share);
 226
 227
 228 /*******************************************************************************
 229 *                    E X T E R N A L   R E F E R E N C E S
 230 ********************************************************************************
 231 */
 232
 233 /*******************************************************************************
 234 *                            P U B L I C   D A T A
 235 ********************************************************************************
 236 */
 237
 238
 239 /*******************************************************************************
 240 *                           P R I V A T E   D A T A
 241 ********************************************************************************
 242 */
 243
 244 /*******************************************************************************
 245 *                  F U N C T I O N   D E C L A R A T I O N S
 246 ********************************************************************************
 247 */
 248
 249 INT32 wmt_plat_init(P_PWR_SEQ_TIME pPwrSeqTime);
 250
 251 INT32 wmt_plat_deinit(VOID);
 252
 253 INT32 wmt_plat_irq_ctrl(ENUM_FUNC_STATE state);
 254
 255 INT32 wmt_plat_pwr_ctrl(ENUM_FUNC_STATE state);
 256
 257 INT32 wmt_plat_ps_ctrl(ENUM_FUNC_STATE state);
 258
 259 INT32 wmt_plat_gpio_ctrl(ENUM_PIN_ID id, ENUM_PIN_STATE state);
 260
 261 INT32 wmt_plat_eirq_ctrl(ENUM_PIN_ID id, ENUM_PIN_STATE state);
 262
 263 INT32 wmt_plat_sdio_ctrl(UINT32 sdioPortNum, ENUM_FUNC_STATE on);
 264
 265
 266 INT32 wmt_plat_wake_lock_ctrl(ENUM_WL_OP opId);
 267
 268 VOID wmt_lib_plat_irq_cb_reg(irq_cb bgf_irq_cb);
 269
 270 INT32 wmt_plat_audio_ctrl(CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl);
 271
 272 VOID wmt_lib_plat_aif_cb_reg(device_audio_if_cb aif_ctrl_cb);
 273
 274 INT32 wmt_plat_merge_if_flag_ctrl(UINT32 enagle);
 275
 276 INT32 wmt_plat_merge_if_flag_get(VOID);
 277
 278 INT32 wmt_plat_set_comm_if_type(ENUM_STP_TX_IF_TYPE type);
 279
 280 ENUM_STP_TX_IF_TYPE wmt_plat_get_comm_if_type(VOID);
 281
 282
 283
 284 /*******************************************************************************
 285 *                              F U N C T I O N S
 286 ********************************************************************************
 287 */
 288
 289 #endif                          /* _WMT_PLAT_H_ */