2 \brief brief description
4 Detailed descriptions here.
10 /*******************************************************************************
11 * C O M P I L E R F L A G S
12 ********************************************************************************
15 /*******************************************************************************
17 ********************************************************************************
19 #include "osal_typedef.h"
27 #if CFG_WMT_DBG_SUPPORT
33 #define DFT_TAG "[WMT-DEV]"
37 #define WMT_DBG_PROCNAME "driver/wmt_dbg"
39 static struct proc_dir_entry
*gWmtDbgEntry
= NULL
;
42 #if USE_NEW_PROC_FS_FLAG
44 ssize_t
wmt_dbg_write(struct file
*filp
, const char __user
*buf
, size_t count
, loff_t
*f_pos
);
45 ssize_t
wmt_dbg_read(struct file
*filp
, char __user
*buf
, size_t count
, loff_t
*f_pos
);
47 static struct file_operations wmt_dbg_fops
= {
49 .write
= wmt_dbg_write
,
54 static INT32
wmt_dbg_psm_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
55 static INT32
wmt_dbg_dsns_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
56 static INT32
wmt_dbg_hwver_get(INT32 par1
, INT32 par2
, INT32 par3
);
57 static INT32
wmt_dbg_inband_rst(INT32 par1
, INT32 par2
, INT32 par3
);
58 static INT32
wmt_dbg_chip_rst(INT32 par1
, INT32 par2
, INT32 par3
);
59 static INT32
wmt_dbg_func_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
60 static INT32
wmt_dbg_raed_chipid(INT32 par1
, INT32 par2
, INT32 par3
);
61 static INT32
wmt_dbg_wmt_dbg_level(INT32 par1
, INT32 par2
, INT32 par3
);
62 static INT32
wmt_dbg_stp_dbg_level(INT32 par1
, INT32 par2
, INT32 par3
);
63 static INT32
wmt_dbg_reg_read(INT32 par1
, INT32 par2
, INT32 par3
);
64 static INT32
wmt_dbg_reg_write(INT32 par1
, INT32 par2
, INT32 par3
);
65 static INT32
wmt_dbg_coex_test(INT32 par1
, INT32 par2
, INT32 par3
);
66 static INT32
wmt_dbg_assert_test(INT32 par1
, INT32 par2
, INT32 par3
);
67 static INT32
wmt_dbg_cmd_test_api(ENUM_WMTDRV_CMD_T cmd
);
68 static INT32
wmt_dbg_rst_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
69 static INT32
wmt_dbg_ut_test(INT32 par1
, INT32 par2
, INT32 par3
);
70 static INT32
wmt_dbg_efuse_read(INT32 par1
, INT32 par2
, INT32 par3
);
71 static INT32
wmt_dbg_efuse_write(INT32 par1
, INT32 par2
, INT32 par3
);
72 static INT32
wmt_dbg_sdio_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
73 static INT32
wmt_dbg_stp_dbg_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
74 static INT32
wmt_dbg_stp_dbg_log_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
75 static INT32
wmt_dbg_wmt_assert_ctrl(INT32 par1
, INT32 par2
, INT32 par3
);
76 static INT32
wmt_dbg_stp_trigger_assert(INT32 par1
, INT32 par2
, INT32 par3
);
77 static INT32
wmt_dbg_ap_reg_read(INT32 par1
, INT32 par2
, INT32 par3
);
78 static INT32
wmt_dbg_ap_reg_write(INT32 par1
, INT32 par2
, INT32 par3
);
79 #if CFG_WMT_LTE_COEX_HANDLING
80 static INT32
wmt_dbg_lte_coex_test(INT32 par1
, INT32 par2
, INT32 par3
);
84 const static WMT_DEV_DBG_FUNC wmt_dev_dbg_func
[] = {
85 [0] = wmt_dbg_psm_ctrl
,
86 [1] = wmt_dbg_psm_ctrl
,
87 [2] = wmt_dbg_dsns_ctrl
,
88 [3] = wmt_dbg_hwver_get
,
89 [4] = wmt_dbg_assert_test
,
90 [5] = wmt_dbg_inband_rst
,
91 [6] = wmt_dbg_chip_rst
,
92 [7] = wmt_dbg_func_ctrl
,
93 [8] = wmt_dbg_raed_chipid
,
94 [9] = wmt_dbg_wmt_dbg_level
,
95 [0xa] = wmt_dbg_stp_dbg_level
,
96 [0xb] = wmt_dbg_reg_read
,
97 [0xc] = wmt_dbg_reg_write
,
98 [0xd] = wmt_dbg_coex_test
,
99 [0xe] = wmt_dbg_rst_ctrl
,
100 [0xf] = wmt_dbg_ut_test
,
101 [0x10] = wmt_dbg_efuse_read
,
102 [0x11] = wmt_dbg_efuse_write
,
103 [0x12] = wmt_dbg_sdio_ctrl
,
104 [0x13] = wmt_dbg_stp_dbg_ctrl
,
105 [0x14] = wmt_dbg_stp_dbg_log_ctrl
,
106 [0x15] = wmt_dbg_wmt_assert_ctrl
,
107 [0x16] = wmt_dbg_stp_trigger_assert
,
108 [0x17] = wmt_dbg_ap_reg_read
,
109 [0x18] = wmt_dbg_ap_reg_write
,
110 #if CFG_WMT_LTE_COEX_HANDLING
111 [0x20] = wmt_dbg_lte_coex_test
,
115 INT32
wmt_dbg_psm_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
117 #if CFG_WMT_PS_SUPPORT
120 WMT_INFO_FUNC("disable PSM\n");
122 par2
= (1 > par2
|| 20000 < par2
) ? STP_PSM_IDLE_TIME_SLEEP
: par2
;
123 wmt_lib_ps_set_idle_time(par2
);
125 WMT_INFO_FUNC("enable PSM, idle to sleep time = %d ms\n", par2
);
128 WMT_INFO_FUNC("WMT PS not supported\n");
133 INT32
wmt_dbg_dsns_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
135 if (WMTDSNS_FM_DISABLE
<= par2
&& WMTDSNS_MAX
> par2
) {
136 WMT_INFO_FUNC("DSNS type (%d)\n", par2
);
137 mtk_wcn_wmt_dsns_ctrl(par2
);
139 WMT_WARN_FUNC("invalid DSNS type\n");
144 INT32
wmt_dbg_hwver_get(INT32 par1
, INT32 par2
, INT32 par3
)
146 WMT_INFO_FUNC("query chip version\n");
147 mtk_wcn_wmt_hwver_get();
151 INT32
wmt_dbg_assert_test(INT32 par1
, INT32 par2
, INT32 par3
)
154 /* par2 = 0: send assert command */
155 /* par2 != 0: send exception command */
156 return wmt_dbg_cmd_test_api(0 == par2
? 0 : 1);
157 } else if (1 == par3
) {
158 /* send noack command */
159 return wmt_dbg_cmd_test_api(WMTDRV_CMD_NOACK_TEST
);
160 } else if (2 == par3
) {
161 /* warn reset test */
162 return wmt_dbg_cmd_test_api(WMTDRV_CMD_WARMRST_TEST
);
163 } else if (3 == par3
) {
164 /* firmware trace test - for soc usage, not used in combo chip */
165 return wmt_dbg_cmd_test_api(WMTDRV_CMD_FWTRACE_TEST
);
171 WMT_INFO_FUNC("Send Assert Command per 8 secs!!\n");
172 wmt_dbg_cmd_test_api(0);
173 osal_sleep_ms(sec
* 1000);
179 INT32
wmt_dbg_cmd_test_api(ENUM_WMTDRV_CMD_T cmd
)
182 P_OSAL_OP pOp
= NULL
;
183 MTK_WCN_BOOL bRet
= MTK_WCN_BOOL_FALSE
;
184 P_OSAL_SIGNAL pSignal
;
186 pOp
= wmt_lib_get_free_op();
188 WMT_WARN_FUNC("get_free_lxop fail\n");
189 return MTK_WCN_BOOL_FALSE
;
192 pSignal
= &pOp
->signal
;
194 pOp
->op
.opId
= WMT_OPID_CMD_TEST
;
196 pSignal
->timeoutValue
= MAX_EACH_WMT_CMD
;
197 /*this test command should be run with usb cable connected, so no host awake is needed */
198 /* wmt_lib_host_awake_get(); */
199 wmt_lib_set_host_assert_info(WMTDRV_TYPE_WMT
, 0, 1);
201 case WMTDRV_CMD_ASSERT
:
202 pOp
->op
.au4OpData
[0] = 0;
204 case WMTDRV_CMD_EXCEPTION
:
205 pOp
->op
.au4OpData
[0] = 1;
207 case WMTDRV_CMD_NOACK_TEST
:
208 pOp
->op
.au4OpData
[0] = 3;
210 case WMTDRV_CMD_WARMRST_TEST
:
211 pOp
->op
.au4OpData
[0] = 4;
213 case WMTDRV_CMD_FWTRACE_TEST
:
214 pOp
->op
.au4OpData
[0] = 5;
217 if (WMTDRV_CMD_COEXDBG_00
<= cmd
&& WMTDRV_CMD_COEXDBG_15
>= cmd
) {
218 pOp
->op
.au4OpData
[0] = 2;
219 pOp
->op
.au4OpData
[1] = cmd
- 2;
221 pOp
->op
.au4OpData
[0] = 0xff;
222 pOp
->op
.au4OpData
[1] = 0xff;
224 pOp
->op
.au4OpData
[2] = (size_t) gCoexBuf
.buffer
;
225 pOp
->op
.au4OpData
[3] = osal_sizeof(gCoexBuf
.buffer
);
228 WMT_INFO_FUNC("CMD_TEST, opid(%d), par(%d, %d)\n", pOp
->op
.opId
, pOp
->op
.au4OpData
[0],
229 pOp
->op
.au4OpData
[1]);
230 /*wake up chip first */
231 if (DISABLE_PSM_MONITOR()) {
232 WMT_ERR_FUNC("wake up failed\n");
233 wmt_lib_put_op_to_free_queue(pOp
);
236 bRet
= wmt_lib_put_act_op(pOp
);
237 ENABLE_PSM_MONITOR();
238 if ((cmd
!= WMTDRV_CMD_ASSERT
) &&
239 (cmd
!= WMTDRV_CMD_EXCEPTION
) &&
240 (cmd
!= WMTDRV_CMD_NOACK_TEST
) &&
241 (cmd
!= WMTDRV_CMD_WARMRST_TEST
) && (cmd
!= WMTDRV_CMD_FWTRACE_TEST
)) {
242 if (MTK_WCN_BOOL_FALSE
== bRet
) {
243 gCoexBuf
.availSize
= 0;
245 gCoexBuf
.availSize
= pOp
->op
.au4OpData
[3];
246 WMT_INFO_FUNC("gCoexBuf.availSize = %d\n", gCoexBuf
.availSize
);
249 /* wmt_lib_host_awake_put(); */
250 WMT_INFO_FUNC("CMD_TEST, opid (%d), par(%d, %d), ret(%d), result(%s)\n",
252 pOp
->op
.au4OpData
[0],
253 pOp
->op
.au4OpData
[1],
254 bRet
, MTK_WCN_BOOL_FALSE
== bRet
? "failed" : "succeed");
259 INT32
wmt_dbg_inband_rst(INT32 par1
, INT32 par2
, INT32 par3
)
262 WMT_INFO_FUNC("inband reset test!!\n");
263 mtk_wcn_stp_inband_reset();
265 WMT_INFO_FUNC("STP context reset in host side!!\n");
266 mtk_wcn_stp_flush_context();
272 INT32
wmt_dbg_chip_rst(INT32 par1
, INT32 par2
, INT32 par3
)
275 if (mtk_wcn_stp_is_ready()) {
276 WMT_INFO_FUNC("whole chip reset test\n");
277 wmt_lib_cmb_rst(WMTRSTSRC_RESET_TEST
);
279 WMT_INFO_FUNC("STP not ready , not to launch whole chip reset test\n");
281 } else if (1 == par2
) {
282 WMT_INFO_FUNC("chip hardware reset test\n");
285 WMT_INFO_FUNC("chip software reset test\n");
291 INT32
wmt_dbg_func_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
293 if (WMTDRV_TYPE_WMT
> par2
|| WMTDRV_TYPE_LPBK
== par2
) {
295 WMT_INFO_FUNC("function off test, type(%d)\n", par2
);
296 mtk_wcn_wmt_func_off(par2
);
298 WMT_INFO_FUNC("function on test, type(%d)\n", par2
);
299 mtk_wcn_wmt_func_on(par2
);
302 WMT_INFO_FUNC("function ctrl test, invalid type(%d)\n", par2
);
307 INT32
wmt_dbg_raed_chipid(INT32 par1
, INT32 par2
, INT32 par3
)
309 WMT_INFO_FUNC("chip version = %d\n", wmt_lib_get_icinfo(WMTCHIN_MAPPINGHWVER
));
313 INT32
wmt_dbg_wmt_dbg_level(INT32 par1
, INT32 par2
, INT32 par3
)
315 par2
= (WMT_LOG_ERR
<= par2
&& WMT_LOG_LOUD
>= par2
) ? par2
: WMT_LOG_INFO
;
316 wmt_lib_dbg_level_set(par2
);
317 WMT_INFO_FUNC("set wmt log level to %d\n", par2
);
321 INT32
wmt_dbg_stp_dbg_level(INT32 par1
, INT32 par2
, INT32 par3
)
323 par2
= (0 <= par2
&& 4 >= par2
) ? par2
: 2;
324 mtk_wcn_stp_dbg_level(par2
);
325 WMT_INFO_FUNC("set stp log level to %d\n", par2
);
330 INT32
wmt_dbg_reg_read(INT32 par1
, INT32 par2
, INT32 par3
)
332 /* par2-->register address */
333 /* par3-->register mask */
337 DISABLE_PSM_MONITOR();
338 iRet
= wmt_core_reg_rw_raw(0, par2
, &value
, par3
);
339 ENABLE_PSM_MONITOR();
341 iRet
= wmt_lib_reg_rw(0, par2
, &value
, par3
);
342 WMT_INFO_FUNC("read combo chip register (0x%08x) with mask (0x%08x) %s, value = 0x%08x\n",
343 par2
, par3
, iRet
!= 0 ? "failed" : "succeed", iRet
!= 0 ? -1 : value
);
347 INT32
wmt_dbg_reg_write(INT32 par1
, INT32 par2
, INT32 par3
)
349 /* par2-->register address */
350 /* par3-->value to set */
353 DISABLE_PSM_MONITOR();
354 iRet
= wmt_core_reg_rw_raw(1, par2
, &par3
, 0xffffffff);
355 ENABLE_PSM_MONITOR();
357 iRet
= wmt_lib_reg_rw(1, par2
, &par3
, 0xffffffff);
358 WMT_INFO_FUNC("write combo chip register (0x%08x) with value (0x%08x) %s\n",
359 par2
, par3
, iRet
!= 0 ? "failed" : "succeed");
363 INT32
wmt_dbg_efuse_read(INT32 par1
, INT32 par2
, INT32 par3
)
365 /* par2-->efuse address */
366 /* par3-->register mask */
370 iRet
= wmt_lib_efuse_rw(0, par2
, &value
, par3
);
371 WMT_INFO_FUNC("read combo chip efuse (0x%08x) with mask (0x%08x) %s, value = 0x%08x\n",
372 par2
, par3
, iRet
!= 0 ? "failed" : "succeed", iRet
!= 0 ? -1 : value
);
376 INT32
wmt_dbg_efuse_write(INT32 par1
, INT32 par2
, INT32 par3
)
378 /* par2-->efuse address */
379 /* par3-->value to set */
381 iRet
= wmt_lib_efuse_rw(1, par2
, &par3
, 0xffffffff);
382 WMT_INFO_FUNC("write combo chip efuse (0x%08x) with value (0x%08x) %s\n",
383 par2
, par3
, iRet
!= 0 ? "failed" : "succeed");
388 INT32
wmt_dbg_sdio_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
391 iRet
= wmt_lib_sdio_ctrl(0 != par2
? 1 : 0);
392 WMT_INFO_FUNC("ctrl SDIO function %s\n", 0 == iRet
? "succeed" : "failed");
397 INT32
wmt_dbg_stp_dbg_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
400 mtk_wcn_stp_dbg_dump_package();
403 WMT_INFO_FUNC("%s stp debug function\n", 0 == par2
? "disable" : "enable");
405 mtk_wcn_stp_dbg_disable();
406 } else if (1 == par2
) {
407 mtk_wcn_stp_dbg_enable();
412 INT32
wmt_dbg_stp_dbg_log_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
414 mtk_wcn_stp_dbg_log_ctrl(0 != par2
? 1 : 0);
420 INT32
wmt_dbg_wmt_assert_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
422 mtk_wcn_stp_coredump_flag_ctrl(0 != par2
? 1 : 0);
426 INT32
wmt_dbg_stp_trigger_assert(INT32 par1
, INT32 par2
, INT32 par3
)
428 wmt_lib_btm_cb(BTM_TRIGGER_STP_ASSERT_OP
);
432 static INT32
wmt_dbg_ap_reg_read(INT32 par1
, INT32 par2
, INT32 par3
)
434 unsigned long value
= 0x0;
435 WMT_INFO_FUNC("AP register read, reg address:0x%x\n", par2
);
436 value
= *((volatile unsigned long *)(unsigned long)par2
);
437 WMT_INFO_FUNC("AP register read, reg address:0x%x, value:0x%x\n", par2
, value
);
442 static INT32
wmt_dbg_ap_reg_write(INT32 par1
, INT32 par2
, INT32 par3
)
444 unsigned long value
= 0x0;
445 WMT_INFO_FUNC("AP register write, reg address:0x%x, value:0x%x\n", par2
, par3
);
447 *((volatile unsigned long *)(unsigned long)par2
) = (UINT32
) par3
;
449 value
= *((volatile unsigned long *)(unsigned long)par2
);
450 WMT_INFO_FUNC("AP register write done, value after write:0x%x\n", value
);
456 INT32
wmt_dbg_coex_test(INT32 par1
, INT32 par2
, INT32 par3
)
458 WMT_INFO_FUNC("coexistance test cmd!!\n");
459 return wmt_dbg_cmd_test_api(par2
+ WMTDRV_CMD_COEXDBG_00
);
462 INT32
wmt_dbg_rst_ctrl(INT32 par1
, INT32 par2
, INT32 par3
)
464 WMT_INFO_FUNC("%s audo rst\n", 0 == par2
? "disable" : "enable");
465 mtk_wcn_stp_set_auto_rst(0 == par2
? 0 : 1);
470 #if CFG_WMT_LTE_COEX_HANDLING
471 static INT32
wmt_dbg_lte_to_wmt_test(UINT32 opcode
, UINT32 msg_len
)
474 local_para_struct
*p_buf_str
;
477 WMT_INFO_FUNC("opcode(0x%02x),msg_len(%d)\n", opcode
, msg_len
);
478 p_buf_str
= osal_malloc(osal_sizeof(local_para_struct
) + msg_len
);
479 if (NULL
== p_buf_str
) {
480 WMT_ERR_FUNC("kmalloc for local para ptr structure failed.\n");
483 p_buf_str
->msg_len
= msg_len
;
484 for (i
= 0; i
< msg_len
; i
++)
485 p_buf_str
->data
[i
] = i
;
487 ilm
.local_para_ptr
= p_buf_str
;
490 iRet
= wmt_lib_handle_idc_msg(&ilm
);
491 osal_free(p_buf_str
);
496 static INT32
wmt_dbg_lte_coex_test(INT32 par1
, INT32 par2
, INT32 par3
)
498 UINT8 local_buffer
[512] = { 0 };
502 static UINT8 wmt_to_lte_test_evt1
[] = { 0x02, 0x16, 0x0d, 0x00,
503 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
506 static UINT8 wmt_to_lte_test_evt2
[] = { 0x02, 0x16, 0x09, 0x00,
507 0x01, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
509 static UINT8 wmt_to_lte_test_evt3
[] = { 0x02, 0x16, 0x02, 0x00,
512 static UINT8 wmt_to_lte_test_evt4
[] = { 0x02, 0x16, 0x0d, 0x00,
513 0x03, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
519 wmt_idc_msg_to_lte_handing_for_test(&wmt_to_lte_test_evt1
[0],
520 osal_sizeof(wmt_to_lte_test_evt1
));
521 if (handle_len
!= osal_sizeof(wmt_to_lte_test_evt1
)) {
523 ("par2=1,wmt send to lte msg fail:handle_len(%d),buff_len(%d)\n",
524 handle_len
, osal_sizeof(wmt_to_lte_test_evt1
));
526 WMT_INFO_FUNC("par2=1,wmt send to lte msg OK! send_len(%d)\n", handle_len
);
530 osal_memcpy(&local_buffer
[0], &wmt_to_lte_test_evt1
[0],
531 osal_sizeof(wmt_to_lte_test_evt1
));
532 osal_memcpy(&local_buffer
[osal_sizeof(wmt_to_lte_test_evt1
)],
533 &wmt_to_lte_test_evt2
[0], osal_sizeof(wmt_to_lte_test_evt2
));
536 wmt_idc_msg_to_lte_handing_for_test(&local_buffer
[0],
537 osal_sizeof(wmt_to_lte_test_evt1
) +
538 osal_sizeof(wmt_to_lte_test_evt2
));
540 osal_sizeof(wmt_to_lte_test_evt1
) + osal_sizeof(wmt_to_lte_test_evt2
)) {
542 ("par2=2,wmt send to lte msg fail:handle_len(%d),buff_len(%d)\n",
544 osal_sizeof(wmt_to_lte_test_evt1
) + osal_sizeof(wmt_to_lte_test_evt2
));
546 WMT_INFO_FUNC("par2=1,wmt send to lte msg OK! send_len(%d)\n", handle_len
);
550 osal_memcpy(&local_buffer
[0], &wmt_to_lte_test_evt1
[0],
551 osal_sizeof(wmt_to_lte_test_evt1
));
552 osal_memcpy(&local_buffer
[osal_sizeof(wmt_to_lte_test_evt1
)],
553 &wmt_to_lte_test_evt2
[0], osal_sizeof(wmt_to_lte_test_evt2
));
554 osal_memcpy(&local_buffer
555 [osal_sizeof(wmt_to_lte_test_evt1
) + osal_sizeof(wmt_to_lte_test_evt2
)],
556 &wmt_to_lte_test_evt3
[0], osal_sizeof(wmt_to_lte_test_evt3
));
559 wmt_idc_msg_to_lte_handing_for_test(&local_buffer
[0],
560 osal_sizeof(wmt_to_lte_test_evt1
) +
561 osal_sizeof(wmt_to_lte_test_evt2
) +
562 osal_sizeof(wmt_to_lte_test_evt3
));
564 osal_sizeof(wmt_to_lte_test_evt1
) + osal_sizeof(wmt_to_lte_test_evt2
) +
565 osal_sizeof(wmt_to_lte_test_evt3
)) {
567 ("par2=3,wmt send to lte msg fail:handle_len(%d),buff_len(%d)\n",
569 osal_sizeof(wmt_to_lte_test_evt1
) + osal_sizeof(wmt_to_lte_test_evt2
) +
570 osal_sizeof(wmt_to_lte_test_evt3
));
572 WMT_INFO_FUNC("par3=1,wmt send to lte msg OK! send_len(%d)\n", handle_len
);
577 wmt_idc_msg_to_lte_handing_for_test(&wmt_to_lte_test_evt4
[0],
578 osal_sizeof(wmt_to_lte_test_evt4
));
579 if (handle_len
!= osal_sizeof(wmt_to_lte_test_evt4
)) {
581 ("par2=1,wmt send to lte msg fail:handle_len(%d),buff_len(%d)\n",
582 handle_len
, osal_sizeof(wmt_to_lte_test_evt4
));
584 WMT_INFO_FUNC("par2=1,wmt send to lte msg OK! send_len(%d)\n", handle_len
);
591 iRet
= wmt_dbg_lte_to_wmt_test(IPC_MSG_ID_EL1_LTE_DEFAULT_PARAM_IND
, par3
);
592 WMT_INFO_FUNC("IPC_MSG_ID_EL1_LTE_DEFAULT_PARAM_IND test result(%d)\n", iRet
);
598 iRet
= wmt_dbg_lte_to_wmt_test(IPC_MSG_ID_EL1_LTE_OPER_FREQ_PARAM_IND
, par3
);
599 WMT_INFO_FUNC("IPC_MSG_ID_EL1_LTE_OPER_FREQ_PARAM_IND test result(%d)\n", iRet
);
605 iRet
= wmt_dbg_lte_to_wmt_test(IPC_MSG_ID_EL1_WIFI_MAX_PWR_IND
, par3
);
606 WMT_INFO_FUNC("IPC_MSG_ID_EL1_WIFI_MAX_PWR_IND test result(%d)\n", iRet
);
612 iRet
= wmt_dbg_lte_to_wmt_test(IPC_MSG_ID_EL1_LTE_TX_IND
, par3
);
613 WMT_INFO_FUNC("IPC_MSG_ID_EL1_LTE_TX_IND test result(%d)\n", iRet
);
617 wmt_core_set_flag_for_test(1);
619 wmt_core_set_flag_for_test(0);
626 #if USE_NEW_PROC_FS_FLAG
627 ssize_t
wmt_dbg_read(struct file
*filp
, char __user
*buf
, size_t count
, loff_t
*f_pos
)
632 PINT8 warn_msg
= "no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n";
637 /*len = sprintf(page, "%d\n", g_psm_enable); */
638 if (gCoexBuf
.availSize
<= 0) {
640 ("no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n");
641 retval
= osal_strlen(warn_msg
) + 1;
642 if (count
< retval
) {
645 i_ret
= copy_to_user(buf
, warn_msg
, retval
);
647 WMT_ERR_FUNC("copy to buffer failed, ret:%d\n", retval
);
657 /*we do not check page buffer, because there are only 100 bytes in g_coex_buf, no reason page buffer is not enough, a bomb is placed here on unexpected condition */
659 WMT_INFO_FUNC("%d bytes avaliable\n", gCoexBuf
.availSize
);
661 ((osal_sizeof(msg_info
) >
662 count
? osal_sizeof(msg_info
) : count
) - 1) / 5;
664 if (max_num
> gCoexBuf
.availSize
) {
665 max_num
= gCoexBuf
.availSize
;
668 ("round to %d bytes due to local buffer size limitation\n",
673 for (i
= 0; i
< max_num
; i
++) {
674 len
+= osal_sprintf(msg_info
+ len
, "0x%02x ", gCoexBuf
.buffer
[i
]);
677 len
+= osal_sprintf(msg_info
+ len
, "\n");
680 i_ret
= copy_to_user(buf
, msg_info
, retval
);
682 WMT_ERR_FUNC("copy to buffer failed, ret:%d\n", retval
);
690 gCoexBuf
.availSize
= 0;
699 static INT32
wmt_dev_dbg_read(PINT8 page
, PPINT8 start
, off_t off
, INT32 count
, INT32
*eof
,
707 /*len = sprintf(page, "%d\n", g_psm_enable); */
708 if (gCoexBuf
.availSize
<= 0) {
710 ("no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n");
713 "no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n");
716 /*we do not check page buffer, because there are only 100 bytes in g_coex_buf, no reason page buffer is not enough, a bomb is placed here on unexpected condition */
717 for (i
= 0; i
< gCoexBuf
.availSize
; i
++) {
718 len
+= osal_sprintf(page
+ len
, "0x%02x ", gCoexBuf
.buffer
[i
]);
720 len
+= osal_sprintf(page
+ len
, "\n");
723 gCoexBuf
.availSize
= 0;
728 INT32
wmt_dbg_ut_test(INT32 par1
, INT32 par2
, INT32 par3
)
737 WMT_INFO_FUNC("#### UT WMT and STP Function On/Off .... %d\n", i
);
740 WMT_INFO_FUNC("#### BT On .... (%d, %d)\n", i
, j
);
741 iRet
= mtk_wcn_wmt_func_on(WMTDRV_TYPE_BT
);
742 if (iRet
== MTK_WCN_BOOL_FALSE
) {
745 WMT_INFO_FUNC("#### GPS On .... (%d, %d)\n", i
, j
);
746 iRet
= mtk_wcn_wmt_func_on(WMTDRV_TYPE_GPS
);
747 if (iRet
== MTK_WCN_BOOL_FALSE
) {
750 WMT_INFO_FUNC("#### FM On .... (%d, %d)\n", i
, j
);
751 iRet
= mtk_wcn_wmt_func_on(WMTDRV_TYPE_FM
);
752 if (iRet
== MTK_WCN_BOOL_FALSE
) {
755 WMT_INFO_FUNC("#### WIFI On .... (%d, %d)\n", i
, j
);
756 iRet
= mtk_wcn_wmt_func_on(WMTDRV_TYPE_WIFI
);
757 if (iRet
== MTK_WCN_BOOL_FALSE
) {
760 WMT_INFO_FUNC("#### ANT On .... (%d, %d)\n", i
, j
);
761 iRet
= mtk_wcn_wmt_func_on(WMTDRV_TYPE_ANT
);
762 if (iRet
== MTK_WCN_BOOL_FALSE
) {
765 WMT_INFO_FUNC("#### BT Off .... (%d, %d)\n", i
, j
);
766 iRet
= mtk_wcn_wmt_func_off(WMTDRV_TYPE_BT
);
767 if (iRet
== MTK_WCN_BOOL_FALSE
) {
770 WMT_INFO_FUNC("#### GPS Off ....(%d, %d)\n", i
, j
);
771 iRet
= mtk_wcn_wmt_func_off(WMTDRV_TYPE_GPS
);
772 if (iRet
== MTK_WCN_BOOL_FALSE
) {
775 WMT_INFO_FUNC("#### FM Off .... (%d, %d)\n", i
, j
);
776 iRet
= mtk_wcn_wmt_func_off(WMTDRV_TYPE_FM
);
777 if (iRet
== MTK_WCN_BOOL_FALSE
) {
780 WMT_INFO_FUNC("#### WIFI Off ....(%d, %d)\n", i
, j
);
781 iRet
= mtk_wcn_wmt_func_off(WMTDRV_TYPE_WIFI
);
782 if (iRet
== MTK_WCN_BOOL_FALSE
) {
785 WMT_INFO_FUNC("#### ANT Off ....(%d, %d)\n", i
, j
);
786 iRet
= mtk_wcn_wmt_func_off(WMTDRV_TYPE_ANT
);
787 if (iRet
== MTK_WCN_BOOL_FALSE
) {
791 if (iRet
== MTK_WCN_BOOL_FALSE
) {
795 if (iRet
== MTK_WCN_BOOL_FALSE
) {
796 WMT_INFO_FUNC("#### UT FAIL!!\n");
798 WMT_INFO_FUNC("#### UT PASS!!\n");
803 #if USE_NEW_PROC_FS_FLAG
804 ssize_t
wmt_dbg_write(struct file
*filp
, const char __user
*buffer
, size_t count
, loff_t
*f_pos
)
808 unsigned long len
= count
;
809 INT32 x
= 0, y
= 0, z
= 0;
811 PINT8 pDelimiter
= " \t";
813 WMT_INFO_FUNC("write parameter len = %d\n\r", (INT32
) len
);
814 if (len
>= osal_sizeof(buf
)) {
815 WMT_ERR_FUNC("input handling fail!\n");
816 len
= osal_sizeof(buf
) - 1;
820 if (copy_from_user(buf
, buffer
, len
)) {
824 WMT_INFO_FUNC("write parameter data = %s\n\r", buf
);
827 pToken
= osal_strsep(&pBuf
, pDelimiter
);
828 x
= NULL
!= pToken
? osal_strtol(pToken
, NULL
, 16) : 0;
830 pToken
= osal_strsep(&pBuf
, "\t\n ");
831 if (pToken
!= NULL
) {
832 y
= osal_strtol(pToken
, NULL
, 16);
833 WMT_INFO_FUNC("y = 0x%08x\n\r", y
);
836 /*efuse, register read write default value */
837 if (0x11 == x
|| 0x12 == x
|| 0x13 == x
) {
842 pToken
= osal_strsep(&pBuf
, "\t\n ");
843 if (pToken
!= NULL
) {
844 z
= osal_strtol(pToken
, NULL
, 16);
847 /*efuse, register read write default value */
848 if (0x11 == x
|| 0x12 == x
|| 0x13 == x
) {
853 WMT_INFO_FUNC("x(0x%08x), y(0x%08x), z(0x%08x)\n\r", x
, y
, z
);
855 if (osal_array_size(wmt_dev_dbg_func
) > x
&& NULL
!= wmt_dev_dbg_func
[x
]) {
856 (*wmt_dev_dbg_func
[x
]) (x
, y
, z
);
858 WMT_WARN_FUNC("no handler defined for command id(0x%08x)\n\r", x
);
865 static INT32
wmt_dev_dbg_write(struct file
*file
, const char *buffer
, unsigned long count
, void *data
)
870 unsigned long len
= count
;
871 INT32 x
= 0, y
= 0, z
= 0;
873 PINT8 pDelimiter
= " \t";
875 WMT_INFO_FUNC("write parameter len = %d\n\r", (INT32
) len
);
876 if (len
>= osal_sizeof(buf
)) {
877 WMT_ERR_FUNC("input handling fail!\n");
878 len
= osal_sizeof(buf
) - 1;
882 if (copy_from_user(buf
, buffer
, len
)) {
886 WMT_INFO_FUNC("write parameter data = %s\n\r", buf
);
889 pToken
= osal_strsep(&pBuf
, pDelimiter
);
890 x
= NULL
!= pToken
? osal_strtol(pToken
, NULL
, 16) : 0;
892 pToken
= osal_strsep(&pBuf
, "\t\n ");
893 if (pToken
!= NULL
) {
894 y
= osal_strtol(pToken
, NULL
, 16);
895 WMT_INFO_FUNC("y = 0x%08x\n\r", y
);
898 /*efuse, register read write default value */
899 if (0x11 == x
|| 0x12 == x
|| 0x13 == x
) {
904 pToken
= osal_strsep(&pBuf
, "\t\n ");
905 if (pToken
!= NULL
) {
906 z
= osal_strtol(pToken
, NULL
, 16);
909 /*efuse, register read write default value */
910 if (0x11 == x
|| 0x12 == x
|| 0x13 == x
) {
915 WMT_INFO_FUNC("x(0x%08x), y(0x%08x), z(0x%08x)\n\r", x
, y
, z
);
917 if (osal_array_size(wmt_dev_dbg_func
) > x
&& NULL
!= wmt_dev_dbg_func
[x
]) {
918 (*wmt_dev_dbg_func
[x
]) (x
, y
, z
);
920 WMT_WARN_FUNC("no handler defined for command id(0x%08x)\n\r", x
);
926 INT32
wmt_dev_dbg_setup(VOID
)
929 #if USE_NEW_PROC_FS_FLAG
930 gWmtDbgEntry
= proc_create(WMT_DBG_PROCNAME
, 0664, NULL
, &wmt_dbg_fops
);
931 if (gWmtDbgEntry
== NULL
) {
932 WMT_ERR_FUNC("Unable to create / wmt_aee proc entry\n\r");
937 gWmtDbgEntry
= create_proc_entry(WMT_DBG_PROCNAME
, 0664, NULL
);
938 if (gWmtDbgEntry
== NULL
) {
939 WMT_ERR_FUNC("Unable to create /proc entry\n\r");
942 gWmtDbgEntry
->read_proc
= wmt_dev_dbg_read
;
943 gWmtDbgEntry
->write_proc
= wmt_dev_dbg_write
;
949 INT32
wmt_dev_dbg_remove(VOID
)
951 #if USE_NEW_PROC_FS_FLAG
952 if (NULL
!= gWmtDbgEntry
) {
953 proc_remove(gWmtDbgEntry
);
957 if (NULL
!= gWmtDbgEntry
) {
958 remove_proc_entry(WMT_DBG_PROCNAME
, NULL
);
961 #if CFG_WMT_PS_SUPPORT