drivers/input/keyboard/tegra-kbc.c

   1 /*
   2  * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
   3  * keyboard controller
   4  *
   5  * Copyright (c) 2009-2011, NVIDIA Corporation.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/input.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/delay.h>
  27 #include <linux/io.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/of.h>
  30 #include <linux/of_device.h>
  31 #include <linux/clk.h>
  32 #include <linux/slab.h>
  33 #include <linux/input/matrix_keypad.h>
  34 #include <linux/clk/tegra.h>
  35 #include <linux/err.h>
  36
  37 #define KBC_MAX_KPENT   8
  38
  39 /* Maximum row/column supported by Tegra KBC yet  is 16x8 */
  40 #define KBC_MAX_GPIO    24
  41 /* Maximum keys supported by Tegra KBC yet is 16 x 8*/
  42 #define KBC_MAX_KEY     (16 * 8)
  43
  44 #define KBC_MAX_DEBOUNCE_CNT    0x3ffu
  45
  46 /* KBC row scan time and delay for beginning the row scan. */
  47 #define KBC_ROW_SCAN_TIME       16
  48 #define KBC_ROW_SCAN_DLY        5
  49
  50 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
  51 #define KBC_CYCLE_MS    32
  52
  53 /* KBC Registers */
  54
  55 /* KBC Control Register */
  56 #define KBC_CONTROL_0   0x0
  57 #define KBC_FIFO_TH_CNT_SHIFT(cnt)      (cnt << 14)
  58 #define KBC_DEBOUNCE_CNT_SHIFT(cnt)     (cnt << 4)
  59 #define KBC_CONTROL_FIFO_CNT_INT_EN     (1 << 3)
  60 #define KBC_CONTROL_KEYPRESS_INT_EN     (1 << 1)
  61 #define KBC_CONTROL_KBC_EN              (1 << 0)
  62
  63 /* KBC Interrupt Register */
  64 #define KBC_INT_0       0x4
  65 #define KBC_INT_FIFO_CNT_INT_STATUS     (1 << 2)
  66 #define KBC_INT_KEYPRESS_INT_STATUS     (1 << 0)
  67
  68 #define KBC_ROW_CFG0_0  0x8
  69 #define KBC_COL_CFG0_0  0x18
  70 #define KBC_TO_CNT_0    0x24
  71 #define KBC_INIT_DLY_0  0x28
  72 #define KBC_RPT_DLY_0   0x2c
  73 #define KBC_KP_ENT0_0   0x30
  74 #define KBC_KP_ENT1_0   0x34
  75 #define KBC_ROW0_MASK_0 0x38
  76
  77 #define KBC_ROW_SHIFT   3
  78
  79 enum tegra_pin_type {
  80         PIN_CFG_IGNORE,
  81         PIN_CFG_COL,
  82         PIN_CFG_ROW,
  83 };
  84
  85 /* Tegra KBC hw support */
  86 struct tegra_kbc_hw_support {
  87         int max_rows;
  88         int max_columns;
  89 };
  90
  91 struct tegra_kbc_pin_cfg {
  92         enum tegra_pin_type type;
  93         unsigned char num;
  94 };
  95
  96 struct tegra_kbc {
  97         struct device *dev;
  98         unsigned int debounce_cnt;
  99         unsigned int repeat_cnt;
 100         struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
 101         const struct matrix_keymap_data *keymap_data;
 102         bool wakeup;
 103         void __iomem *mmio;
 104         struct input_dev *idev;
 105         int irq;
 106         spinlock_t lock;
 107         unsigned int repoll_dly;
 108         unsigned long cp_dly_jiffies;
 109         unsigned int cp_to_wkup_dly;
 110         bool use_fn_map;
 111         bool use_ghost_filter;
 112         bool keypress_caused_wake;
 113         unsigned short keycode[KBC_MAX_KEY * 2];
 114         unsigned short current_keys[KBC_MAX_KPENT];
 115         unsigned int num_pressed_keys;
 116         u32 wakeup_key;
 117         struct timer_list timer;
 118         struct clk *clk;
 119         const struct tegra_kbc_hw_support *hw_support;
 120         int max_keys;
 121         int num_rows_and_columns;
 122 };
 123
 124 static void tegra_kbc_report_released_keys(struct input_dev *input,
 125                                            unsigned short old_keycodes[],
 126                                            unsigned int old_num_keys,
 127                                            unsigned short new_keycodes[],
 128                                            unsigned int new_num_keys)
 129 {
 130         unsigned int i, j;
 131
 132         for (i = 0; i < old_num_keys; i++) {
 133                 for (j = 0; j < new_num_keys; j++)
 134                         if (old_keycodes[i] == new_keycodes[j])
 135                                 break;
 136
 137                 if (j == new_num_keys)
 138                         input_report_key(input, old_keycodes[i], 0);
 139         }
 140 }
 141
 142 static void tegra_kbc_report_pressed_keys(struct input_dev *input,
 143                                           unsigned char scancodes[],
 144                                           unsigned short keycodes[],
 145                                           unsigned int num_pressed_keys)
 146 {
 147         unsigned int i;
 148
 149         for (i = 0; i < num_pressed_keys; i++) {
 150                 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
 151                 input_report_key(input, keycodes[i], 1);
 152         }
 153 }
 154
 155 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
 156 {
 157         unsigned char scancodes[KBC_MAX_KPENT];
 158         unsigned short keycodes[KBC_MAX_KPENT];
 159         u32 val = 0;
 160         unsigned int i;
 161         unsigned int num_down = 0;
 162         bool fn_keypress = false;
 163         bool key_in_same_row = false;
 164         bool key_in_same_col = false;
 165
 166         for (i = 0; i < KBC_MAX_KPENT; i++) {
 167                 if ((i % 4) == 0)
 168                         val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
 169
 170                 if (val & 0x80) {
 171                         unsigned int col = val & 0x07;
 172                         unsigned int row = (val >> 3) & 0x0f;
 173                         unsigned char scancode =
 174                                 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
 175
 176                         scancodes[num_down] = scancode;
 177                         keycodes[num_down] = kbc->keycode[scancode];
 178                         /* If driver uses Fn map, do not report the Fn key. */
 179                         if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
 180                                 fn_keypress = true;
 181                         else
 182                                 num_down++;
 183                 }
 184
 185                 val >>= 8;
 186         }
 187
 188         /*
 189          * Matrix keyboard designs are prone to keyboard ghosting.
 190          * Ghosting occurs if there are 3 keys such that -
 191          * any 2 of the 3 keys share a row, and any 2 of them share a column.
 192          * If so ignore the key presses for this iteration.
 193          */
 194         if (kbc->use_ghost_filter && num_down >= 3) {
 195                 for (i = 0; i < num_down; i++) {
 196                         unsigned int j;
 197                         u8 curr_col = scancodes[i] & 0x07;
 198                         u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
 199
 200                         /*
 201                          * Find 2 keys such that one key is in the same row
 202                          * and the other is in the same column as the i-th key.
 203                          */
 204                         for (j = i + 1; j < num_down; j++) {
 205                                 u8 col = scancodes[j] & 0x07;
 206                                 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
 207
 208                                 if (col == curr_col)
 209                                         key_in_same_col = true;
 210                                 if (row == curr_row)
 211                                         key_in_same_row = true;
 212                         }
 213                 }
 214         }
 215
 216         /*
 217          * If the platform uses Fn keymaps, translate keys on a Fn keypress.
 218          * Function keycodes are max_keys apart from the plain keycodes.
 219          */
 220         if (fn_keypress) {
 221                 for (i = 0; i < num_down; i++) {
 222                         scancodes[i] += kbc->max_keys;
 223                         keycodes[i] = kbc->keycode[scancodes[i]];
 224                 }
 225         }
 226
 227         /* Ignore the key presses for this iteration? */
 228         if (key_in_same_col && key_in_same_row)
 229                 return;
 230
 231         tegra_kbc_report_released_keys(kbc->idev,
 232                                        kbc->current_keys, kbc->num_pressed_keys,
 233                                        keycodes, num_down);
 234         tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
 235         input_sync(kbc->idev);
 236
 237         memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
 238         kbc->num_pressed_keys = num_down;
 239 }
 240
 241 static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
 242 {
 243         u32 val;
 244
 245         val = readl(kbc->mmio + KBC_CONTROL_0);
 246         if (enable)
 247                 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
 248         else
 249                 val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
 250         writel(val, kbc->mmio + KBC_CONTROL_0);
 251 }
 252
 253 static void tegra_kbc_keypress_timer(unsigned long data)
 254 {
 255         struct tegra_kbc *kbc = (struct tegra_kbc *)data;
 256         unsigned long flags;
 257         u32 val;
 258         unsigned int i;
 259
 260         spin_lock_irqsave(&kbc->lock, flags);
 261
 262         val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
 263         if (val) {
 264                 unsigned long dly;
 265
 266                 tegra_kbc_report_keys(kbc);
 267
 268                 /*
 269                  * If more than one keys are pressed we need not wait
 270                  * for the repoll delay.
 271                  */
 272                 dly = (val == 1) ? kbc->repoll_dly : 1;
 273                 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
 274         } else {
 275                 /* Release any pressed keys and exit the polling loop */
 276                 for (i = 0; i < kbc->num_pressed_keys; i++)
 277                         input_report_key(kbc->idev, kbc->current_keys[i], 0);
 278                 input_sync(kbc->idev);
 279
 280                 kbc->num_pressed_keys = 0;
 281
 282                 /* All keys are released so enable the keypress interrupt */
 283                 tegra_kbc_set_fifo_interrupt(kbc, true);
 284         }
 285
 286         spin_unlock_irqrestore(&kbc->lock, flags);
 287 }
 288
 289 static irqreturn_t tegra_kbc_isr(int irq, void *args)
 290 {
 291         struct tegra_kbc *kbc = args;
 292         unsigned long flags;
 293         u32 val;
 294
 295         spin_lock_irqsave(&kbc->lock, flags);
 296
 297         /*
 298          * Quickly bail out & reenable interrupts if the fifo threshold
 299          * count interrupt wasn't the interrupt source
 300          */
 301         val = readl(kbc->mmio + KBC_INT_0);
 302         writel(val, kbc->mmio + KBC_INT_0);
 303
 304         if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
 305                 /*
 306                  * Until all keys are released, defer further processing to
 307                  * the polling loop in tegra_kbc_keypress_timer.
 308                  */
 309                 tegra_kbc_set_fifo_interrupt(kbc, false);
 310                 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
 311         } else if (val & KBC_INT_KEYPRESS_INT_STATUS) {
 312                 /* We can be here only through system resume path */
 313                 kbc->keypress_caused_wake = true;
 314         }
 315
 316         spin_unlock_irqrestore(&kbc->lock, flags);
 317
 318         return IRQ_HANDLED;
 319 }
 320
 321 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
 322 {
 323         int i;
 324         unsigned int rst_val;
 325
 326         /* Either mask all keys or none. */
 327         rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
 328
 329         for (i = 0; i < kbc->hw_support->max_rows; i++)
 330                 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
 331 }
 332
 333 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
 334 {
 335         int i;
 336
 337         for (i = 0; i < KBC_MAX_GPIO; i++) {
 338                 u32 r_shft = 5 * (i % 6);
 339                 u32 c_shft = 4 * (i % 8);
 340                 u32 r_mask = 0x1f << r_shft;
 341                 u32 c_mask = 0x0f << c_shft;
 342                 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
 343                 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
 344                 u32 row_cfg = readl(kbc->mmio + r_offs);
 345                 u32 col_cfg = readl(kbc->mmio + c_offs);
 346
 347                 row_cfg &= ~r_mask;
 348                 col_cfg &= ~c_mask;
 349
 350                 switch (kbc->pin_cfg[i].type) {
 351                 case PIN_CFG_ROW:
 352                         row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft;
 353                         break;
 354
 355                 case PIN_CFG_COL:
 356                         col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft;
 357                         break;
 358
 359                 case PIN_CFG_IGNORE:
 360                         break;
 361                 }
 362
 363                 writel(row_cfg, kbc->mmio + r_offs);
 364                 writel(col_cfg, kbc->mmio + c_offs);
 365         }
 366 }
 367
 368 static int tegra_kbc_start(struct tegra_kbc *kbc)
 369 {
 370         unsigned int debounce_cnt;
 371         u32 val = 0;
 372
 373         clk_prepare_enable(kbc->clk);
 374
 375         /* Reset the KBC controller to clear all previous status.*/
 376         tegra_periph_reset_assert(kbc->clk);
 377         udelay(100);
 378         tegra_periph_reset_deassert(kbc->clk);
 379         udelay(100);
 380
 381         tegra_kbc_config_pins(kbc);
 382         tegra_kbc_setup_wakekeys(kbc, false);
 383
 384         writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
 385
 386         /* Keyboard debounce count is maximum of 12 bits. */
 387         debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
 388         val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
 389         val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
 390         val |= KBC_CONTROL_FIFO_CNT_INT_EN;  /* interrupt on FIFO threshold */
 391         val |= KBC_CONTROL_KBC_EN;     /* enable */
 392         writel(val, kbc->mmio + KBC_CONTROL_0);
 393
 394         /*
 395          * Compute the delay(ns) from interrupt mode to continuous polling
 396          * mode so the timer routine is scheduled appropriately.
 397          */
 398         val = readl(kbc->mmio + KBC_INIT_DLY_0);
 399         kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
 400
 401         kbc->num_pressed_keys = 0;
 402
 403         /*
 404          * Atomically clear out any remaining entries in the key FIFO
 405          * and enable keyboard interrupts.
 406          */
 407         while (1) {
 408                 val = readl(kbc->mmio + KBC_INT_0);
 409                 val >>= 4;
 410                 if (!val)
 411                         break;
 412
 413                 val = readl(kbc->mmio + KBC_KP_ENT0_0);
 414                 val = readl(kbc->mmio + KBC_KP_ENT1_0);
 415         }
 416         writel(0x7, kbc->mmio + KBC_INT_0);
 417
 418         enable_irq(kbc->irq);
 419
 420         return 0;
 421 }
 422
 423 static void tegra_kbc_stop(struct tegra_kbc *kbc)
 424 {
 425         unsigned long flags;
 426         u32 val;
 427
 428         spin_lock_irqsave(&kbc->lock, flags);
 429         val = readl(kbc->mmio + KBC_CONTROL_0);
 430         val &= ~1;
 431         writel(val, kbc->mmio + KBC_CONTROL_0);
 432         spin_unlock_irqrestore(&kbc->lock, flags);
 433
 434         disable_irq(kbc->irq);
 435         del_timer_sync(&kbc->timer);
 436
 437         clk_disable_unprepare(kbc->clk);
 438 }
 439
 440 static int tegra_kbc_open(struct input_dev *dev)
 441 {
 442         struct tegra_kbc *kbc = input_get_drvdata(dev);
 443
 444         return tegra_kbc_start(kbc);
 445 }
 446
 447 static void tegra_kbc_close(struct input_dev *dev)
 448 {
 449         struct tegra_kbc *kbc = input_get_drvdata(dev);
 450
 451         return tegra_kbc_stop(kbc);
 452 }
 453
 454 static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
 455                                         unsigned int *num_rows)
 456 {
 457         int i;
 458
 459         *num_rows = 0;
 460
 461         for (i = 0; i < KBC_MAX_GPIO; i++) {
 462                 const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i];
 463
 464                 switch (pin_cfg->type) {
 465                 case PIN_CFG_ROW:
 466                         if (pin_cfg->num >= kbc->hw_support->max_rows) {
 467                                 dev_err(kbc->dev,
 468                                         "pin_cfg[%d]: invalid row number %d\n",
 469                                         i, pin_cfg->num);
 470                                 return false;
 471                         }
 472                         (*num_rows)++;
 473                         break;
 474
 475                 case PIN_CFG_COL:
 476                         if (pin_cfg->num >= kbc->hw_support->max_columns) {
 477                                 dev_err(kbc->dev,
 478                                         "pin_cfg[%d]: invalid column number %d\n",
 479                                         i, pin_cfg->num);
 480                                 return false;
 481                         }
 482                         break;
 483
 484                 case PIN_CFG_IGNORE:
 485                         break;
 486
 487                 default:
 488                         dev_err(kbc->dev,
 489                                 "pin_cfg[%d]: invalid entry type %d\n",
 490                                 pin_cfg->type, pin_cfg->num);
 491                         return false;
 492                 }
 493         }
 494
 495         return true;
 496 }
 497
 498 static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
 499 {
 500         struct device_node *np = kbc->dev->of_node;
 501         u32 prop;
 502         int i;
 503         u32 num_rows = 0;
 504         u32 num_cols = 0;
 505         u32 cols_cfg[KBC_MAX_GPIO];
 506         u32 rows_cfg[KBC_MAX_GPIO];
 507         int proplen;
 508         int ret;
 509
 510         if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop))
 511                 kbc->debounce_cnt = prop;
 512
 513         if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop))
 514                 kbc->repeat_cnt = prop;
 515
 516         if (of_find_property(np, "nvidia,needs-ghost-filter", NULL))
 517                 kbc->use_ghost_filter = true;
 518
 519         if (of_find_property(np, "nvidia,wakeup-source", NULL))
 520                 kbc->wakeup = true;
 521
 522         if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) {
 523                 dev_err(kbc->dev, "property nvidia,kbc-row-pins not found\n");
 524                 return -ENOENT;
 525         }
 526         num_rows = proplen / sizeof(u32);
 527
 528         if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) {
 529                 dev_err(kbc->dev, "property nvidia,kbc-col-pins not found\n");
 530                 return -ENOENT;
 531         }
 532         num_cols = proplen / sizeof(u32);
 533
 534         if (num_rows > kbc->hw_support->max_rows) {
 535                 dev_err(kbc->dev,
 536                         "Number of rows is more than supported by hardware\n");
 537                 return -EINVAL;
 538         }
 539
 540         if (num_cols > kbc->hw_support->max_columns) {
 541                 dev_err(kbc->dev,
 542                         "Number of cols is more than supported by hardware\n");
 543                 return -EINVAL;
 544         }
 545
 546         if (!of_get_property(np, "linux,keymap", &proplen)) {
 547                 dev_err(kbc->dev, "property linux,keymap not found\n");
 548                 return -ENOENT;
 549         }
 550
 551         if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) {
 552                 dev_err(kbc->dev,
 553                         "keypad rows/columns not porperly specified\n");
 554                 return -EINVAL;
 555         }
 556
 557         /* Set all pins as non-configured */
 558         for (i = 0; i < kbc->num_rows_and_columns; i++)
 559                 kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
 560
 561         ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins",
 562                                 rows_cfg, num_rows);
 563         if (ret < 0) {
 564                 dev_err(kbc->dev, "Rows configurations are not proper\n");
 565                 return -EINVAL;
 566         }
 567
 568         ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins",
 569                                 cols_cfg, num_cols);
 570         if (ret < 0) {
 571                 dev_err(kbc->dev, "Cols configurations are not proper\n");
 572                 return -EINVAL;
 573         }
 574
 575         for (i = 0; i < num_rows; i++) {
 576                 kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW;
 577                 kbc->pin_cfg[rows_cfg[i]].num = i;
 578         }
 579
 580         for (i = 0; i < num_cols; i++) {
 581                 kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL;
 582                 kbc->pin_cfg[cols_cfg[i]].num = i;
 583         }
 584
 585         return 0;
 586 }
 587
 588 static const struct tegra_kbc_hw_support tegra20_kbc_hw_support = {
 589         .max_rows       = 16,
 590         .max_columns    = 8,
 591 };
 592
 593 static const struct tegra_kbc_hw_support tegra11_kbc_hw_support = {
 594         .max_rows       = 11,
 595         .max_columns    = 8,
 596 };
 597
 598 static const struct of_device_id tegra_kbc_of_match[] = {
 599         { .compatible = "nvidia,tegra114-kbc", .data = &tegra11_kbc_hw_support},
 600         { .compatible = "nvidia,tegra30-kbc", .data = &tegra20_kbc_hw_support},
 601         { .compatible = "nvidia,tegra20-kbc", .data = &tegra20_kbc_hw_support},
 602         { },
 603 };
 604 MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
 605
 606 static int tegra_kbc_probe(struct platform_device *pdev)
 607 {
 608         struct tegra_kbc *kbc;
 609         struct resource *res;
 610         int err;
 611         int num_rows = 0;
 612         unsigned int debounce_cnt;
 613         unsigned int scan_time_rows;
 614         unsigned int keymap_rows;
 615         const struct of_device_id *match;
 616
 617         match = of_match_device(of_match_ptr(tegra_kbc_of_match), &pdev->dev);
 618
 619         kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL);
 620         if (!kbc) {
 621                 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
 622                 return -ENOMEM;
 623         }
 624
 625         kbc->dev = &pdev->dev;
 626         kbc->hw_support = match->data;
 627         kbc->max_keys = kbc->hw_support->max_rows *
 628                                 kbc->hw_support->max_columns;
 629         kbc->num_rows_and_columns = kbc->hw_support->max_rows +
 630                                         kbc->hw_support->max_columns;
 631         keymap_rows = kbc->max_keys;
 632         spin_lock_init(&kbc->lock);
 633
 634         err = tegra_kbc_parse_dt(kbc);
 635         if (err)
 636                 return err;
 637
 638         if (!tegra_kbc_check_pin_cfg(kbc, &num_rows))
 639                 return -EINVAL;
 640
 641         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 642         if (!res) {
 643                 dev_err(&pdev->dev, "failed to get I/O memory\n");
 644                 return -ENXIO;
 645         }
 646
 647         kbc->irq = platform_get_irq(pdev, 0);
 648         if (kbc->irq < 0) {
 649                 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
 650                 return -ENXIO;
 651         }
 652
 653         kbc->idev = devm_input_allocate_device(&pdev->dev);
 654         if (!kbc->idev) {
 655                 dev_err(&pdev->dev, "failed to allocate input device\n");
 656                 return -ENOMEM;
 657         }
 658
 659         setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
 660
 661         kbc->mmio = devm_ioremap_resource(&pdev->dev, res);
 662         if (IS_ERR(kbc->mmio))
 663                 return PTR_ERR(kbc->mmio);
 664
 665         kbc->clk = devm_clk_get(&pdev->dev, NULL);
 666         if (IS_ERR(kbc->clk)) {
 667                 dev_err(&pdev->dev, "failed to get keyboard clock\n");
 668                 return PTR_ERR(kbc->clk);
 669         }
 670
 671         /*
 672          * The time delay between two consecutive reads of the FIFO is
 673          * the sum of the repeat time and the time taken for scanning
 674          * the rows. There is an additional delay before the row scanning
 675          * starts. The repoll delay is computed in milliseconds.
 676          */
 677         debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
 678         scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
 679         kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt;
 680         kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
 681
 682         kbc->idev->name = pdev->name;
 683         kbc->idev->id.bustype = BUS_HOST;
 684         kbc->idev->dev.parent = &pdev->dev;
 685         kbc->idev->open = tegra_kbc_open;
 686         kbc->idev->close = tegra_kbc_close;
 687
 688         if (kbc->keymap_data && kbc->use_fn_map)
 689                 keymap_rows *= 2;
 690
 691         err = matrix_keypad_build_keymap(kbc->keymap_data, NULL,
 692                                          keymap_rows,
 693                                          kbc->hw_support->max_columns,
 694                                          kbc->keycode, kbc->idev);
 695         if (err) {
 696                 dev_err(&pdev->dev, "failed to setup keymap\n");
 697                 return err;
 698         }
 699
 700         __set_bit(EV_REP, kbc->idev->evbit);
 701         input_set_capability(kbc->idev, EV_MSC, MSC_SCAN);
 702
 703         input_set_drvdata(kbc->idev, kbc);
 704
 705         err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr,
 706                           IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc);
 707         if (err) {
 708                 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
 709                 return err;
 710         }
 711
 712         disable_irq(kbc->irq);
 713
 714         err = input_register_device(kbc->idev);
 715         if (err) {
 716                 dev_err(&pdev->dev, "failed to register input device\n");
 717                 return err;
 718         }
 719
 720         platform_set_drvdata(pdev, kbc);
 721         device_init_wakeup(&pdev->dev, kbc->wakeup);
 722
 723         return 0;
 724 }
 725
 726 #ifdef CONFIG_PM_SLEEP
 727 static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable)
 728 {
 729         u32 val;
 730
 731         val = readl(kbc->mmio + KBC_CONTROL_0);
 732         if (enable)
 733                 val |= KBC_CONTROL_KEYPRESS_INT_EN;
 734         else
 735                 val &= ~KBC_CONTROL_KEYPRESS_INT_EN;
 736         writel(val, kbc->mmio + KBC_CONTROL_0);
 737 }
 738
 739 static int tegra_kbc_suspend(struct device *dev)
 740 {
 741         struct platform_device *pdev = to_platform_device(dev);
 742         struct tegra_kbc *kbc = platform_get_drvdata(pdev);
 743
 744         mutex_lock(&kbc->idev->mutex);
 745         if (device_may_wakeup(&pdev->dev)) {
 746                 disable_irq(kbc->irq);
 747                 del_timer_sync(&kbc->timer);
 748                 tegra_kbc_set_fifo_interrupt(kbc, false);
 749
 750                 /* Forcefully clear the interrupt status */
 751                 writel(0x7, kbc->mmio + KBC_INT_0);
 752                 /*
 753                  * Store the previous resident time of continuous polling mode.
 754                  * Force the keyboard into interrupt mode.
 755                  */
 756                 kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
 757                 writel(0, kbc->mmio + KBC_TO_CNT_0);
 758
 759                 tegra_kbc_setup_wakekeys(kbc, true);
 760                 msleep(30);
 761
 762                 kbc->keypress_caused_wake = false;
 763                 /* Enable keypress interrupt before going into suspend. */
 764                 tegra_kbc_set_keypress_interrupt(kbc, true);
 765                 enable_irq(kbc->irq);
 766                 enable_irq_wake(kbc->irq);
 767         } else {
 768                 if (kbc->idev->users)
 769                         tegra_kbc_stop(kbc);
 770         }
 771         mutex_unlock(&kbc->idev->mutex);
 772
 773         return 0;
 774 }
 775
 776 static int tegra_kbc_resume(struct device *dev)
 777 {
 778         struct platform_device *pdev = to_platform_device(dev);
 779         struct tegra_kbc *kbc = platform_get_drvdata(pdev);
 780         int err = 0;
 781
 782         mutex_lock(&kbc->idev->mutex);
 783         if (device_may_wakeup(&pdev->dev)) {
 784                 disable_irq_wake(kbc->irq);
 785                 tegra_kbc_setup_wakekeys(kbc, false);
 786                 /* We will use fifo interrupts for key detection. */
 787                 tegra_kbc_set_keypress_interrupt(kbc, false);
 788
 789                 /* Restore the resident time of continuous polling mode. */
 790                 writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
 791
 792                 tegra_kbc_set_fifo_interrupt(kbc, true);
 793
 794                 if (kbc->keypress_caused_wake && kbc->wakeup_key) {
 795                         /*
 796                          * We can't report events directly from the ISR
 797                          * because timekeeping is stopped when processing
 798                          * wakeup request and we get a nasty warning when
 799                          * we try to call do_gettimeofday() in evdev
 800                          * handler.
 801                          */
 802                         input_report_key(kbc->idev, kbc->wakeup_key, 1);
 803                         input_sync(kbc->idev);
 804                         input_report_key(kbc->idev, kbc->wakeup_key, 0);
 805                         input_sync(kbc->idev);
 806                 }
 807         } else {
 808                 if (kbc->idev->users)
 809                         err = tegra_kbc_start(kbc);
 810         }
 811         mutex_unlock(&kbc->idev->mutex);
 812
 813         return err;
 814 }
 815 #endif
 816
 817 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
 818
 819 static struct platform_driver tegra_kbc_driver = {
 820         .probe          = tegra_kbc_probe,
 821         .driver = {
 822                 .name   = "tegra-kbc",
 823                 .owner  = THIS_MODULE,
 824                 .pm     = &tegra_kbc_pm_ops,
 825                 .of_match_table = tegra_kbc_of_match,
 826         },
 827 };
 828 module_platform_driver(tegra_kbc_driver);
 829
 830 MODULE_LICENSE("GPL");
 831 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
 832 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
 833 MODULE_ALIAS("platform:tegra-kbc");