2 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/vmalloc.h>
38 #include <linux/delay.h>
39 #include <linux/idr.h>
42 #include "qib_common.h"
45 * min buffers we want to have per context, after driver
47 #define QIB_MIN_USER_CTXT_BUFCNT 7
49 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
50 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
51 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
54 * Number of ctxts we are configured to use (to allow for more pio
55 * buffers per ctxt, etc.) Zero means use chip value.
58 module_param_named(cfgctxts
, qib_cfgctxts
, ushort
, S_IRUGO
);
59 MODULE_PARM_DESC(cfgctxts
, "Set max number of contexts to use");
62 * If set, do not write to any regs if avoidable, hack to allow
63 * check for deranged default register values.
66 module_param_named(mini_init
, qib_mini_init
, ushort
, S_IRUGO
);
67 MODULE_PARM_DESC(mini_init
, "If set, do minimal diag init");
69 unsigned qib_n_krcv_queues
;
70 module_param_named(krcvqs
, qib_n_krcv_queues
, uint
, S_IRUGO
);
71 MODULE_PARM_DESC(krcvqs
, "number of kernel receive queues per IB port");
74 * qib_wc_pat parameter:
77 * If PAT initialization fails, code reverts back to MTRR
79 unsigned qib_wc_pat
= 1; /* default (1) is to use PAT, not MTRR */
80 module_param_named(wc_pat
, qib_wc_pat
, uint
, S_IRUGO
);
81 MODULE_PARM_DESC(wc_pat
, "enable write-combining via PAT mechanism");
83 struct workqueue_struct
*qib_wq
;
84 struct workqueue_struct
*qib_cq_wq
;
86 static void verify_interrupt(unsigned long);
88 static struct idr qib_unit_table
;
89 u32 qib_cpulist_count
;
90 unsigned long *qib_cpulist
;
92 /* set number of contexts we'll actually use */
93 void qib_set_ctxtcnt(struct qib_devdata
*dd
)
96 dd
->cfgctxts
= dd
->first_user_ctxt
+ num_online_cpus();
97 if (dd
->cfgctxts
> dd
->ctxtcnt
)
98 dd
->cfgctxts
= dd
->ctxtcnt
;
99 } else if (qib_cfgctxts
< dd
->num_pports
)
100 dd
->cfgctxts
= dd
->ctxtcnt
;
101 else if (qib_cfgctxts
<= dd
->ctxtcnt
)
102 dd
->cfgctxts
= qib_cfgctxts
;
104 dd
->cfgctxts
= dd
->ctxtcnt
;
108 * Common code for creating the receive context array.
110 int qib_create_ctxts(struct qib_devdata
*dd
)
116 * Allocate full ctxtcnt array, rather than just cfgctxts, because
117 * cleanup iterates across all possible ctxts.
119 dd
->rcd
= kzalloc(sizeof(*dd
->rcd
) * dd
->ctxtcnt
, GFP_KERNEL
);
121 qib_dev_err(dd
, "Unable to allocate ctxtdata array, "
127 /* create (one or more) kctxt */
128 for (i
= 0; i
< dd
->first_user_ctxt
; ++i
) {
129 struct qib_pportdata
*ppd
;
130 struct qib_ctxtdata
*rcd
;
132 if (dd
->skip_kctxt_mask
& (1 << i
))
135 ppd
= dd
->pport
+ (i
% dd
->num_pports
);
136 rcd
= qib_create_ctxtdata(ppd
, i
);
138 qib_dev_err(dd
, "Unable to allocate ctxtdata"
139 " for Kernel ctxt, failing\n");
143 rcd
->pkeys
[0] = QIB_DEFAULT_P_KEY
;
152 * Common code for user and kernel context setup.
154 struct qib_ctxtdata
*qib_create_ctxtdata(struct qib_pportdata
*ppd
, u32 ctxt
)
156 struct qib_devdata
*dd
= ppd
->dd
;
157 struct qib_ctxtdata
*rcd
;
159 rcd
= kzalloc(sizeof(*rcd
), GFP_KERNEL
);
161 INIT_LIST_HEAD(&rcd
->qp_wait_list
);
168 dd
->f_init_ctxt(rcd
);
171 * To avoid wasting a lot of memory, we allocate 32KB chunks
172 * of physically contiguous memory, advance through it until
173 * used up and then allocate more. Of course, we need
174 * memory to store those extra pointers, now. 32KB seems to
175 * be the most that is "safe" under memory pressure
176 * (creating large files and then copying them over
177 * NFS while doing lots of MPI jobs). The OOM killer can
178 * get invoked, even though we say we can sleep and this can
179 * cause significant system problems....
181 rcd
->rcvegrbuf_size
= 0x8000;
182 rcd
->rcvegrbufs_perchunk
=
183 rcd
->rcvegrbuf_size
/ dd
->rcvegrbufsize
;
184 rcd
->rcvegrbuf_chunks
= (rcd
->rcvegrcnt
+
185 rcd
->rcvegrbufs_perchunk
- 1) /
186 rcd
->rcvegrbufs_perchunk
;
192 * Common code for initializing the physical port structure.
194 void qib_init_pportdata(struct qib_pportdata
*ppd
, struct qib_devdata
*dd
,
198 ppd
->hw_pidx
= hw_pidx
;
199 ppd
->port
= port
; /* IB port number, not index */
201 spin_lock_init(&ppd
->sdma_lock
);
202 spin_lock_init(&ppd
->lflags_lock
);
203 init_waitqueue_head(&ppd
->state_wait
);
205 init_timer(&ppd
->symerr_clear_timer
);
206 ppd
->symerr_clear_timer
.function
= qib_clear_symerror_on_linkup
;
207 ppd
->symerr_clear_timer
.data
= (unsigned long)ppd
;
210 static int init_pioavailregs(struct qib_devdata
*dd
)
215 dd
->pioavailregs_dma
= dma_alloc_coherent(
216 &dd
->pcidev
->dev
, PAGE_SIZE
, &dd
->pioavailregs_phys
,
218 if (!dd
->pioavailregs_dma
) {
219 qib_dev_err(dd
, "failed to allocate PIOavail reg area "
226 * We really want L2 cache aligned, but for current CPUs of
227 * interest, they are the same.
229 status_page
= (u64
*)
230 ((char *) dd
->pioavailregs_dma
+
231 ((2 * L1_CACHE_BYTES
+
232 dd
->pioavregs
* sizeof(u64
)) & ~L1_CACHE_BYTES
));
233 /* device status comes first, for backwards compatibility */
234 dd
->devstatusp
= status_page
;
236 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
237 dd
->pport
[pidx
].statusp
= status_page
;
242 * Setup buffer to hold freeze and other messages, accessible to
243 * apps, following statusp. This is per-unit, not per port.
245 dd
->freezemsg
= (char *) status_page
;
247 /* length of msg buffer is "whatever is left" */
248 ret
= (char *) status_page
- (char *) dd
->pioavailregs_dma
;
249 dd
->freezelen
= PAGE_SIZE
- ret
;
258 * init_shadow_tids - allocate the shadow TID array
259 * @dd: the qlogic_ib device
261 * allocate the shadow TID array, so we can qib_munlock previous
262 * entries. It may make more sense to move the pageshadow to the
263 * ctxt data structure, so we only allocate memory for ctxts actually
264 * in use, since we at 8k per ctxt, now.
265 * We don't want failures here to prevent use of the driver/chip,
266 * so no return value.
268 static void init_shadow_tids(struct qib_devdata
*dd
)
273 pages
= vzalloc(dd
->cfgctxts
* dd
->rcvtidcnt
* sizeof(struct page
*));
275 qib_dev_err(dd
, "failed to allocate shadow page * "
276 "array, no expected sends!\n");
280 addrs
= vzalloc(dd
->cfgctxts
* dd
->rcvtidcnt
* sizeof(dma_addr_t
));
282 qib_dev_err(dd
, "failed to allocate shadow dma handle "
283 "array, no expected sends!\n");
287 dd
->pageshadow
= pages
;
288 dd
->physshadow
= addrs
;
294 dd
->pageshadow
= NULL
;
298 * Do initialization for device that is only needed on
299 * first detect, not on resets.
301 static int loadtime_init(struct qib_devdata
*dd
)
305 if (((dd
->revision
>> QLOGIC_IB_R_SOFTWARE_SHIFT
) &
306 QLOGIC_IB_R_SOFTWARE_MASK
) != QIB_CHIP_SWVERSION
) {
307 qib_dev_err(dd
, "Driver only handles version %d, "
308 "chip swversion is %d (%llx), failng\n",
310 (int)(dd
->revision
>>
311 QLOGIC_IB_R_SOFTWARE_SHIFT
) &
312 QLOGIC_IB_R_SOFTWARE_MASK
,
313 (unsigned long long) dd
->revision
);
318 if (dd
->revision
& QLOGIC_IB_R_EMULATOR_MASK
)
319 qib_devinfo(dd
->pcidev
, "%s", dd
->boardversion
);
321 spin_lock_init(&dd
->pioavail_lock
);
322 spin_lock_init(&dd
->sendctrl_lock
);
323 spin_lock_init(&dd
->uctxt_lock
);
324 spin_lock_init(&dd
->qib_diag_trans_lock
);
325 spin_lock_init(&dd
->eep_st_lock
);
326 mutex_init(&dd
->eep_lock
);
331 ret
= init_pioavailregs(dd
);
332 init_shadow_tids(dd
);
334 qib_get_eeprom_info(dd
);
336 /* setup time (don't start yet) to verify we got interrupt */
337 init_timer(&dd
->intrchk_timer
);
338 dd
->intrchk_timer
.function
= verify_interrupt
;
339 dd
->intrchk_timer
.data
= (unsigned long) dd
;
346 * init_after_reset - re-initialize after a reset
347 * @dd: the qlogic_ib device
349 * sanity check at least some of the values after reset, and
350 * ensure no receive or transmit (explictly, in case reset
353 static int init_after_reset(struct qib_devdata
*dd
)
358 * Ensure chip does no sends or receives, tail updates, or
359 * pioavail updates while we re-initialize. This is mostly
360 * for the driver data structures, not chip registers.
362 for (i
= 0; i
< dd
->num_pports
; ++i
) {
364 * ctxt == -1 means "all contexts". Only really safe for
365 * _dis_abling things, as here.
367 dd
->f_rcvctrl(dd
->pport
+ i
, QIB_RCVCTRL_CTXT_DIS
|
368 QIB_RCVCTRL_INTRAVAIL_DIS
|
369 QIB_RCVCTRL_TAILUPD_DIS
, -1);
370 /* Redundant across ports for some, but no big deal. */
371 dd
->f_sendctrl(dd
->pport
+ i
, QIB_SENDCTRL_SEND_DIS
|
372 QIB_SENDCTRL_AVAIL_DIS
);
378 static void enable_chip(struct qib_devdata
*dd
)
384 * Enable PIO send, and update of PIOavail regs to memory.
386 for (i
= 0; i
< dd
->num_pports
; ++i
)
387 dd
->f_sendctrl(dd
->pport
+ i
, QIB_SENDCTRL_SEND_ENB
|
388 QIB_SENDCTRL_AVAIL_ENB
);
390 * Enable kernel ctxts' receive and receive interrupt.
391 * Other ctxts done as user opens and inits them.
393 rcvmask
= QIB_RCVCTRL_CTXT_ENB
| QIB_RCVCTRL_INTRAVAIL_ENB
;
394 rcvmask
|= (dd
->flags
& QIB_NODMA_RTAIL
) ?
395 QIB_RCVCTRL_TAILUPD_DIS
: QIB_RCVCTRL_TAILUPD_ENB
;
396 for (i
= 0; dd
->rcd
&& i
< dd
->first_user_ctxt
; ++i
) {
397 struct qib_ctxtdata
*rcd
= dd
->rcd
[i
];
400 dd
->f_rcvctrl(rcd
->ppd
, rcvmask
, i
);
404 static void verify_interrupt(unsigned long opaque
)
406 struct qib_devdata
*dd
= (struct qib_devdata
*) opaque
;
409 return; /* being torn down */
412 * If we don't have a lid or any interrupts, let the user know and
413 * don't bother checking again.
415 if (dd
->int_counter
== 0) {
416 if (!dd
->f_intr_fallback(dd
))
417 dev_err(&dd
->pcidev
->dev
, "No interrupts detected, "
419 else /* re-arm the timer to see if fallback works */
420 mod_timer(&dd
->intrchk_timer
, jiffies
+ HZ
/2);
424 static void init_piobuf_state(struct qib_devdata
*dd
)
430 * Ensure all buffers are free, and fifos empty. Buffers
431 * are common, so only do once for port 0.
433 * After enable and qib_chg_pioavailkernel so we can safely
434 * enable pioavail updates and PIOENABLE. After this, packets
435 * are ready and able to go out.
437 dd
->f_sendctrl(dd
->pport
, QIB_SENDCTRL_DISARM_ALL
);
438 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
439 dd
->f_sendctrl(dd
->pport
+ pidx
, QIB_SENDCTRL_FLUSH
);
442 * If not all sendbufs are used, add the one to each of the lower
443 * numbered contexts. pbufsctxt and lastctxt_piobuf are
444 * calculated in chip-specific code because it may cause some
445 * chip-specific adjustments to be made.
447 uctxts
= dd
->cfgctxts
- dd
->first_user_ctxt
;
448 dd
->ctxts_extrabuf
= dd
->pbufsctxt
?
449 dd
->lastctxt_piobuf
- (dd
->pbufsctxt
* uctxts
) : 0;
452 * Set up the shadow copies of the piobufavail registers,
453 * which we compare against the chip registers for now, and
454 * the in memory DMA'ed copies of the registers.
455 * By now pioavail updates to memory should have occurred, so
456 * copy them into our working/shadow registers; this is in
457 * case something went wrong with abort, but mostly to get the
458 * initial values of the generation bit correct.
460 for (i
= 0; i
< dd
->pioavregs
; i
++) {
463 tmp
= dd
->pioavailregs_dma
[i
];
465 * Don't need to worry about pioavailkernel here
466 * because we will call qib_chg_pioavailkernel() later
467 * in initialization, to busy out buffers as needed.
469 dd
->pioavailshadow
[i
] = le64_to_cpu(tmp
);
471 while (i
< ARRAY_SIZE(dd
->pioavailshadow
))
472 dd
->pioavailshadow
[i
++] = 0; /* for debugging sanity */
474 /* after pioavailshadow is setup */
475 qib_chg_pioavailkernel(dd
, 0, dd
->piobcnt2k
+ dd
->piobcnt4k
,
476 TXCHK_CHG_TYPE_KERN
, NULL
);
477 dd
->f_initvl15_bufs(dd
);
481 * qib_init - do the actual initialization sequence on the chip
482 * @dd: the qlogic_ib device
483 * @reinit: reinitializing, so don't allocate new memory
485 * Do the actual initialization sequence on the chip. This is done
486 * both from the init routine called from the PCI infrastructure, and
487 * when we reset the chip, or detect that it was reset internally,
488 * or it's administratively re-enabled.
490 * Memory allocation here and in called routines is only done in
491 * the first case (reinit == 0). We have to be careful, because even
492 * without memory allocation, we need to re-write all the chip registers
493 * TIDs, etc. after the reset or enable has completed.
495 int qib_init(struct qib_devdata
*dd
, int reinit
)
497 int ret
= 0, pidx
, lastfail
= 0;
500 struct qib_ctxtdata
*rcd
;
501 struct qib_pportdata
*ppd
;
504 /* Set linkstate to unknown, so we can watch for a transition. */
505 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
506 ppd
= dd
->pport
+ pidx
;
507 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
508 ppd
->lflags
&= ~(QIBL_LINKACTIVE
| QIBL_LINKARMED
|
509 QIBL_LINKDOWN
| QIBL_LINKINIT
|
511 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
515 ret
= init_after_reset(dd
);
517 ret
= loadtime_init(dd
);
521 /* Bypass most chip-init, to get to device creation */
525 ret
= dd
->f_late_initreg(dd
);
529 /* dd->rcd can be NULL if early init failed */
530 for (i
= 0; dd
->rcd
&& i
< dd
->first_user_ctxt
; ++i
) {
532 * Set up the (kernel) rcvhdr queue and egr TIDs. If doing
533 * re-init, the simplest way to handle this is to free
534 * existing, and re-allocate.
535 * Need to re-create rest of ctxt 0 ctxtdata as well.
541 lastfail
= qib_create_rcvhdrq(dd
, rcd
);
543 lastfail
= qib_setup_eagerbufs(rcd
);
545 qib_dev_err(dd
, "failed to allocate kernel ctxt's "
546 "rcvhdrq and/or egr bufs\n");
551 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
555 ppd
= dd
->pport
+ pidx
;
556 mtu
= ib_mtu_enum_to_int(qib_ibmtu
);
558 mtu
= QIB_DEFAULT_MTU
;
559 qib_ibmtu
= 0; /* don't leave invalid value */
561 /* set max we can ever have for this driver load */
562 ppd
->init_ibmaxlen
= min(mtu
> 2048 ?
563 dd
->piosize4k
: dd
->piosize2k
,
565 (dd
->rcvhdrentsize
<< 2));
567 * Have to initialize ibmaxlen, but this will normally
568 * change immediately in qib_set_mtu().
570 ppd
->ibmaxlen
= ppd
->init_ibmaxlen
;
571 qib_set_mtu(ppd
, mtu
);
573 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
574 ppd
->lflags
|= QIBL_IB_LINK_DISABLED
;
575 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
577 lastfail
= dd
->f_bringup_serdes(ppd
);
579 qib_devinfo(dd
->pcidev
,
580 "Failed to bringup IB port %u\n", ppd
->port
);
581 lastfail
= -ENETDOWN
;
585 /* let link come up, and enable IBC */
586 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
587 ppd
->lflags
&= ~QIBL_IB_LINK_DISABLED
;
588 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
593 /* none of the ports initialized */
594 if (!ret
&& lastfail
)
598 /* but continue on, so we can debug cause */
603 init_piobuf_state(dd
);
607 /* chip is OK for user apps; mark it as initialized */
608 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
609 ppd
= dd
->pport
+ pidx
;
611 * Set status even if port serdes is not initialized
612 * so that diags will work.
614 *ppd
->statusp
|= QIB_STATUS_CHIP_PRESENT
|
616 if (!ppd
->link_speed_enabled
)
618 if (dd
->flags
& QIB_HAS_SEND_DMA
)
619 ret
= qib_setup_sdma(ppd
);
620 init_timer(&ppd
->hol_timer
);
621 ppd
->hol_timer
.function
= qib_hol_event
;
622 ppd
->hol_timer
.data
= (unsigned long)ppd
;
623 ppd
->hol_state
= QIB_HOL_UP
;
626 /* now we can enable all interrupts from the chip */
627 dd
->f_set_intr_state(dd
, 1);
630 * Setup to verify we get an interrupt, and fallback
631 * to an alternate if necessary and possible.
633 mod_timer(&dd
->intrchk_timer
, jiffies
+ HZ
/2);
634 /* start stats retrieval timer */
635 mod_timer(&dd
->stats_timer
, jiffies
+ HZ
* ACTIVITY_TIMER
);
638 /* if ret is non-zero, we probably should do some cleanup here... */
643 * These next two routines are placeholders in case we don't have per-arch
644 * code for controlling write combining. If explicit control of write
645 * combining is not available, performance will probably be awful.
648 int __attribute__((weak
)) qib_enable_wc(struct qib_devdata
*dd
)
653 void __attribute__((weak
)) qib_disable_wc(struct qib_devdata
*dd
)
657 static inline struct qib_devdata
*__qib_lookup(int unit
)
659 return idr_find(&qib_unit_table
, unit
);
662 struct qib_devdata
*qib_lookup(int unit
)
664 struct qib_devdata
*dd
;
667 spin_lock_irqsave(&qib_devs_lock
, flags
);
668 dd
= __qib_lookup(unit
);
669 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
675 * Stop the timers during unit shutdown, or after an error late
678 static void qib_stop_timers(struct qib_devdata
*dd
)
680 struct qib_pportdata
*ppd
;
683 if (dd
->stats_timer
.data
) {
684 del_timer_sync(&dd
->stats_timer
);
685 dd
->stats_timer
.data
= 0;
687 if (dd
->intrchk_timer
.data
) {
688 del_timer_sync(&dd
->intrchk_timer
);
689 dd
->intrchk_timer
.data
= 0;
691 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
692 ppd
= dd
->pport
+ pidx
;
693 if (ppd
->hol_timer
.data
)
694 del_timer_sync(&ppd
->hol_timer
);
695 if (ppd
->led_override_timer
.data
) {
696 del_timer_sync(&ppd
->led_override_timer
);
697 atomic_set(&ppd
->led_override_timer_active
, 0);
699 if (ppd
->symerr_clear_timer
.data
)
700 del_timer_sync(&ppd
->symerr_clear_timer
);
705 * qib_shutdown_device - shut down a device
706 * @dd: the qlogic_ib device
708 * This is called to make the device quiet when we are about to
709 * unload the driver, and also when the device is administratively
710 * disabled. It does not free any data structures.
711 * Everything it does has to be setup again by qib_init(dd, 1)
713 static void qib_shutdown_device(struct qib_devdata
*dd
)
715 struct qib_pportdata
*ppd
;
718 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
719 ppd
= dd
->pport
+ pidx
;
721 spin_lock_irq(&ppd
->lflags_lock
);
722 ppd
->lflags
&= ~(QIBL_LINKDOWN
| QIBL_LINKINIT
|
723 QIBL_LINKARMED
| QIBL_LINKACTIVE
|
725 spin_unlock_irq(&ppd
->lflags_lock
);
726 *ppd
->statusp
&= ~(QIB_STATUS_IB_CONF
| QIB_STATUS_IB_READY
);
728 dd
->flags
&= ~QIB_INITTED
;
730 /* mask interrupts, but not errors */
731 dd
->f_set_intr_state(dd
, 0);
733 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
734 ppd
= dd
->pport
+ pidx
;
735 dd
->f_rcvctrl(ppd
, QIB_RCVCTRL_TAILUPD_DIS
|
736 QIB_RCVCTRL_CTXT_DIS
|
737 QIB_RCVCTRL_INTRAVAIL_DIS
|
738 QIB_RCVCTRL_PKEY_ENB
, -1);
740 * Gracefully stop all sends allowing any in progress to
743 dd
->f_sendctrl(ppd
, QIB_SENDCTRL_CLEAR
);
747 * Enough for anything that's going to trickle out to have actually
752 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
753 ppd
= dd
->pport
+ pidx
;
754 dd
->f_setextled(ppd
, 0); /* make sure LEDs are off */
756 if (dd
->flags
& QIB_HAS_SEND_DMA
)
757 qib_teardown_sdma(ppd
);
759 dd
->f_sendctrl(ppd
, QIB_SENDCTRL_AVAIL_DIS
|
760 QIB_SENDCTRL_SEND_DIS
);
762 * Clear SerdesEnable.
763 * We can't count on interrupts since we are stopping.
765 dd
->f_quiet_serdes(ppd
);
768 qib_update_eeprom_log(dd
);
772 * qib_free_ctxtdata - free a context's allocated data
773 * @dd: the qlogic_ib device
774 * @rcd: the ctxtdata structure
776 * free up any allocated data for a context
777 * This should not touch anything that would affect a simultaneous
778 * re-allocation of context data, because it is called after qib_mutex
779 * is released (and can be called from reinit as well).
780 * It should never change any chip state, or global driver state.
782 void qib_free_ctxtdata(struct qib_devdata
*dd
, struct qib_ctxtdata
*rcd
)
788 dma_free_coherent(&dd
->pcidev
->dev
, rcd
->rcvhdrq_size
,
789 rcd
->rcvhdrq
, rcd
->rcvhdrq_phys
);
791 if (rcd
->rcvhdrtail_kvaddr
) {
792 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
793 rcd
->rcvhdrtail_kvaddr
,
794 rcd
->rcvhdrqtailaddr_phys
);
795 rcd
->rcvhdrtail_kvaddr
= NULL
;
798 if (rcd
->rcvegrbuf
) {
801 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
; e
++) {
802 void *base
= rcd
->rcvegrbuf
[e
];
803 size_t size
= rcd
->rcvegrbuf_size
;
805 dma_free_coherent(&dd
->pcidev
->dev
, size
,
806 base
, rcd
->rcvegrbuf_phys
[e
]);
808 kfree(rcd
->rcvegrbuf
);
809 rcd
->rcvegrbuf
= NULL
;
810 kfree(rcd
->rcvegrbuf_phys
);
811 rcd
->rcvegrbuf_phys
= NULL
;
812 rcd
->rcvegrbuf_chunks
= 0;
815 kfree(rcd
->tid_pg_list
);
816 vfree(rcd
->user_event_mask
);
817 vfree(rcd
->subctxt_uregbase
);
818 vfree(rcd
->subctxt_rcvegrbuf
);
819 vfree(rcd
->subctxt_rcvhdr_base
);
824 * Perform a PIO buffer bandwidth write test, to verify proper system
825 * configuration. Even when all the setup calls work, occasionally
826 * BIOS or other issues can prevent write combining from working, or
827 * can cause other bandwidth problems to the chip.
829 * This test simply writes the same buffer over and over again, and
830 * measures close to the peak bandwidth to the chip (not testing
831 * data bandwidth to the wire). On chips that use an address-based
832 * trigger to send packets to the wire, this is easy. On chips that
833 * use a count to trigger, we want to make sure that the packet doesn't
834 * go out on the wire, or trigger flow control checks.
836 static void qib_verify_pioperf(struct qib_devdata
*dd
)
838 u32 pbnum
, cnt
, lcnt
;
843 piobuf
= dd
->f_getsendbuf(dd
->pport
, 0ULL, &pbnum
);
845 qib_devinfo(dd
->pcidev
,
846 "No PIObufs for checking perf, skipping\n");
851 * Enough to give us a reasonable test, less than piobuf size, and
852 * likely multiple of store buffer length.
858 qib_devinfo(dd
->pcidev
,
859 "Couldn't get memory for checking PIO perf,"
864 preempt_disable(); /* we want reasonably accurate elapsed time */
865 msecs
= 1 + jiffies_to_msecs(jiffies
);
866 for (lcnt
= 0; lcnt
< 10000U; lcnt
++) {
867 /* wait until we cross msec boundary */
868 if (jiffies_to_msecs(jiffies
) >= msecs
)
873 dd
->f_set_armlaunch(dd
, 0);
876 * length 0, no dwords actually sent
882 * This is only roughly accurate, since even with preempt we
883 * still take interrupts that could take a while. Running for
884 * >= 5 msec seems to get us "close enough" to accurate values.
886 msecs
= jiffies_to_msecs(jiffies
);
887 for (emsecs
= lcnt
= 0; emsecs
<= 5UL; lcnt
++) {
888 qib_pio_copy(piobuf
+ 64, addr
, cnt
>> 2);
889 emsecs
= jiffies_to_msecs(jiffies
) - msecs
;
892 /* 1 GiB/sec, slightly over IB SDR line rate */
893 if (lcnt
< (emsecs
* 1024U))
895 "Performance problem: bandwidth to PIO buffers is "
897 lcnt
/ (u32
) emsecs
);
904 /* disarm piobuf, so it's available again */
905 dd
->f_sendctrl(dd
->pport
, QIB_SENDCTRL_DISARM_BUF(pbnum
));
906 qib_sendbuf_done(dd
, pbnum
);
907 dd
->f_set_armlaunch(dd
, 1);
911 void qib_free_devdata(struct qib_devdata
*dd
)
915 spin_lock_irqsave(&qib_devs_lock
, flags
);
916 idr_remove(&qib_unit_table
, dd
->unit
);
918 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
920 ib_dealloc_device(&dd
->verbs_dev
.ibdev
);
924 * Allocate our primary per-unit data structure. Must be done via verbs
925 * allocator, because the verbs cleanup process both does cleanup and
926 * free of the data structure.
927 * "extra" is for chip-specific data.
929 * Use the idr mechanism to get a unit number for this unit.
931 struct qib_devdata
*qib_alloc_devdata(struct pci_dev
*pdev
, size_t extra
)
934 struct qib_devdata
*dd
;
937 if (!idr_pre_get(&qib_unit_table
, GFP_KERNEL
)) {
938 dd
= ERR_PTR(-ENOMEM
);
942 dd
= (struct qib_devdata
*) ib_alloc_device(sizeof(*dd
) + extra
);
944 dd
= ERR_PTR(-ENOMEM
);
948 spin_lock_irqsave(&qib_devs_lock
, flags
);
949 ret
= idr_get_new(&qib_unit_table
, dd
, &dd
->unit
);
951 list_add(&dd
->list
, &qib_dev_list
);
952 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
955 qib_early_err(&pdev
->dev
,
956 "Could not allocate unit ID: error %d\n", -ret
);
957 ib_dealloc_device(&dd
->verbs_dev
.ibdev
);
962 if (!qib_cpulist_count
) {
963 u32 count
= num_online_cpus();
964 qib_cpulist
= kzalloc(BITS_TO_LONGS(count
) *
965 sizeof(long), GFP_KERNEL
);
967 qib_cpulist_count
= count
;
969 qib_early_err(&pdev
->dev
, "Could not alloc cpulist "
970 "info, cpu affinity might be wrong\n");
978 * Called from freeze mode handlers, and from PCI error
979 * reporting code. Should be paranoid about state of
980 * system and data structures.
982 void qib_disable_after_error(struct qib_devdata
*dd
)
984 if (dd
->flags
& QIB_INITTED
) {
987 dd
->flags
&= ~QIB_INITTED
;
989 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
990 struct qib_pportdata
*ppd
;
992 ppd
= dd
->pport
+ pidx
;
993 if (dd
->flags
& QIB_PRESENT
) {
994 qib_set_linkstate(ppd
,
995 QIB_IB_LINKDOWN_DISABLE
);
996 dd
->f_setextled(ppd
, 0);
998 *ppd
->statusp
&= ~QIB_STATUS_IB_READY
;
1003 * Mark as having had an error for driver, and also
1004 * for /sys and status word mapped to user programs.
1005 * This marks unit as not usable, until reset.
1008 *dd
->devstatusp
|= QIB_STATUS_HWERROR
;
1011 static void __devexit
qib_remove_one(struct pci_dev
*);
1012 static int __devinit
qib_init_one(struct pci_dev
*,
1013 const struct pci_device_id
*);
1015 #define DRIVER_LOAD_MSG "QLogic " QIB_DRV_NAME " loaded: "
1016 #define PFX QIB_DRV_NAME ": "
1018 static const struct pci_device_id qib_pci_tbl
[] = {
1019 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_QLOGIC_IB_6120
) },
1020 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_IB_7220
) },
1021 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_IB_7322
) },
1025 MODULE_DEVICE_TABLE(pci
, qib_pci_tbl
);
1027 struct pci_driver qib_driver
= {
1028 .name
= QIB_DRV_NAME
,
1029 .probe
= qib_init_one
,
1030 .remove
= __devexit_p(qib_remove_one
),
1031 .id_table
= qib_pci_tbl
,
1032 .err_handler
= &qib_pci_err_handler
,
1036 * Do all the generic driver unit- and chip-independent memory
1037 * allocation and initialization.
1039 static int __init
qlogic_ib_init(void)
1043 ret
= qib_dev_init();
1048 * We create our own workqueue mainly because we want to be
1049 * able to flush it when devices are being removed. We can't
1050 * use schedule_work()/flush_scheduled_work() because both
1051 * unregister_netdev() and linkwatch_event take the rtnl lock,
1052 * so flush_scheduled_work() can deadlock during device
1055 qib_wq
= create_workqueue("qib");
1061 qib_cq_wq
= create_singlethread_workqueue("qib_cq");
1068 * These must be called before the driver is registered with
1069 * the PCI subsystem.
1071 idr_init(&qib_unit_table
);
1072 if (!idr_pre_get(&qib_unit_table
, GFP_KERNEL
)) {
1073 printk(KERN_ERR QIB_DRV_NAME
": idr_pre_get() failed\n");
1078 ret
= pci_register_driver(&qib_driver
);
1080 printk(KERN_ERR QIB_DRV_NAME
1081 ": Unable to register driver: error %d\n", -ret
);
1085 /* not fatal if it doesn't work */
1086 if (qib_init_qibfs())
1087 printk(KERN_ERR QIB_DRV_NAME
": Unable to register ipathfs\n");
1088 goto bail
; /* all OK */
1091 idr_destroy(&qib_unit_table
);
1093 destroy_workqueue(qib_cq_wq
);
1095 destroy_workqueue(qib_wq
);
1102 module_init(qlogic_ib_init
);
1105 * Do the non-unit driver cleanup, memory free, etc. at unload.
1107 static void __exit
qlogic_ib_cleanup(void)
1111 ret
= qib_exit_qibfs();
1113 printk(KERN_ERR QIB_DRV_NAME
": "
1114 "Unable to cleanup counter filesystem: "
1115 "error %d\n", -ret
);
1117 pci_unregister_driver(&qib_driver
);
1119 destroy_workqueue(qib_wq
);
1120 destroy_workqueue(qib_cq_wq
);
1122 qib_cpulist_count
= 0;
1125 idr_destroy(&qib_unit_table
);
1129 module_exit(qlogic_ib_cleanup
);
1131 /* this can only be called after a successful initialization */
1132 static void cleanup_device_data(struct qib_devdata
*dd
)
1136 struct qib_ctxtdata
**tmp
;
1137 unsigned long flags
;
1139 /* users can't do anything more with chip */
1140 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
1141 if (dd
->pport
[pidx
].statusp
)
1142 *dd
->pport
[pidx
].statusp
&= ~QIB_STATUS_CHIP_PRESENT
;
1147 if (dd
->pioavailregs_dma
) {
1148 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
1149 (void *) dd
->pioavailregs_dma
,
1150 dd
->pioavailregs_phys
);
1151 dd
->pioavailregs_dma
= NULL
;
1154 if (dd
->pageshadow
) {
1155 struct page
**tmpp
= dd
->pageshadow
;
1156 dma_addr_t
*tmpd
= dd
->physshadow
;
1159 for (ctxt
= 0; ctxt
< dd
->cfgctxts
; ctxt
++) {
1160 int ctxt_tidbase
= ctxt
* dd
->rcvtidcnt
;
1161 int maxtid
= ctxt_tidbase
+ dd
->rcvtidcnt
;
1163 for (i
= ctxt_tidbase
; i
< maxtid
; i
++) {
1166 pci_unmap_page(dd
->pcidev
, tmpd
[i
],
1167 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
1168 qib_release_user_pages(&tmpp
[i
], 1);
1174 tmpp
= dd
->pageshadow
;
1175 dd
->pageshadow
= NULL
;
1180 * Free any resources still in use (usually just kernel contexts)
1181 * at unload; we do for ctxtcnt, because that's what we allocate.
1182 * We acquire lock to be really paranoid that rcd isn't being
1183 * accessed from some interrupt-related code (that should not happen,
1184 * but best to be sure).
1186 spin_lock_irqsave(&dd
->uctxt_lock
, flags
);
1189 spin_unlock_irqrestore(&dd
->uctxt_lock
, flags
);
1190 for (ctxt
= 0; tmp
&& ctxt
< dd
->ctxtcnt
; ctxt
++) {
1191 struct qib_ctxtdata
*rcd
= tmp
[ctxt
];
1193 tmp
[ctxt
] = NULL
; /* debugging paranoia */
1194 qib_free_ctxtdata(dd
, rcd
);
1197 kfree(dd
->boardname
);
1201 * Clean up on unit shutdown, or error during unit load after
1202 * successful initialization.
1204 static void qib_postinit_cleanup(struct qib_devdata
*dd
)
1207 * Clean up chip-specific stuff.
1208 * We check for NULL here, because it's outside
1209 * the kregbase check, and we need to call it
1210 * after the free_irq. Thus it's possible that
1211 * the function pointers were never initialized.
1216 qib_pcie_ddcleanup(dd
);
1218 cleanup_device_data(dd
);
1220 qib_free_devdata(dd
);
1223 static int __devinit
qib_init_one(struct pci_dev
*pdev
,
1224 const struct pci_device_id
*ent
)
1226 int ret
, j
, pidx
, initfail
;
1227 struct qib_devdata
*dd
= NULL
;
1229 ret
= qib_pcie_init(pdev
, ent
);
1234 * Do device-specific initialiation, function table setup, dd
1237 switch (ent
->device
) {
1238 case PCI_DEVICE_ID_QLOGIC_IB_6120
:
1239 #ifdef CONFIG_PCI_MSI
1240 dd
= qib_init_iba6120_funcs(pdev
, ent
);
1242 qib_early_err(&pdev
->dev
, "QLogic PCIE device 0x%x cannot "
1243 "work if CONFIG_PCI_MSI is not enabled\n",
1245 dd
= ERR_PTR(-ENODEV
);
1249 case PCI_DEVICE_ID_QLOGIC_IB_7220
:
1250 dd
= qib_init_iba7220_funcs(pdev
, ent
);
1253 case PCI_DEVICE_ID_QLOGIC_IB_7322
:
1254 dd
= qib_init_iba7322_funcs(pdev
, ent
);
1258 qib_early_err(&pdev
->dev
, "Failing on unknown QLogic "
1259 "deviceid 0x%x\n", ent
->device
);
1266 goto bail
; /* error already printed */
1268 /* do the generic initialization */
1269 initfail
= qib_init(dd
, 0);
1271 ret
= qib_register_ib_device(dd
);
1274 * Now ready for use. this should be cleared whenever we
1275 * detect a reset, or initiate one. If earlier failure,
1276 * we still create devices, so diags, etc. can be used
1277 * to determine cause of problem.
1279 if (!qib_mini_init
&& !initfail
&& !ret
)
1280 dd
->flags
|= QIB_INITTED
;
1282 j
= qib_device_create(dd
);
1284 qib_dev_err(dd
, "Failed to create /dev devices: %d\n", -j
);
1287 qib_dev_err(dd
, "Failed filesystem setup for counters: %d\n",
1290 if (qib_mini_init
|| initfail
|| ret
) {
1291 qib_stop_timers(dd
);
1292 flush_scheduled_work();
1293 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
1294 dd
->f_quiet_serdes(dd
->pport
+ pidx
);
1298 (void) qibfs_remove(dd
);
1299 qib_device_remove(dd
);
1302 qib_unregister_ib_device(dd
);
1303 qib_postinit_cleanup(dd
);
1310 ret
= qib_enable_wc(dd
);
1312 qib_dev_err(dd
, "Write combining not enabled "
1313 "(err %d): performance may be poor\n",
1319 qib_verify_pioperf(dd
);
1324 static void __devexit
qib_remove_one(struct pci_dev
*pdev
)
1326 struct qib_devdata
*dd
= pci_get_drvdata(pdev
);
1329 /* unregister from IB core */
1330 qib_unregister_ib_device(dd
);
1333 * Disable the IB link, disable interrupts on the device,
1334 * clear dma engines, etc.
1337 qib_shutdown_device(dd
);
1339 qib_stop_timers(dd
);
1341 /* wait until all of our (qsfp) schedule_work() calls complete */
1342 flush_scheduled_work();
1344 ret
= qibfs_remove(dd
);
1346 qib_dev_err(dd
, "Failed counters filesystem cleanup: %d\n",
1349 qib_device_remove(dd
);
1351 qib_postinit_cleanup(dd
);
1355 * qib_create_rcvhdrq - create a receive header queue
1356 * @dd: the qlogic_ib device
1357 * @rcd: the context data
1359 * This must be contiguous memory (from an i/o perspective), and must be
1360 * DMA'able (which means for some systems, it will go through an IOMMU,
1361 * or be forced into a low address range).
1363 int qib_create_rcvhdrq(struct qib_devdata
*dd
, struct qib_ctxtdata
*rcd
)
1367 if (!rcd
->rcvhdrq
) {
1368 dma_addr_t phys_hdrqtail
;
1371 amt
= ALIGN(dd
->rcvhdrcnt
* dd
->rcvhdrentsize
*
1372 sizeof(u32
), PAGE_SIZE
);
1373 gfp_flags
= (rcd
->ctxt
>= dd
->first_user_ctxt
) ?
1374 GFP_USER
: GFP_KERNEL
;
1375 rcd
->rcvhdrq
= dma_alloc_coherent(
1376 &dd
->pcidev
->dev
, amt
, &rcd
->rcvhdrq_phys
,
1377 gfp_flags
| __GFP_COMP
);
1379 if (!rcd
->rcvhdrq
) {
1380 qib_dev_err(dd
, "attempt to allocate %d bytes "
1381 "for ctxt %u rcvhdrq failed\n",
1386 if (rcd
->ctxt
>= dd
->first_user_ctxt
) {
1387 rcd
->user_event_mask
= vmalloc_user(PAGE_SIZE
);
1388 if (!rcd
->user_event_mask
)
1389 goto bail_free_hdrq
;
1392 if (!(dd
->flags
& QIB_NODMA_RTAIL
)) {
1393 rcd
->rcvhdrtail_kvaddr
= dma_alloc_coherent(
1394 &dd
->pcidev
->dev
, PAGE_SIZE
, &phys_hdrqtail
,
1396 if (!rcd
->rcvhdrtail_kvaddr
)
1398 rcd
->rcvhdrqtailaddr_phys
= phys_hdrqtail
;
1401 rcd
->rcvhdrq_size
= amt
;
1404 /* clear for security and sanity on each use */
1405 memset(rcd
->rcvhdrq
, 0, rcd
->rcvhdrq_size
);
1406 if (rcd
->rcvhdrtail_kvaddr
)
1407 memset(rcd
->rcvhdrtail_kvaddr
, 0, PAGE_SIZE
);
1411 qib_dev_err(dd
, "attempt to allocate 1 page for ctxt %u "
1412 "rcvhdrqtailaddr failed\n", rcd
->ctxt
);
1413 vfree(rcd
->user_event_mask
);
1414 rcd
->user_event_mask
= NULL
;
1416 dma_free_coherent(&dd
->pcidev
->dev
, amt
, rcd
->rcvhdrq
,
1418 rcd
->rcvhdrq
= NULL
;
1424 * allocate eager buffers, both kernel and user contexts.
1425 * @rcd: the context we are setting up.
1427 * Allocate the eager TID buffers and program them into hip.
1428 * They are no longer completely contiguous, we do multiple allocation
1429 * calls. Otherwise we get the OOM code involved, by asking for too
1430 * much per call, with disastrous results on some kernels.
1432 int qib_setup_eagerbufs(struct qib_ctxtdata
*rcd
)
1434 struct qib_devdata
*dd
= rcd
->dd
;
1435 unsigned e
, egrcnt
, egrperchunk
, chunk
, egrsize
, egroff
;
1440 * GFP_USER, but without GFP_FS, so buffer cache can be
1441 * coalesced (we hope); otherwise, even at order 4,
1442 * heavy filesystem activity makes these fail, and we can
1443 * use compound pages.
1445 gfp_flags
= __GFP_WAIT
| __GFP_IO
| __GFP_COMP
;
1447 egrcnt
= rcd
->rcvegrcnt
;
1448 egroff
= rcd
->rcvegr_tid_base
;
1449 egrsize
= dd
->rcvegrbufsize
;
1451 chunk
= rcd
->rcvegrbuf_chunks
;
1452 egrperchunk
= rcd
->rcvegrbufs_perchunk
;
1453 size
= rcd
->rcvegrbuf_size
;
1454 if (!rcd
->rcvegrbuf
) {
1456 kzalloc(chunk
* sizeof(rcd
->rcvegrbuf
[0]),
1458 if (!rcd
->rcvegrbuf
)
1461 if (!rcd
->rcvegrbuf_phys
) {
1462 rcd
->rcvegrbuf_phys
=
1463 kmalloc(chunk
* sizeof(rcd
->rcvegrbuf_phys
[0]),
1465 if (!rcd
->rcvegrbuf_phys
)
1466 goto bail_rcvegrbuf
;
1468 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
; e
++) {
1469 if (rcd
->rcvegrbuf
[e
])
1472 dma_alloc_coherent(&dd
->pcidev
->dev
, size
,
1473 &rcd
->rcvegrbuf_phys
[e
],
1475 if (!rcd
->rcvegrbuf
[e
])
1476 goto bail_rcvegrbuf_phys
;
1479 rcd
->rcvegr_phys
= rcd
->rcvegrbuf_phys
[0];
1481 for (e
= chunk
= 0; chunk
< rcd
->rcvegrbuf_chunks
; chunk
++) {
1482 dma_addr_t pa
= rcd
->rcvegrbuf_phys
[chunk
];
1485 /* clear for security and sanity on each use */
1486 memset(rcd
->rcvegrbuf
[chunk
], 0, size
);
1488 for (i
= 0; e
< egrcnt
&& i
< egrperchunk
; e
++, i
++) {
1489 dd
->f_put_tid(dd
, e
+ egroff
+
1494 RCVHQ_RCV_TYPE_EAGER
, pa
);
1497 cond_resched(); /* don't hog the cpu */
1502 bail_rcvegrbuf_phys
:
1503 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
&& rcd
->rcvegrbuf
[e
]; e
++)
1504 dma_free_coherent(&dd
->pcidev
->dev
, size
,
1505 rcd
->rcvegrbuf
[e
], rcd
->rcvegrbuf_phys
[e
]);
1506 kfree(rcd
->rcvegrbuf_phys
);
1507 rcd
->rcvegrbuf_phys
= NULL
;
1509 kfree(rcd
->rcvegrbuf
);
1510 rcd
->rcvegrbuf
= NULL
;
1516 * Note: Changes to this routine should be mirrored
1517 * for the diagnostics routine qib_remap_ioaddr32().
1518 * There is also related code for VL15 buffers in qib_init_7322_variables().
1519 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1521 int init_chip_wc_pat(struct qib_devdata
*dd
, u32 vl15buflen
)
1523 u64 __iomem
*qib_kregbase
= NULL
;
1524 void __iomem
*qib_piobase
= NULL
;
1525 u64 __iomem
*qib_userbase
= NULL
;
1527 u64 qib_pio2koffset
= dd
->piobufbase
& 0xffffffff;
1528 u64 qib_pio4koffset
= dd
->piobufbase
>> 32;
1529 u64 qib_pio2klen
= dd
->piobcnt2k
* dd
->palign
;
1530 u64 qib_pio4klen
= dd
->piobcnt4k
* dd
->align4k
;
1531 u64 qib_physaddr
= dd
->physaddr
;
1533 u64 qib_userlen
= 0;
1536 * Free the old mapping because the kernel will try to reuse the
1537 * old mapping and not create a new mapping with the
1538 * write combining attribute.
1540 iounmap(dd
->kregbase
);
1541 dd
->kregbase
= NULL
;
1544 * Assumes chip address space looks like:
1545 * - kregs + sregs + cregs + uregs (in any order)
1546 * - piobufs (2K and 4K bufs in either order)
1548 * - kregs + sregs + cregs (in any order)
1549 * - piobufs (2K and 4K bufs in either order)
1552 if (dd
->piobcnt4k
== 0) {
1553 qib_kreglen
= qib_pio2koffset
;
1554 qib_piolen
= qib_pio2klen
;
1555 } else if (qib_pio2koffset
< qib_pio4koffset
) {
1556 qib_kreglen
= qib_pio2koffset
;
1557 qib_piolen
= qib_pio4koffset
+ qib_pio4klen
- qib_kreglen
;
1559 qib_kreglen
= qib_pio4koffset
;
1560 qib_piolen
= qib_pio2koffset
+ qib_pio2klen
- qib_kreglen
;
1562 qib_piolen
+= vl15buflen
;
1563 /* Map just the configured ports (not all hw ports) */
1564 if (dd
->uregbase
> qib_kreglen
)
1565 qib_userlen
= dd
->ureg_align
* dd
->cfgctxts
;
1567 /* Sanity checks passed, now create the new mappings */
1568 qib_kregbase
= ioremap_nocache(qib_physaddr
, qib_kreglen
);
1572 qib_piobase
= ioremap_wc(qib_physaddr
+ qib_kreglen
, qib_piolen
);
1577 qib_userbase
= ioremap_nocache(qib_physaddr
+ dd
->uregbase
,
1583 dd
->kregbase
= qib_kregbase
;
1584 dd
->kregend
= (u64 __iomem
*)
1585 ((char __iomem
*) qib_kregbase
+ qib_kreglen
);
1586 dd
->piobase
= qib_piobase
;
1587 dd
->pio2kbase
= (void __iomem
*)
1588 (((char __iomem
*) dd
->piobase
) +
1589 qib_pio2koffset
- qib_kreglen
);
1591 dd
->pio4kbase
= (void __iomem
*)
1592 (((char __iomem
*) dd
->piobase
) +
1593 qib_pio4koffset
- qib_kreglen
);
1595 /* ureg will now be accessed relative to dd->userbase */
1596 dd
->userbase
= qib_userbase
;
1600 iounmap(qib_piobase
);
1602 iounmap(qib_kregbase
);