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Merge tag 'acpi-3.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83627hf.c
1 /*
2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 * Philip Edelbrock <phil@netroedge.com>,
6 * and Mark Studebaker <mdsxyz123@yahoo.com>
7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 * Copyright (c) 2007 - 1012 Jean Delvare <khali@linux-fr.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 /*
26 * Supports following chips:
27 *
28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34 *
35 * For other winbond chips, and for i2c support in the above chips,
36 * use w83781d.c.
37 *
38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 * supported yet.
40 */
41
42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/slab.h>
47 #include <linux/jiffies.h>
48 #include <linux/platform_device.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/hwmon-vid.h>
52 #include <linux/err.h>
53 #include <linux/mutex.h>
54 #include <linux/ioport.h>
55 #include <linux/acpi.h>
56 #include <linux/io.h>
57 #include "lm75.h"
58
59 static struct platform_device *pdev;
60
61 #define DRVNAME "w83627hf"
62 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
64 struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67 };
68
69 static u8 force_i2c = 0x1f;
70 module_param(force_i2c, byte, 0);
71 MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
74 static bool init = 1;
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82 /* modified from kernel/include/traps.c */
83 #define DEV 0x07 /* Register: Logical device select */
84
85 /* logical device numbers for superio_select (below) */
86 #define W83627HF_LD_FDC 0x00
87 #define W83627HF_LD_PRT 0x01
88 #define W83627HF_LD_UART1 0x02
89 #define W83627HF_LD_UART2 0x03
90 #define W83627HF_LD_KBC 0x05
91 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
92 #define W83627HF_LD_GAME 0x07
93 #define W83627HF_LD_MIDI 0x07
94 #define W83627HF_LD_GPIO1 0x07
95 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96 #define W83627HF_LD_GPIO2 0x08
97 #define W83627HF_LD_GPIO3 0x09
98 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99 #define W83627HF_LD_ACPI 0x0a
100 #define W83627HF_LD_HWM 0x0b
101
102 #define DEVID 0x20 /* Register: Device ID */
103
104 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
108 #define W83687THF_VID_EN 0x29 /* w83687thf only */
109 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
112 static inline void
113 superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
114 {
115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
117 }
118
119 static inline int
120 superio_inb(struct w83627hf_sio_data *sio, int reg)
121 {
122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
124 }
125
126 static inline void
127 superio_select(struct w83627hf_sio_data *sio, int ld)
128 {
129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
131 }
132
133 static inline void
134 superio_enter(struct w83627hf_sio_data *sio)
135 {
136 outb(0x87, sio->sioaddr);
137 outb(0x87, sio->sioaddr);
138 }
139
140 static inline void
141 superio_exit(struct w83627hf_sio_data *sio)
142 {
143 outb(0xAA, sio->sioaddr);
144 }
145
146 #define W627_DEVID 0x52
147 #define W627THF_DEVID 0x82
148 #define W697_DEVID 0x60
149 #define W637_DEVID 0x70
150 #define W687THF_DEVID 0x85
151 #define WINB_ACT_REG 0x30
152 #define WINB_BASE_REG 0x60
153 /* Constants specified below */
154
155 /* Alignment of the base address */
156 #define WINB_ALIGNMENT ~7
157
158 /* Offset & size of I/O region we are interested in */
159 #define WINB_REGION_OFFSET 5
160 #define WINB_REGION_SIZE 2
161
162 /* Where are the sensors address/data registers relative to the region offset */
163 #define W83781D_ADDR_REG_OFFSET 0
164 #define W83781D_DATA_REG_OFFSET 1
165
166 /* The W83781D registers */
167 /* The W83782D registers for nr=7,8 are in bank 5 */
168 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
169 (0x554 + (((nr) - 7) * 2)))
170 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
171 (0x555 + (((nr) - 7) * 2)))
172 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
173 (0x550 + (nr) - 7))
174
175 /* nr:0-2 for fans:1-3 */
176 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
177 #define W83627HF_REG_FAN(nr) (0x28 + (nr))
178
179 #define W83627HF_REG_TEMP2_CONFIG 0x152
180 #define W83627HF_REG_TEMP3_CONFIG 0x252
181 /* these are zero-based, unlike config constants above */
182 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
183 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
184 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
185
186 #define W83781D_REG_BANK 0x4E
187
188 #define W83781D_REG_CONFIG 0x40
189 #define W83781D_REG_ALARM1 0x459
190 #define W83781D_REG_ALARM2 0x45A
191 #define W83781D_REG_ALARM3 0x45B
192
193 #define W83781D_REG_BEEP_CONFIG 0x4D
194 #define W83781D_REG_BEEP_INTS1 0x56
195 #define W83781D_REG_BEEP_INTS2 0x57
196 #define W83781D_REG_BEEP_INTS3 0x453
197
198 #define W83781D_REG_VID_FANDIV 0x47
199
200 #define W83781D_REG_CHIPID 0x49
201 #define W83781D_REG_WCHIPID 0x58
202 #define W83781D_REG_CHIPMAN 0x4F
203 #define W83781D_REG_PIN 0x4B
204
205 #define W83781D_REG_VBAT 0x5D
206
207 #define W83627HF_REG_PWM1 0x5A
208 #define W83627HF_REG_PWM2 0x5B
209
210 static const u8 W83627THF_REG_PWM_ENABLE[] = {
211 0x04, /* FAN 1 mode */
212 0x04, /* FAN 2 mode */
213 0x12, /* FAN AUX mode */
214 };
215 static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
216
217 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
218 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
219 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
220
221 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
222
223 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
224 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
225 W83627THF_REG_PWM3 };
226 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
227 regpwm_627hf[nr] : regpwm[nr])
228
229 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
230
231 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
232 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
233 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
234
235 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
236 W83637HF_REG_PWM_FREQ2,
237 W83637HF_REG_PWM_FREQ3 };
238
239 #define W83627HF_BASE_PWM_FREQ 46870
240
241 #define W83781D_REG_I2C_ADDR 0x48
242 #define W83781D_REG_I2C_SUBADDR 0x4A
243
244 /* Sensor selection */
245 #define W83781D_REG_SCFG1 0x5D
246 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
247 #define W83781D_REG_SCFG2 0x59
248 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
249 #define W83781D_DEFAULT_BETA 3435
250
251 /*
252 * Conversions. Limit checking is only done on the TO_REG
253 * variants. Note that you should be a bit careful with which arguments
254 * these macros are called: arguments may be evaluated more than once.
255 * Fixing this is just not worth it.
256 */
257 #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
258 #define IN_FROM_REG(val) ((val) * 16)
259
260 static inline u8 FAN_TO_REG(long rpm, int div)
261 {
262 if (rpm == 0)
263 return 255;
264 rpm = clamp_val(rpm, 1, 1000000);
265 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
266 }
267
268 #define TEMP_MIN (-128000)
269 #define TEMP_MAX ( 127000)
270
271 /*
272 * TEMP: 0.001C/bit (-128C to +127C)
273 * REG: 1C/bit, two's complement
274 */
275 static u8 TEMP_TO_REG(long temp)
276 {
277 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
278 ntemp += (ntemp < 0 ? -500 : 500);
279 return (u8)(ntemp / 1000);
280 }
281
282 static int TEMP_FROM_REG(u8 reg)
283 {
284 return (s8)reg * 1000;
285 }
286
287 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
288
289 #define PWM_TO_REG(val) (clamp_val((val), 0, 255))
290
291 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
292 {
293 unsigned long freq;
294 freq = W83627HF_BASE_PWM_FREQ >> reg;
295 return freq;
296 }
297 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
298 {
299 u8 i;
300 /*
301 * Only 5 dividers (1 2 4 8 16)
302 * Search for the nearest available frequency
303 */
304 for (i = 0; i < 4; i++) {
305 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
306 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
307 break;
308 }
309 return i;
310 }
311
312 static inline unsigned long pwm_freq_from_reg(u8 reg)
313 {
314 /* Clock bit 8 -> 180 kHz or 24 MHz */
315 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
316
317 reg &= 0x7f;
318 /* This should not happen but anyway... */
319 if (reg == 0)
320 reg++;
321 return clock / (reg << 8);
322 }
323 static inline u8 pwm_freq_to_reg(unsigned long val)
324 {
325 /* Minimum divider value is 0x01 and maximum is 0x7F */
326 if (val >= 93750) /* The highest we can do */
327 return 0x01;
328 if (val >= 720) /* Use 24 MHz clock */
329 return 24000000UL / (val << 8);
330 if (val < 6) /* The lowest we can do */
331 return 0xFF;
332 else /* Use 180 kHz clock */
333 return 0x80 | (180000UL / (val << 8));
334 }
335
336 #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
337 #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
338
339 #define DIV_FROM_REG(val) (1 << (val))
340
341 static inline u8 DIV_TO_REG(long val)
342 {
343 int i;
344 val = clamp_val(val, 1, 128) >> 1;
345 for (i = 0; i < 7; i++) {
346 if (val == 0)
347 break;
348 val >>= 1;
349 }
350 return (u8)i;
351 }
352
353 /*
354 * For each registered chip, we need to keep some data in memory.
355 * The structure is dynamically allocated.
356 */
357 struct w83627hf_data {
358 unsigned short addr;
359 const char *name;
360 struct device *hwmon_dev;
361 struct mutex lock;
362 enum chips type;
363
364 struct mutex update_lock;
365 char valid; /* !=0 if following fields are valid */
366 unsigned long last_updated; /* In jiffies */
367
368 u8 in[9]; /* Register value */
369 u8 in_max[9]; /* Register value */
370 u8 in_min[9]; /* Register value */
371 u8 fan[3]; /* Register value */
372 u8 fan_min[3]; /* Register value */
373 u16 temp[3]; /* Register value */
374 u16 temp_max[3]; /* Register value */
375 u16 temp_max_hyst[3]; /* Register value */
376 u8 fan_div[3]; /* Register encoding, shifted right */
377 u8 vid; /* Register encoding, combined */
378 u32 alarms; /* Register encoding, combined */
379 u32 beep_mask; /* Register encoding, combined */
380 u8 pwm[3]; /* Register value */
381 u8 pwm_enable[3]; /* 1 = manual
382 * 2 = thermal cruise (also called SmartFan I)
383 * 3 = fan speed cruise
384 */
385 u8 pwm_freq[3]; /* Register value */
386 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
387 * 4 = thermistor
388 */
389 u8 vrm;
390 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
391
392 #ifdef CONFIG_PM
393 /* Remember extra register values over suspend/resume */
394 u8 scfg1;
395 u8 scfg2;
396 #endif
397 };
398
399
400 static int w83627hf_probe(struct platform_device *pdev);
401 static int w83627hf_remove(struct platform_device *pdev);
402
403 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
404 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
405 static void w83627hf_update_fan_div(struct w83627hf_data *data);
406 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
407 static void w83627hf_init_device(struct platform_device *pdev);
408
409 #ifdef CONFIG_PM
410 static int w83627hf_suspend(struct device *dev)
411 {
412 struct w83627hf_data *data = w83627hf_update_device(dev);
413
414 mutex_lock(&data->update_lock);
415 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
416 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
417 mutex_unlock(&data->update_lock);
418
419 return 0;
420 }
421
422 static int w83627hf_resume(struct device *dev)
423 {
424 struct w83627hf_data *data = dev_get_drvdata(dev);
425 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
426
427 /* Restore limits */
428 mutex_lock(&data->update_lock);
429 for (i = 0; i <= 8; i++) {
430 /* skip missing sensors */
431 if (((data->type == w83697hf) && (i == 1)) ||
432 ((data->type != w83627hf && data->type != w83697hf)
433 && (i == 5 || i == 6)))
434 continue;
435 w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
436 data->in_max[i]);
437 w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
438 data->in_min[i]);
439 }
440 for (i = 0; i <= 2; i++)
441 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
442 data->fan_min[i]);
443 for (i = 0; i < num_temps; i++) {
444 w83627hf_write_value(data, w83627hf_reg_temp_over[i],
445 data->temp_max[i]);
446 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
447 data->temp_max_hyst[i]);
448 }
449
450 /* Fixup BIOS bugs */
451 if (data->type == w83627thf || data->type == w83637hf ||
452 data->type == w83687thf)
453 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
454 data->vrm_ovt);
455 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
456 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
457
458 /* Force re-reading all values */
459 data->valid = 0;
460 mutex_unlock(&data->update_lock);
461
462 return 0;
463 }
464
465 static const struct dev_pm_ops w83627hf_dev_pm_ops = {
466 .suspend = w83627hf_suspend,
467 .resume = w83627hf_resume,
468 };
469
470 #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
471 #else
472 #define W83627HF_DEV_PM_OPS NULL
473 #endif /* CONFIG_PM */
474
475 static struct platform_driver w83627hf_driver = {
476 .driver = {
477 .owner = THIS_MODULE,
478 .name = DRVNAME,
479 .pm = W83627HF_DEV_PM_OPS,
480 },
481 .probe = w83627hf_probe,
482 .remove = w83627hf_remove,
483 };
484
485 static ssize_t
486 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
487 {
488 int nr = to_sensor_dev_attr(devattr)->index;
489 struct w83627hf_data *data = w83627hf_update_device(dev);
490 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
491 }
492 static ssize_t
493 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
494 {
495 int nr = to_sensor_dev_attr(devattr)->index;
496 struct w83627hf_data *data = w83627hf_update_device(dev);
497 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
498 }
499 static ssize_t
500 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
501 {
502 int nr = to_sensor_dev_attr(devattr)->index;
503 struct w83627hf_data *data = w83627hf_update_device(dev);
504 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
505 }
506 static ssize_t
507 store_in_min(struct device *dev, struct device_attribute *devattr,
508 const char *buf, size_t count)
509 {
510 int nr = to_sensor_dev_attr(devattr)->index;
511 struct w83627hf_data *data = dev_get_drvdata(dev);
512 long val;
513 int err;
514
515 err = kstrtol(buf, 10, &val);
516 if (err)
517 return err;
518
519 mutex_lock(&data->update_lock);
520 data->in_min[nr] = IN_TO_REG(val);
521 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
522 mutex_unlock(&data->update_lock);
523 return count;
524 }
525 static ssize_t
526 store_in_max(struct device *dev, struct device_attribute *devattr,
527 const char *buf, size_t count)
528 {
529 int nr = to_sensor_dev_attr(devattr)->index;
530 struct w83627hf_data *data = dev_get_drvdata(dev);
531 long val;
532 int err;
533
534 err = kstrtol(buf, 10, &val);
535 if (err)
536 return err;
537
538 mutex_lock(&data->update_lock);
539 data->in_max[nr] = IN_TO_REG(val);
540 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
541 mutex_unlock(&data->update_lock);
542 return count;
543 }
544 #define sysfs_vin_decl(offset) \
545 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
546 show_in_input, NULL, offset); \
547 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
548 show_in_min, store_in_min, offset); \
549 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
550 show_in_max, store_in_max, offset);
551
552 sysfs_vin_decl(1);
553 sysfs_vin_decl(2);
554 sysfs_vin_decl(3);
555 sysfs_vin_decl(4);
556 sysfs_vin_decl(5);
557 sysfs_vin_decl(6);
558 sysfs_vin_decl(7);
559 sysfs_vin_decl(8);
560
561 /* use a different set of functions for in0 */
562 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
563 {
564 long in0;
565
566 if ((data->vrm_ovt & 0x01) &&
567 (w83627thf == data->type || w83637hf == data->type
568 || w83687thf == data->type))
569
570 /* use VRM9 calculation */
571 in0 = (long)((reg * 488 + 70000 + 50) / 100);
572 else
573 /* use VRM8 (standard) calculation */
574 in0 = (long)IN_FROM_REG(reg);
575
576 return sprintf(buf,"%ld\n", in0);
577 }
578
579 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
580 {
581 struct w83627hf_data *data = w83627hf_update_device(dev);
582 return show_in_0(data, buf, data->in[0]);
583 }
584
585 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
586 {
587 struct w83627hf_data *data = w83627hf_update_device(dev);
588 return show_in_0(data, buf, data->in_min[0]);
589 }
590
591 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
592 {
593 struct w83627hf_data *data = w83627hf_update_device(dev);
594 return show_in_0(data, buf, data->in_max[0]);
595 }
596
597 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
598 const char *buf, size_t count)
599 {
600 struct w83627hf_data *data = dev_get_drvdata(dev);
601 unsigned long val;
602 int err;
603
604 err = kstrtoul(buf, 10, &val);
605 if (err)
606 return err;
607
608 mutex_lock(&data->update_lock);
609
610 if ((data->vrm_ovt & 0x01) &&
611 (w83627thf == data->type || w83637hf == data->type
612 || w83687thf == data->type))
613
614 /* use VRM9 calculation */
615 data->in_min[0] =
616 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
617 else
618 /* use VRM8 (standard) calculation */
619 data->in_min[0] = IN_TO_REG(val);
620
621 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
622 mutex_unlock(&data->update_lock);
623 return count;
624 }
625
626 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
627 const char *buf, size_t count)
628 {
629 struct w83627hf_data *data = dev_get_drvdata(dev);
630 unsigned long val;
631 int err;
632
633 err = kstrtoul(buf, 10, &val);
634 if (err)
635 return err;
636
637 mutex_lock(&data->update_lock);
638
639 if ((data->vrm_ovt & 0x01) &&
640 (w83627thf == data->type || w83637hf == data->type
641 || w83687thf == data->type))
642
643 /* use VRM9 calculation */
644 data->in_max[0] =
645 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
646 else
647 /* use VRM8 (standard) calculation */
648 data->in_max[0] = IN_TO_REG(val);
649
650 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
651 mutex_unlock(&data->update_lock);
652 return count;
653 }
654
655 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
656 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
657 show_regs_in_min0, store_regs_in_min0);
658 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
659 show_regs_in_max0, store_regs_in_max0);
660
661 static ssize_t
662 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
663 {
664 int nr = to_sensor_dev_attr(devattr)->index;
665 struct w83627hf_data *data = w83627hf_update_device(dev);
666 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
667 (long)DIV_FROM_REG(data->fan_div[nr])));
668 }
669 static ssize_t
670 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
671 {
672 int nr = to_sensor_dev_attr(devattr)->index;
673 struct w83627hf_data *data = w83627hf_update_device(dev);
674 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
675 (long)DIV_FROM_REG(data->fan_div[nr])));
676 }
677 static ssize_t
678 store_fan_min(struct device *dev, struct device_attribute *devattr,
679 const char *buf, size_t count)
680 {
681 int nr = to_sensor_dev_attr(devattr)->index;
682 struct w83627hf_data *data = dev_get_drvdata(dev);
683 unsigned long val;
684 int err;
685
686 err = kstrtoul(buf, 10, &val);
687 if (err)
688 return err;
689
690 mutex_lock(&data->update_lock);
691 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
692 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
693 data->fan_min[nr]);
694
695 mutex_unlock(&data->update_lock);
696 return count;
697 }
698 #define sysfs_fan_decl(offset) \
699 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
700 show_fan_input, NULL, offset - 1); \
701 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
702 show_fan_min, store_fan_min, offset - 1);
703
704 sysfs_fan_decl(1);
705 sysfs_fan_decl(2);
706 sysfs_fan_decl(3);
707
708 static ssize_t
709 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
710 {
711 int nr = to_sensor_dev_attr(devattr)->index;
712 struct w83627hf_data *data = w83627hf_update_device(dev);
713
714 u16 tmp = data->temp[nr];
715 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
716 : (long) TEMP_FROM_REG(tmp));
717 }
718
719 static ssize_t
720 show_temp_max(struct device *dev, struct device_attribute *devattr,
721 char *buf)
722 {
723 int nr = to_sensor_dev_attr(devattr)->index;
724 struct w83627hf_data *data = w83627hf_update_device(dev);
725
726 u16 tmp = data->temp_max[nr];
727 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
728 : (long) TEMP_FROM_REG(tmp));
729 }
730
731 static ssize_t
732 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
733 char *buf)
734 {
735 int nr = to_sensor_dev_attr(devattr)->index;
736 struct w83627hf_data *data = w83627hf_update_device(dev);
737
738 u16 tmp = data->temp_max_hyst[nr];
739 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
740 : (long) TEMP_FROM_REG(tmp));
741 }
742
743 static ssize_t
744 store_temp_max(struct device *dev, struct device_attribute *devattr,
745 const char *buf, size_t count)
746 {
747 int nr = to_sensor_dev_attr(devattr)->index;
748 struct w83627hf_data *data = dev_get_drvdata(dev);
749 u16 tmp;
750 long val;
751 int err;
752
753 err = kstrtol(buf, 10, &val);
754 if (err)
755 return err;
756
757 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
758 mutex_lock(&data->update_lock);
759 data->temp_max[nr] = tmp;
760 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
761 mutex_unlock(&data->update_lock);
762 return count;
763 }
764
765 static ssize_t
766 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
767 const char *buf, size_t count)
768 {
769 int nr = to_sensor_dev_attr(devattr)->index;
770 struct w83627hf_data *data = dev_get_drvdata(dev);
771 u16 tmp;
772 long val;
773 int err;
774
775 err = kstrtol(buf, 10, &val);
776 if (err)
777 return err;
778
779 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
780 mutex_lock(&data->update_lock);
781 data->temp_max_hyst[nr] = tmp;
782 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
783 mutex_unlock(&data->update_lock);
784 return count;
785 }
786
787 #define sysfs_temp_decl(offset) \
788 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
789 show_temp, NULL, offset - 1); \
790 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
791 show_temp_max, store_temp_max, offset - 1); \
792 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
793 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
794
795 sysfs_temp_decl(1);
796 sysfs_temp_decl(2);
797 sysfs_temp_decl(3);
798
799 static ssize_t
800 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
801 {
802 struct w83627hf_data *data = w83627hf_update_device(dev);
803 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
804 }
805 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
806
807 static ssize_t
808 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
809 {
810 struct w83627hf_data *data = dev_get_drvdata(dev);
811 return sprintf(buf, "%ld\n", (long) data->vrm);
812 }
813 static ssize_t
814 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
815 {
816 struct w83627hf_data *data = dev_get_drvdata(dev);
817 unsigned long val;
818 int err;
819
820 err = kstrtoul(buf, 10, &val);
821 if (err)
822 return err;
823 data->vrm = val;
824
825 return count;
826 }
827 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
828
829 static ssize_t
830 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
831 {
832 struct w83627hf_data *data = w83627hf_update_device(dev);
833 return sprintf(buf, "%ld\n", (long) data->alarms);
834 }
835 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
836
837 static ssize_t
838 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
839 {
840 struct w83627hf_data *data = w83627hf_update_device(dev);
841 int bitnr = to_sensor_dev_attr(attr)->index;
842 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
843 }
844 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
845 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
846 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
847 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
848 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
849 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
850 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
851 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
852 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
853 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
854 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
855 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
856 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
857 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
858 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
859
860 static ssize_t
861 show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
862 {
863 struct w83627hf_data *data = w83627hf_update_device(dev);
864 return sprintf(buf, "%ld\n",
865 (long)BEEP_MASK_FROM_REG(data->beep_mask));
866 }
867
868 static ssize_t
869 store_beep_mask(struct device *dev, struct device_attribute *attr,
870 const char *buf, size_t count)
871 {
872 struct w83627hf_data *data = dev_get_drvdata(dev);
873 unsigned long val;
874 int err;
875
876 err = kstrtoul(buf, 10, &val);
877 if (err)
878 return err;
879
880 mutex_lock(&data->update_lock);
881
882 /* preserve beep enable */
883 data->beep_mask = (data->beep_mask & 0x8000)
884 | BEEP_MASK_TO_REG(val);
885 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
886 data->beep_mask & 0xff);
887 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
888 ((data->beep_mask) >> 16) & 0xff);
889 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
890 (data->beep_mask >> 8) & 0xff);
891
892 mutex_unlock(&data->update_lock);
893 return count;
894 }
895
896 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
897 show_beep_mask, store_beep_mask);
898
899 static ssize_t
900 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
901 {
902 struct w83627hf_data *data = w83627hf_update_device(dev);
903 int bitnr = to_sensor_dev_attr(attr)->index;
904 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
905 }
906
907 static ssize_t
908 store_beep(struct device *dev, struct device_attribute *attr,
909 const char *buf, size_t count)
910 {
911 struct w83627hf_data *data = dev_get_drvdata(dev);
912 int bitnr = to_sensor_dev_attr(attr)->index;
913 u8 reg;
914 unsigned long bit;
915 int err;
916
917 err = kstrtoul(buf, 10, &bit);
918 if (err)
919 return err;
920
921 if (bit & ~1)
922 return -EINVAL;
923
924 mutex_lock(&data->update_lock);
925 if (bit)
926 data->beep_mask |= (1 << bitnr);
927 else
928 data->beep_mask &= ~(1 << bitnr);
929
930 if (bitnr < 8) {
931 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
932 if (bit)
933 reg |= (1 << bitnr);
934 else
935 reg &= ~(1 << bitnr);
936 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
937 } else if (bitnr < 16) {
938 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
939 if (bit)
940 reg |= (1 << (bitnr - 8));
941 else
942 reg &= ~(1 << (bitnr - 8));
943 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
944 } else {
945 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
946 if (bit)
947 reg |= (1 << (bitnr - 16));
948 else
949 reg &= ~(1 << (bitnr - 16));
950 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
951 }
952 mutex_unlock(&data->update_lock);
953
954 return count;
955 }
956
957 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
958 show_beep, store_beep, 0);
959 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
960 show_beep, store_beep, 1);
961 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
962 show_beep, store_beep, 2);
963 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
964 show_beep, store_beep, 3);
965 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
966 show_beep, store_beep, 8);
967 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
968 show_beep, store_beep, 9);
969 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
970 show_beep, store_beep, 10);
971 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
972 show_beep, store_beep, 16);
973 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
974 show_beep, store_beep, 17);
975 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
976 show_beep, store_beep, 6);
977 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
978 show_beep, store_beep, 7);
979 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
980 show_beep, store_beep, 11);
981 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
982 show_beep, store_beep, 4);
983 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
984 show_beep, store_beep, 5);
985 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
986 show_beep, store_beep, 13);
987 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
988 show_beep, store_beep, 15);
989
990 static ssize_t
991 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
992 {
993 int nr = to_sensor_dev_attr(devattr)->index;
994 struct w83627hf_data *data = w83627hf_update_device(dev);
995 return sprintf(buf, "%ld\n",
996 (long) DIV_FROM_REG(data->fan_div[nr]));
997 }
998 /*
999 * Note: we save and restore the fan minimum here, because its value is
1000 * determined in part by the fan divisor. This follows the principle of
1001 * least surprise; the user doesn't expect the fan minimum to change just
1002 * because the divisor changed.
1003 */
1004 static ssize_t
1005 store_fan_div(struct device *dev, struct device_attribute *devattr,
1006 const char *buf, size_t count)
1007 {
1008 int nr = to_sensor_dev_attr(devattr)->index;
1009 struct w83627hf_data *data = dev_get_drvdata(dev);
1010 unsigned long min;
1011 u8 reg;
1012 unsigned long val;
1013 int err;
1014
1015 err = kstrtoul(buf, 10, &val);
1016 if (err)
1017 return err;
1018
1019 mutex_lock(&data->update_lock);
1020
1021 /* Save fan_min */
1022 min = FAN_FROM_REG(data->fan_min[nr],
1023 DIV_FROM_REG(data->fan_div[nr]));
1024
1025 data->fan_div[nr] = DIV_TO_REG(val);
1026
1027 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
1028 & (nr==0 ? 0xcf : 0x3f))
1029 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
1030 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
1031
1032 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
1033 & ~(1 << (5 + nr)))
1034 | ((data->fan_div[nr] & 0x04) << (3 + nr));
1035 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
1036
1037 /* Restore fan_min */
1038 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1039 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
1040
1041 mutex_unlock(&data->update_lock);
1042 return count;
1043 }
1044
1045 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
1046 show_fan_div, store_fan_div, 0);
1047 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
1048 show_fan_div, store_fan_div, 1);
1049 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
1050 show_fan_div, store_fan_div, 2);
1051
1052 static ssize_t
1053 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
1054 {
1055 int nr = to_sensor_dev_attr(devattr)->index;
1056 struct w83627hf_data *data = w83627hf_update_device(dev);
1057 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
1058 }
1059
1060 static ssize_t
1061 store_pwm(struct device *dev, struct device_attribute *devattr,
1062 const char *buf, size_t count)
1063 {
1064 int nr = to_sensor_dev_attr(devattr)->index;
1065 struct w83627hf_data *data = dev_get_drvdata(dev);
1066 unsigned long val;
1067 int err;
1068
1069 err = kstrtoul(buf, 10, &val);
1070 if (err)
1071 return err;
1072
1073 mutex_lock(&data->update_lock);
1074
1075 if (data->type == w83627thf) {
1076 /* bits 0-3 are reserved in 627THF */
1077 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
1078 w83627hf_write_value(data,
1079 W836X7HF_REG_PWM(data->type, nr),
1080 data->pwm[nr] |
1081 (w83627hf_read_value(data,
1082 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
1083 } else {
1084 data->pwm[nr] = PWM_TO_REG(val);
1085 w83627hf_write_value(data,
1086 W836X7HF_REG_PWM(data->type, nr),
1087 data->pwm[nr]);
1088 }
1089
1090 mutex_unlock(&data->update_lock);
1091 return count;
1092 }
1093
1094 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
1095 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
1096 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
1097
1098 static ssize_t
1099 show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
1100 {
1101 int nr = to_sensor_dev_attr(devattr)->index;
1102 struct w83627hf_data *data = w83627hf_update_device(dev);
1103 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
1104 }
1105
1106 static ssize_t
1107 store_pwm_enable(struct device *dev, struct device_attribute *devattr,
1108 const char *buf, size_t count)
1109 {
1110 int nr = to_sensor_dev_attr(devattr)->index;
1111 struct w83627hf_data *data = dev_get_drvdata(dev);
1112 u8 reg;
1113 unsigned long val;
1114 int err;
1115
1116 err = kstrtoul(buf, 10, &val);
1117 if (err)
1118 return err;
1119
1120 if (!val || val > 3) /* modes 1, 2 and 3 are supported */
1121 return -EINVAL;
1122 mutex_lock(&data->update_lock);
1123 data->pwm_enable[nr] = val;
1124 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
1125 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
1126 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
1127 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
1128 mutex_unlock(&data->update_lock);
1129 return count;
1130 }
1131
1132 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1133 store_pwm_enable, 0);
1134 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1135 store_pwm_enable, 1);
1136 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
1137 store_pwm_enable, 2);
1138
1139 static ssize_t
1140 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1141 {
1142 int nr = to_sensor_dev_attr(devattr)->index;
1143 struct w83627hf_data *data = w83627hf_update_device(dev);
1144 if (data->type == w83627hf)
1145 return sprintf(buf, "%ld\n",
1146 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1147 else
1148 return sprintf(buf, "%ld\n",
1149 pwm_freq_from_reg(data->pwm_freq[nr]));
1150 }
1151
1152 static ssize_t
1153 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1154 const char *buf, size_t count)
1155 {
1156 int nr = to_sensor_dev_attr(devattr)->index;
1157 struct w83627hf_data *data = dev_get_drvdata(dev);
1158 static const u8 mask[]={0xF8, 0x8F};
1159 unsigned long val;
1160 int err;
1161
1162 err = kstrtoul(buf, 10, &val);
1163 if (err)
1164 return err;
1165
1166 mutex_lock(&data->update_lock);
1167
1168 if (data->type == w83627hf) {
1169 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1170 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
1171 (data->pwm_freq[nr] << (nr*4)) |
1172 (w83627hf_read_value(data,
1173 W83627HF_REG_PWM_FREQ) & mask[nr]));
1174 } else {
1175 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1176 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1177 data->pwm_freq[nr]);
1178 }
1179
1180 mutex_unlock(&data->update_lock);
1181 return count;
1182 }
1183
1184 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1185 show_pwm_freq, store_pwm_freq, 0);
1186 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1187 show_pwm_freq, store_pwm_freq, 1);
1188 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1189 show_pwm_freq, store_pwm_freq, 2);
1190
1191 static ssize_t
1192 show_temp_type(struct device *dev, struct device_attribute *devattr,
1193 char *buf)
1194 {
1195 int nr = to_sensor_dev_attr(devattr)->index;
1196 struct w83627hf_data *data = w83627hf_update_device(dev);
1197 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1198 }
1199
1200 static ssize_t
1201 store_temp_type(struct device *dev, struct device_attribute *devattr,
1202 const char *buf, size_t count)
1203 {
1204 int nr = to_sensor_dev_attr(devattr)->index;
1205 struct w83627hf_data *data = dev_get_drvdata(dev);
1206 unsigned long val;
1207 u32 tmp;
1208 int err;
1209
1210 err = kstrtoul(buf, 10, &val);
1211 if (err)
1212 return err;
1213
1214 mutex_lock(&data->update_lock);
1215
1216 switch (val) {
1217 case 1: /* PII/Celeron diode */
1218 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1219 w83627hf_write_value(data, W83781D_REG_SCFG1,
1220 tmp | BIT_SCFG1[nr]);
1221 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1222 w83627hf_write_value(data, W83781D_REG_SCFG2,
1223 tmp | BIT_SCFG2[nr]);
1224 data->sens[nr] = val;
1225 break;
1226 case 2: /* 3904 */
1227 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1228 w83627hf_write_value(data, W83781D_REG_SCFG1,
1229 tmp | BIT_SCFG1[nr]);
1230 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1231 w83627hf_write_value(data, W83781D_REG_SCFG2,
1232 tmp & ~BIT_SCFG2[nr]);
1233 data->sens[nr] = val;
1234 break;
1235 case W83781D_DEFAULT_BETA:
1236 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1237 "instead\n", W83781D_DEFAULT_BETA);
1238 /* fall through */
1239 case 4: /* thermistor */
1240 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1241 w83627hf_write_value(data, W83781D_REG_SCFG1,
1242 tmp & ~BIT_SCFG1[nr]);
1243 data->sens[nr] = val;
1244 break;
1245 default:
1246 dev_err(dev,
1247 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1248 (long) val);
1249 break;
1250 }
1251
1252 mutex_unlock(&data->update_lock);
1253 return count;
1254 }
1255
1256 #define sysfs_temp_type(offset) \
1257 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1258 show_temp_type, store_temp_type, offset - 1);
1259
1260 sysfs_temp_type(1);
1261 sysfs_temp_type(2);
1262 sysfs_temp_type(3);
1263
1264 static ssize_t
1265 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1266 {
1267 struct w83627hf_data *data = dev_get_drvdata(dev);
1268
1269 return sprintf(buf, "%s\n", data->name);
1270 }
1271 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1272
1273 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1274 struct w83627hf_sio_data *sio_data)
1275 {
1276 int err = -ENODEV;
1277 u16 val;
1278
1279 static __initconst char *const names[] = {
1280 "W83627HF",
1281 "W83627THF",
1282 "W83697HF",
1283 "W83637HF",
1284 "W83687THF",
1285 };
1286
1287 sio_data->sioaddr = sioaddr;
1288 superio_enter(sio_data);
1289 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1290 switch (val) {
1291 case W627_DEVID:
1292 sio_data->type = w83627hf;
1293 break;
1294 case W627THF_DEVID:
1295 sio_data->type = w83627thf;
1296 break;
1297 case W697_DEVID:
1298 sio_data->type = w83697hf;
1299 break;
1300 case W637_DEVID:
1301 sio_data->type = w83637hf;
1302 break;
1303 case W687THF_DEVID:
1304 sio_data->type = w83687thf;
1305 break;
1306 case 0xff: /* No device at all */
1307 goto exit;
1308 default:
1309 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1310 goto exit;
1311 }
1312
1313 superio_select(sio_data, W83627HF_LD_HWM);
1314 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1315 superio_inb(sio_data, WINB_BASE_REG + 1);
1316 *addr = val & WINB_ALIGNMENT;
1317 if (*addr == 0) {
1318 pr_warn("Base address not set, skipping\n");
1319 goto exit;
1320 }
1321
1322 val = superio_inb(sio_data, WINB_ACT_REG);
1323 if (!(val & 0x01)) {
1324 pr_warn("Enabling HWM logical device\n");
1325 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1326 }
1327
1328 err = 0;
1329 pr_info(DRVNAME ": Found %s chip at %#x\n",
1330 names[sio_data->type], *addr);
1331
1332 exit:
1333 superio_exit(sio_data);
1334 return err;
1335 }
1336
1337 #define VIN_UNIT_ATTRS(_X_) \
1338 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1339 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1340 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1341 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1342 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
1343
1344 #define FAN_UNIT_ATTRS(_X_) \
1345 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1346 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1347 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1348 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1349 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
1350
1351 #define TEMP_UNIT_ATTRS(_X_) \
1352 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1353 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1354 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1355 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1356 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1357 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
1358
1359 static struct attribute *w83627hf_attributes[] = {
1360 &dev_attr_in0_input.attr,
1361 &dev_attr_in0_min.attr,
1362 &dev_attr_in0_max.attr,
1363 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1364 &sensor_dev_attr_in0_beep.dev_attr.attr,
1365 VIN_UNIT_ATTRS(2),
1366 VIN_UNIT_ATTRS(3),
1367 VIN_UNIT_ATTRS(4),
1368 VIN_UNIT_ATTRS(7),
1369 VIN_UNIT_ATTRS(8),
1370
1371 FAN_UNIT_ATTRS(1),
1372 FAN_UNIT_ATTRS(2),
1373
1374 TEMP_UNIT_ATTRS(1),
1375 TEMP_UNIT_ATTRS(2),
1376
1377 &dev_attr_alarms.attr,
1378 &sensor_dev_attr_beep_enable.dev_attr.attr,
1379 &dev_attr_beep_mask.attr,
1380
1381 &sensor_dev_attr_pwm1.dev_attr.attr,
1382 &sensor_dev_attr_pwm2.dev_attr.attr,
1383 &dev_attr_name.attr,
1384 NULL
1385 };
1386
1387 static const struct attribute_group w83627hf_group = {
1388 .attrs = w83627hf_attributes,
1389 };
1390
1391 static struct attribute *w83627hf_attributes_opt[] = {
1392 VIN_UNIT_ATTRS(1),
1393 VIN_UNIT_ATTRS(5),
1394 VIN_UNIT_ATTRS(6),
1395
1396 FAN_UNIT_ATTRS(3),
1397 TEMP_UNIT_ATTRS(3),
1398 &sensor_dev_attr_pwm3.dev_attr.attr,
1399
1400 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1401 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1402 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1403
1404 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1405 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1406 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1407
1408 NULL
1409 };
1410
1411 static const struct attribute_group w83627hf_group_opt = {
1412 .attrs = w83627hf_attributes_opt,
1413 };
1414
1415 static int w83627hf_probe(struct platform_device *pdev)
1416 {
1417 struct device *dev = &pdev->dev;
1418 struct w83627hf_sio_data *sio_data = dev->platform_data;
1419 struct w83627hf_data *data;
1420 struct resource *res;
1421 int err, i;
1422
1423 static const char *names[] = {
1424 "w83627hf",
1425 "w83627thf",
1426 "w83697hf",
1427 "w83637hf",
1428 "w83687thf",
1429 };
1430
1431 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1432 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
1433 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1434 (unsigned long)res->start,
1435 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1436 return -EBUSY;
1437 }
1438
1439 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
1440 if (!data)
1441 return -ENOMEM;
1442
1443 data->addr = res->start;
1444 data->type = sio_data->type;
1445 data->name = names[sio_data->type];
1446 mutex_init(&data->lock);
1447 mutex_init(&data->update_lock);
1448 platform_set_drvdata(pdev, data);
1449
1450 /* Initialize the chip */
1451 w83627hf_init_device(pdev);
1452
1453 /* A few vars need to be filled upon startup */
1454 for (i = 0; i <= 2; i++)
1455 data->fan_min[i] = w83627hf_read_value(
1456 data, W83627HF_REG_FAN_MIN(i));
1457 w83627hf_update_fan_div(data);
1458
1459 /* Register common device attributes */
1460 err = sysfs_create_group(&dev->kobj, &w83627hf_group);
1461 if (err)
1462 return err;
1463
1464 /* Register chip-specific device attributes */
1465 if (data->type == w83627hf || data->type == w83697hf)
1466 if ((err = device_create_file(dev,
1467 &sensor_dev_attr_in5_input.dev_attr))
1468 || (err = device_create_file(dev,
1469 &sensor_dev_attr_in5_min.dev_attr))
1470 || (err = device_create_file(dev,
1471 &sensor_dev_attr_in5_max.dev_attr))
1472 || (err = device_create_file(dev,
1473 &sensor_dev_attr_in5_alarm.dev_attr))
1474 || (err = device_create_file(dev,
1475 &sensor_dev_attr_in5_beep.dev_attr))
1476 || (err = device_create_file(dev,
1477 &sensor_dev_attr_in6_input.dev_attr))
1478 || (err = device_create_file(dev,
1479 &sensor_dev_attr_in6_min.dev_attr))
1480 || (err = device_create_file(dev,
1481 &sensor_dev_attr_in6_max.dev_attr))
1482 || (err = device_create_file(dev,
1483 &sensor_dev_attr_in6_alarm.dev_attr))
1484 || (err = device_create_file(dev,
1485 &sensor_dev_attr_in6_beep.dev_attr))
1486 || (err = device_create_file(dev,
1487 &sensor_dev_attr_pwm1_freq.dev_attr))
1488 || (err = device_create_file(dev,
1489 &sensor_dev_attr_pwm2_freq.dev_attr)))
1490 goto error;
1491
1492 if (data->type != w83697hf)
1493 if ((err = device_create_file(dev,
1494 &sensor_dev_attr_in1_input.dev_attr))
1495 || (err = device_create_file(dev,
1496 &sensor_dev_attr_in1_min.dev_attr))
1497 || (err = device_create_file(dev,
1498 &sensor_dev_attr_in1_max.dev_attr))
1499 || (err = device_create_file(dev,
1500 &sensor_dev_attr_in1_alarm.dev_attr))
1501 || (err = device_create_file(dev,
1502 &sensor_dev_attr_in1_beep.dev_attr))
1503 || (err = device_create_file(dev,
1504 &sensor_dev_attr_fan3_input.dev_attr))
1505 || (err = device_create_file(dev,
1506 &sensor_dev_attr_fan3_min.dev_attr))
1507 || (err = device_create_file(dev,
1508 &sensor_dev_attr_fan3_div.dev_attr))
1509 || (err = device_create_file(dev,
1510 &sensor_dev_attr_fan3_alarm.dev_attr))
1511 || (err = device_create_file(dev,
1512 &sensor_dev_attr_fan3_beep.dev_attr))
1513 || (err = device_create_file(dev,
1514 &sensor_dev_attr_temp3_input.dev_attr))
1515 || (err = device_create_file(dev,
1516 &sensor_dev_attr_temp3_max.dev_attr))
1517 || (err = device_create_file(dev,
1518 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1519 || (err = device_create_file(dev,
1520 &sensor_dev_attr_temp3_alarm.dev_attr))
1521 || (err = device_create_file(dev,
1522 &sensor_dev_attr_temp3_beep.dev_attr))
1523 || (err = device_create_file(dev,
1524 &sensor_dev_attr_temp3_type.dev_attr)))
1525 goto error;
1526
1527 if (data->type != w83697hf && data->vid != 0xff) {
1528 /* Convert VID to voltage based on VRM */
1529 data->vrm = vid_which_vrm();
1530
1531 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1532 || (err = device_create_file(dev, &dev_attr_vrm)))
1533 goto error;
1534 }
1535
1536 if (data->type == w83627thf || data->type == w83637hf
1537 || data->type == w83687thf) {
1538 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
1539 if (err)
1540 goto error;
1541 }
1542
1543 if (data->type == w83637hf || data->type == w83687thf)
1544 if ((err = device_create_file(dev,
1545 &sensor_dev_attr_pwm1_freq.dev_attr))
1546 || (err = device_create_file(dev,
1547 &sensor_dev_attr_pwm2_freq.dev_attr))
1548 || (err = device_create_file(dev,
1549 &sensor_dev_attr_pwm3_freq.dev_attr)))
1550 goto error;
1551
1552 if (data->type != w83627hf)
1553 if ((err = device_create_file(dev,
1554 &sensor_dev_attr_pwm1_enable.dev_attr))
1555 || (err = device_create_file(dev,
1556 &sensor_dev_attr_pwm2_enable.dev_attr)))
1557 goto error;
1558
1559 if (data->type == w83627thf || data->type == w83637hf
1560 || data->type == w83687thf) {
1561 err = device_create_file(dev,
1562 &sensor_dev_attr_pwm3_enable.dev_attr);
1563 if (err)
1564 goto error;
1565 }
1566
1567 data->hwmon_dev = hwmon_device_register(dev);
1568 if (IS_ERR(data->hwmon_dev)) {
1569 err = PTR_ERR(data->hwmon_dev);
1570 goto error;
1571 }
1572
1573 return 0;
1574
1575 error:
1576 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1577 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1578 return err;
1579 }
1580
1581 static int w83627hf_remove(struct platform_device *pdev)
1582 {
1583 struct w83627hf_data *data = platform_get_drvdata(pdev);
1584
1585 hwmon_device_unregister(data->hwmon_dev);
1586
1587 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1588 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1589
1590 return 0;
1591 }
1592
1593
1594 /* Registers 0x50-0x5f are banked */
1595 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1596 {
1597 if ((reg & 0x00f0) == 0x50) {
1598 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1599 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1600 }
1601 }
1602
1603 /* Not strictly necessary, but play it safe for now */
1604 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1605 {
1606 if (reg & 0xff00) {
1607 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1608 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1609 }
1610 }
1611
1612 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1613 {
1614 int res, word_sized;
1615
1616 mutex_lock(&data->lock);
1617 word_sized = (((reg & 0xff00) == 0x100)
1618 || ((reg & 0xff00) == 0x200))
1619 && (((reg & 0x00ff) == 0x50)
1620 || ((reg & 0x00ff) == 0x53)
1621 || ((reg & 0x00ff) == 0x55));
1622 w83627hf_set_bank(data, reg);
1623 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1624 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1625 if (word_sized) {
1626 outb_p((reg & 0xff) + 1,
1627 data->addr + W83781D_ADDR_REG_OFFSET);
1628 res =
1629 (res << 8) + inb_p(data->addr +
1630 W83781D_DATA_REG_OFFSET);
1631 }
1632 w83627hf_reset_bank(data, reg);
1633 mutex_unlock(&data->lock);
1634 return res;
1635 }
1636
1637 static int w83627thf_read_gpio5(struct platform_device *pdev)
1638 {
1639 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1640 int res = 0xff, sel;
1641
1642 superio_enter(sio_data);
1643 superio_select(sio_data, W83627HF_LD_GPIO5);
1644
1645 /* Make sure these GPIO pins are enabled */
1646 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1647 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1648 goto exit;
1649 }
1650
1651 /*
1652 * Make sure the pins are configured for input
1653 * There must be at least five (VRM 9), and possibly 6 (VRM 10)
1654 */
1655 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1656 if ((sel & 0x1f) != 0x1f) {
1657 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1658 "function\n");
1659 goto exit;
1660 }
1661
1662 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1663 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1664
1665 exit:
1666 superio_exit(sio_data);
1667 return res;
1668 }
1669
1670 static int w83687thf_read_vid(struct platform_device *pdev)
1671 {
1672 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1673 int res = 0xff;
1674
1675 superio_enter(sio_data);
1676 superio_select(sio_data, W83627HF_LD_HWM);
1677
1678 /* Make sure these GPIO pins are enabled */
1679 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1680 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1681 goto exit;
1682 }
1683
1684 /* Make sure the pins are configured for input */
1685 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1686 dev_dbg(&pdev->dev, "VID configured as output, "
1687 "no VID function\n");
1688 goto exit;
1689 }
1690
1691 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1692
1693 exit:
1694 superio_exit(sio_data);
1695 return res;
1696 }
1697
1698 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1699 {
1700 int word_sized;
1701
1702 mutex_lock(&data->lock);
1703 word_sized = (((reg & 0xff00) == 0x100)
1704 || ((reg & 0xff00) == 0x200))
1705 && (((reg & 0x00ff) == 0x53)
1706 || ((reg & 0x00ff) == 0x55));
1707 w83627hf_set_bank(data, reg);
1708 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1709 if (word_sized) {
1710 outb_p(value >> 8,
1711 data->addr + W83781D_DATA_REG_OFFSET);
1712 outb_p((reg & 0xff) + 1,
1713 data->addr + W83781D_ADDR_REG_OFFSET);
1714 }
1715 outb_p(value & 0xff,
1716 data->addr + W83781D_DATA_REG_OFFSET);
1717 w83627hf_reset_bank(data, reg);
1718 mutex_unlock(&data->lock);
1719 return 0;
1720 }
1721
1722 static void w83627hf_init_device(struct platform_device *pdev)
1723 {
1724 struct w83627hf_data *data = platform_get_drvdata(pdev);
1725 int i;
1726 enum chips type = data->type;
1727 u8 tmp;
1728
1729 /* Minimize conflicts with other winbond i2c-only clients... */
1730 /* disable i2c subclients... how to disable main i2c client?? */
1731 /* force i2c address to relatively uncommon address */
1732 if (type == w83627hf) {
1733 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1734 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1735 }
1736
1737 /* Read VID only once */
1738 if (type == w83627hf || type == w83637hf) {
1739 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1740 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1741 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1742 } else if (type == w83627thf) {
1743 data->vid = w83627thf_read_gpio5(pdev);
1744 } else if (type == w83687thf) {
1745 data->vid = w83687thf_read_vid(pdev);
1746 }
1747
1748 /* Read VRM & OVT Config only once */
1749 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1750 data->vrm_ovt =
1751 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1752 }
1753
1754 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1755 for (i = 1; i <= 3; i++) {
1756 if (!(tmp & BIT_SCFG1[i - 1])) {
1757 data->sens[i - 1] = 4;
1758 } else {
1759 if (w83627hf_read_value
1760 (data,
1761 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1762 data->sens[i - 1] = 1;
1763 else
1764 data->sens[i - 1] = 2;
1765 }
1766 if ((type == w83697hf) && (i == 2))
1767 break;
1768 }
1769
1770 if(init) {
1771 /* Enable temp2 */
1772 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1773 if (tmp & 0x01) {
1774 dev_warn(&pdev->dev, "Enabling temp2, readings "
1775 "might not make sense\n");
1776 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1777 tmp & 0xfe);
1778 }
1779
1780 /* Enable temp3 */
1781 if (type != w83697hf) {
1782 tmp = w83627hf_read_value(data,
1783 W83627HF_REG_TEMP3_CONFIG);
1784 if (tmp & 0x01) {
1785 dev_warn(&pdev->dev, "Enabling temp3, "
1786 "readings might not make sense\n");
1787 w83627hf_write_value(data,
1788 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1789 }
1790 }
1791 }
1792
1793 /* Start monitoring */
1794 w83627hf_write_value(data, W83781D_REG_CONFIG,
1795 (w83627hf_read_value(data,
1796 W83781D_REG_CONFIG) & 0xf7)
1797 | 0x01);
1798
1799 /* Enable VBAT monitoring if needed */
1800 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1801 if (!(tmp & 0x01))
1802 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1803 }
1804
1805 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1806 {
1807 int reg;
1808
1809 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1810 data->fan_div[0] = (reg >> 4) & 0x03;
1811 data->fan_div[1] = (reg >> 6) & 0x03;
1812 if (data->type != w83697hf) {
1813 data->fan_div[2] = (w83627hf_read_value(data,
1814 W83781D_REG_PIN) >> 6) & 0x03;
1815 }
1816 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1817 data->fan_div[0] |= (reg >> 3) & 0x04;
1818 data->fan_div[1] |= (reg >> 4) & 0x04;
1819 if (data->type != w83697hf)
1820 data->fan_div[2] |= (reg >> 5) & 0x04;
1821 }
1822
1823 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1824 {
1825 struct w83627hf_data *data = dev_get_drvdata(dev);
1826 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1827 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1828
1829 mutex_lock(&data->update_lock);
1830
1831 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1832 || !data->valid) {
1833 for (i = 0; i <= 8; i++) {
1834 /* skip missing sensors */
1835 if (((data->type == w83697hf) && (i == 1)) ||
1836 ((data->type != w83627hf && data->type != w83697hf)
1837 && (i == 5 || i == 6)))
1838 continue;
1839 data->in[i] =
1840 w83627hf_read_value(data, W83781D_REG_IN(i));
1841 data->in_min[i] =
1842 w83627hf_read_value(data,
1843 W83781D_REG_IN_MIN(i));
1844 data->in_max[i] =
1845 w83627hf_read_value(data,
1846 W83781D_REG_IN_MAX(i));
1847 }
1848 for (i = 0; i <= 2; i++) {
1849 data->fan[i] =
1850 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1851 data->fan_min[i] =
1852 w83627hf_read_value(data,
1853 W83627HF_REG_FAN_MIN(i));
1854 }
1855 for (i = 0; i <= 2; i++) {
1856 u8 tmp = w83627hf_read_value(data,
1857 W836X7HF_REG_PWM(data->type, i));
1858 /* bits 0-3 are reserved in 627THF */
1859 if (data->type == w83627thf)
1860 tmp &= 0xf0;
1861 data->pwm[i] = tmp;
1862 if (i == 1 &&
1863 (data->type == w83627hf || data->type == w83697hf))
1864 break;
1865 }
1866 if (data->type == w83627hf) {
1867 u8 tmp = w83627hf_read_value(data,
1868 W83627HF_REG_PWM_FREQ);
1869 data->pwm_freq[0] = tmp & 0x07;
1870 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1871 } else if (data->type != w83627thf) {
1872 for (i = 1; i <= 3; i++) {
1873 data->pwm_freq[i - 1] =
1874 w83627hf_read_value(data,
1875 W83637HF_REG_PWM_FREQ[i - 1]);
1876 if (i == 2 && (data->type == w83697hf))
1877 break;
1878 }
1879 }
1880 if (data->type != w83627hf) {
1881 for (i = 0; i < num_pwms; i++) {
1882 u8 tmp = w83627hf_read_value(data,
1883 W83627THF_REG_PWM_ENABLE[i]);
1884 data->pwm_enable[i] =
1885 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1886 & 0x03) + 1;
1887 }
1888 }
1889 for (i = 0; i < num_temps; i++) {
1890 data->temp[i] = w83627hf_read_value(
1891 data, w83627hf_reg_temp[i]);
1892 data->temp_max[i] = w83627hf_read_value(
1893 data, w83627hf_reg_temp_over[i]);
1894 data->temp_max_hyst[i] = w83627hf_read_value(
1895 data, w83627hf_reg_temp_hyst[i]);
1896 }
1897
1898 w83627hf_update_fan_div(data);
1899
1900 data->alarms =
1901 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1902 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1903 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1904 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1905 data->beep_mask = (i << 8) |
1906 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1907 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1908 data->last_updated = jiffies;
1909 data->valid = 1;
1910 }
1911
1912 mutex_unlock(&data->update_lock);
1913
1914 return data;
1915 }
1916
1917 static int __init w83627hf_device_add(unsigned short address,
1918 const struct w83627hf_sio_data *sio_data)
1919 {
1920 struct resource res = {
1921 .start = address + WINB_REGION_OFFSET,
1922 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1923 .name = DRVNAME,
1924 .flags = IORESOURCE_IO,
1925 };
1926 int err;
1927
1928 err = acpi_check_resource_conflict(&res);
1929 if (err)
1930 goto exit;
1931
1932 pdev = platform_device_alloc(DRVNAME, address);
1933 if (!pdev) {
1934 err = -ENOMEM;
1935 pr_err("Device allocation failed\n");
1936 goto exit;
1937 }
1938
1939 err = platform_device_add_resources(pdev, &res, 1);
1940 if (err) {
1941 pr_err("Device resource addition failed (%d)\n", err);
1942 goto exit_device_put;
1943 }
1944
1945 err = platform_device_add_data(pdev, sio_data,
1946 sizeof(struct w83627hf_sio_data));
1947 if (err) {
1948 pr_err("Platform data allocation failed\n");
1949 goto exit_device_put;
1950 }
1951
1952 err = platform_device_add(pdev);
1953 if (err) {
1954 pr_err("Device addition failed (%d)\n", err);
1955 goto exit_device_put;
1956 }
1957
1958 return 0;
1959
1960 exit_device_put:
1961 platform_device_put(pdev);
1962 exit:
1963 return err;
1964 }
1965
1966 static int __init sensors_w83627hf_init(void)
1967 {
1968 int err;
1969 unsigned short address;
1970 struct w83627hf_sio_data sio_data;
1971
1972 if (w83627hf_find(0x2e, &address, &sio_data)
1973 && w83627hf_find(0x4e, &address, &sio_data))
1974 return -ENODEV;
1975
1976 err = platform_driver_register(&w83627hf_driver);
1977 if (err)
1978 goto exit;
1979
1980 /* Sets global pdev as a side effect */
1981 err = w83627hf_device_add(address, &sio_data);
1982 if (err)
1983 goto exit_driver;
1984
1985 return 0;
1986
1987 exit_driver:
1988 platform_driver_unregister(&w83627hf_driver);
1989 exit:
1990 return err;
1991 }
1992
1993 static void __exit sensors_w83627hf_exit(void)
1994 {
1995 platform_device_unregister(pdev);
1996 platform_driver_unregister(&w83627hf_driver);
1997 }
1998
1999 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2000 "Philip Edelbrock <phil@netroedge.com>, "
2001 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2002 MODULE_DESCRIPTION("W83627HF driver");
2003 MODULE_LICENSE("GPL");
2004
2005 module_init(sensors_w83627hf_init);
2006 module_exit(sensors_w83627hf_exit);
kernel source for telekom puls (alcatel/mediatek)