drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "omap_drv.h"
  21
  22 #include "drm_crtc_helper.h"
  23 #include "drm_fb_helper.h"
  24 #include "omap_dmm_tiler.h"
  25
  26 #define DRIVER_NAME             MODULE_NAME
  27 #define DRIVER_DESC             "OMAP DRM"
  28 #define DRIVER_DATE             "20110917"
  29 #define DRIVER_MAJOR            1
  30 #define DRIVER_MINOR            0
  31 #define DRIVER_PATCHLEVEL       0
  32
  33 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  34
  35 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  36 module_param(num_crtc, int, 0600);
  37
  38 /*
  39  * mode config funcs
  40  */
  41
  42 /* Notes about mapping DSS and DRM entities:
  43  *    CRTC:        overlay
  44  *    encoder:     manager.. with some extension to allow one primary CRTC
  45  *                 and zero or more video CRTC's to be mapped to one encoder?
  46  *    connector:   dssdev.. manager can be attached/detached from different
  47  *                 devices
  48  */
  49
  50 static void omap_fb_output_poll_changed(struct drm_device *dev)
  51 {
  52         struct omap_drm_private *priv = dev->dev_private;
  53         DBG("dev=%p", dev);
  54         if (priv->fbdev)
  55                 drm_fb_helper_hotplug_event(priv->fbdev);
  56 }
  57
  58 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
  59         .fb_create = omap_framebuffer_create,
  60         .output_poll_changed = omap_fb_output_poll_changed,
  61 };
  62
  63 static int get_connector_type(struct omap_dss_device *dssdev)
  64 {
  65         switch (dssdev->type) {
  66         case OMAP_DISPLAY_TYPE_HDMI:
  67                 return DRM_MODE_CONNECTOR_HDMIA;
  68         case OMAP_DISPLAY_TYPE_DPI:
  69                 if (!strcmp(dssdev->name, "dvi"))
  70                         return DRM_MODE_CONNECTOR_DVID;
  71                 /* fallthrough */
  72         default:
  73                 return DRM_MODE_CONNECTOR_Unknown;
  74         }
  75 }
  76
  77 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
  78 {
  79         struct omap_drm_private *priv = dev->dev_private;
  80         int i;
  81
  82         for (i = 0; i < priv->num_crtcs; i++) {
  83                 struct drm_crtc *crtc = priv->crtcs[i];
  84
  85                 if (omap_crtc_channel(crtc) == channel)
  86                         return true;
  87         }
  88
  89         return false;
  90 }
  91
  92 static int omap_modeset_init(struct drm_device *dev)
  93 {
  94         struct omap_drm_private *priv = dev->dev_private;
  95         struct omap_dss_device *dssdev = NULL;
  96         int num_ovls = dss_feat_get_num_ovls();
  97         int num_mgrs = dss_feat_get_num_mgrs();
  98         int num_crtcs;
  99         int i, id = 0;
 100
 101         drm_mode_config_init(dev);
 102
 103         omap_drm_irq_install(dev);
 104
 105         /*
 106          * We usually don't want to create a CRTC for each manager, at least
 107          * not until we have a way to expose private planes to userspace.
 108          * Otherwise there would not be enough video pipes left for drm planes.
 109          * We use the num_crtc argument to limit the number of crtcs we create.
 110          */
 111         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 112
 113         dssdev = NULL;
 114
 115         for_each_dss_dev(dssdev) {
 116                 struct drm_connector *connector;
 117                 struct drm_encoder *encoder;
 118                 enum omap_channel channel;
 119
 120                 if (!dssdev->driver) {
 121                         dev_warn(dev->dev, "%s has no driver.. skipping it\n",
 122                                         dssdev->name);
 123                         continue;
 124                 }
 125
 126                 if (!(dssdev->driver->get_timings ||
 127                                         dssdev->driver->read_edid)) {
 128                         dev_warn(dev->dev, "%s driver does not support "
 129                                 "get_timings or read_edid.. skipping it!\n",
 130                                 dssdev->name);
 131                         continue;
 132                 }
 133
 134                 encoder = omap_encoder_init(dev, dssdev);
 135
 136                 if (!encoder) {
 137                         dev_err(dev->dev, "could not create encoder: %s\n",
 138                                         dssdev->name);
 139                         return -ENOMEM;
 140                 }
 141
 142                 connector = omap_connector_init(dev,
 143                                 get_connector_type(dssdev), dssdev, encoder);
 144
 145                 if (!connector) {
 146                         dev_err(dev->dev, "could not create connector: %s\n",
 147                                         dssdev->name);
 148                         return -ENOMEM;
 149                 }
 150
 151                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 152                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 153
 154                 priv->encoders[priv->num_encoders++] = encoder;
 155                 priv->connectors[priv->num_connectors++] = connector;
 156
 157                 drm_mode_connector_attach_encoder(connector, encoder);
 158
 159                 /*
 160                  * if we have reached the limit of the crtcs we are allowed to
 161                  * create, let's not try to look for a crtc for this
 162                  * panel/encoder and onwards, we will, of course, populate the
 163                  * the possible_crtcs field for all the encoders with the final
 164                  * set of crtcs we create
 165                  */
 166                 if (id == num_crtcs)
 167                         continue;
 168
 169                 /*
 170                  * get the recommended DISPC channel for this encoder. For now,
 171                  * we only try to get create a crtc out of the recommended, the
 172                  * other possible channels to which the encoder can connect are
 173                  * not considered.
 174                  */
 175                 channel = dssdev->output->dispc_channel;
 176
 177                 /*
 178                  * if this channel hasn't already been taken by a previously
 179                  * allocated crtc, we create a new crtc for it
 180                  */
 181                 if (!channel_used(dev, channel)) {
 182                         struct drm_plane *plane;
 183                         struct drm_crtc *crtc;
 184
 185                         plane = omap_plane_init(dev, id, true);
 186                         crtc = omap_crtc_init(dev, plane, channel, id);
 187
 188                         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 189                         priv->crtcs[id] = crtc;
 190                         priv->num_crtcs++;
 191
 192                         priv->planes[id] = plane;
 193                         priv->num_planes++;
 194
 195                         id++;
 196                 }
 197         }
 198
 199         /*
 200          * we have allocated crtcs according to the need of the panels/encoders,
 201          * adding more crtcs here if needed
 202          */
 203         for (; id < num_crtcs; id++) {
 204
 205                 /* find a free manager for this crtc */
 206                 for (i = 0; i < num_mgrs; i++) {
 207                         if (!channel_used(dev, i)) {
 208                                 struct drm_plane *plane;
 209                                 struct drm_crtc *crtc;
 210
 211                                 plane = omap_plane_init(dev, id, true);
 212                                 crtc = omap_crtc_init(dev, plane, i, id);
 213
 214                                 BUG_ON(priv->num_crtcs >=
 215                                         ARRAY_SIZE(priv->crtcs));
 216
 217                                 priv->crtcs[id] = crtc;
 218                                 priv->num_crtcs++;
 219
 220                                 priv->planes[id] = plane;
 221                                 priv->num_planes++;
 222
 223                                 break;
 224                         } else {
 225                                 continue;
 226                         }
 227                 }
 228
 229                 if (i == num_mgrs) {
 230                         /* this shouldn't really happen */
 231                         dev_err(dev->dev, "no managers left for crtc\n");
 232                         return -ENOMEM;
 233                 }
 234         }
 235
 236         /*
 237          * Create normal planes for the remaining overlays:
 238          */
 239         for (; id < num_ovls; id++) {
 240                 struct drm_plane *plane = omap_plane_init(dev, id, false);
 241
 242                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 243                 priv->planes[priv->num_planes++] = plane;
 244         }
 245
 246         for (i = 0; i < priv->num_encoders; i++) {
 247                 struct drm_encoder *encoder = priv->encoders[i];
 248                 struct omap_dss_device *dssdev =
 249                                         omap_encoder_get_dssdev(encoder);
 250
 251                 /* figure out which crtc's we can connect the encoder to: */
 252                 encoder->possible_crtcs = 0;
 253                 for (id = 0; id < priv->num_crtcs; id++) {
 254                         struct drm_crtc *crtc = priv->crtcs[id];
 255                         enum omap_channel crtc_channel;
 256                         enum omap_dss_output_id supported_outputs;
 257
 258                         crtc_channel = omap_crtc_channel(crtc);
 259                         supported_outputs =
 260                                 dss_feat_get_supported_outputs(crtc_channel);
 261
 262                         if (supported_outputs & dssdev->output->id)
 263                                 encoder->possible_crtcs |= (1 << id);
 264                 }
 265         }
 266
 267         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 268                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 269                 priv->num_connectors);
 270
 271         dev->mode_config.min_width = 32;
 272         dev->mode_config.min_height = 32;
 273
 274         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 275          * to fill in these limits properly on different OMAP generations..
 276          */
 277         dev->mode_config.max_width = 2048;
 278         dev->mode_config.max_height = 2048;
 279
 280         dev->mode_config.funcs = &omap_mode_config_funcs;
 281
 282         return 0;
 283 }
 284
 285 static void omap_modeset_free(struct drm_device *dev)
 286 {
 287         drm_mode_config_cleanup(dev);
 288 }
 289
 290 /*
 291  * drm ioctl funcs
 292  */
 293
 294
 295 static int ioctl_get_param(struct drm_device *dev, void *data,
 296                 struct drm_file *file_priv)
 297 {
 298         struct omap_drm_private *priv = dev->dev_private;
 299         struct drm_omap_param *args = data;
 300
 301         DBG("%p: param=%llu", dev, args->param);
 302
 303         switch (args->param) {
 304         case OMAP_PARAM_CHIPSET_ID:
 305                 args->value = priv->omaprev;
 306                 break;
 307         default:
 308                 DBG("unknown parameter %lld", args->param);
 309                 return -EINVAL;
 310         }
 311
 312         return 0;
 313 }
 314
 315 static int ioctl_set_param(struct drm_device *dev, void *data,
 316                 struct drm_file *file_priv)
 317 {
 318         struct drm_omap_param *args = data;
 319
 320         switch (args->param) {
 321         default:
 322                 DBG("unknown parameter %lld", args->param);
 323                 return -EINVAL;
 324         }
 325
 326         return 0;
 327 }
 328
 329 static int ioctl_gem_new(struct drm_device *dev, void *data,
 330                 struct drm_file *file_priv)
 331 {
 332         struct drm_omap_gem_new *args = data;
 333         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 334                         args->size.bytes, args->flags);
 335         return omap_gem_new_handle(dev, file_priv, args->size,
 336                         args->flags, &args->handle);
 337 }
 338
 339 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 340                 struct drm_file *file_priv)
 341 {
 342         struct drm_omap_gem_cpu_prep *args = data;
 343         struct drm_gem_object *obj;
 344         int ret;
 345
 346         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 347
 348         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 349         if (!obj)
 350                 return -ENOENT;
 351
 352         ret = omap_gem_op_sync(obj, args->op);
 353
 354         if (!ret)
 355                 ret = omap_gem_op_start(obj, args->op);
 356
 357         drm_gem_object_unreference_unlocked(obj);
 358
 359         return ret;
 360 }
 361
 362 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 363                 struct drm_file *file_priv)
 364 {
 365         struct drm_omap_gem_cpu_fini *args = data;
 366         struct drm_gem_object *obj;
 367         int ret;
 368
 369         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 370
 371         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 372         if (!obj)
 373                 return -ENOENT;
 374
 375         /* XXX flushy, flushy */
 376         ret = 0;
 377
 378         if (!ret)
 379                 ret = omap_gem_op_finish(obj, args->op);
 380
 381         drm_gem_object_unreference_unlocked(obj);
 382
 383         return ret;
 384 }
 385
 386 static int ioctl_gem_info(struct drm_device *dev, void *data,
 387                 struct drm_file *file_priv)
 388 {
 389         struct drm_omap_gem_info *args = data;
 390         struct drm_gem_object *obj;
 391         int ret = 0;
 392
 393         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 394
 395         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 396         if (!obj)
 397                 return -ENOENT;
 398
 399         args->size = omap_gem_mmap_size(obj);
 400         args->offset = omap_gem_mmap_offset(obj);
 401
 402         drm_gem_object_unreference_unlocked(obj);
 403
 404         return ret;
 405 }
 406
 407 static struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 408         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
 409         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 410         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
 411         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
 412         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
 413         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
 414 };
 415
 416 /*
 417  * drm driver funcs
 418  */
 419
 420 /**
 421  * load - setup chip and create an initial config
 422  * @dev: DRM device
 423  * @flags: startup flags
 424  *
 425  * The driver load routine has to do several things:
 426  *   - initialize the memory manager
 427  *   - allocate initial config memory
 428  *   - setup the DRM framebuffer with the allocated memory
 429  */
 430 static int dev_load(struct drm_device *dev, unsigned long flags)
 431 {
 432         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
 433         struct omap_drm_private *priv;
 434         int ret;
 435
 436         DBG("load: dev=%p", dev);
 437
 438         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 439         if (!priv)
 440                 return -ENOMEM;
 441
 442         priv->omaprev = pdata->omaprev;
 443
 444         dev->dev_private = priv;
 445
 446         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 447
 448         INIT_LIST_HEAD(&priv->obj_list);
 449
 450         omap_gem_init(dev);
 451
 452         ret = omap_modeset_init(dev);
 453         if (ret) {
 454                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 455                 dev->dev_private = NULL;
 456                 kfree(priv);
 457                 return ret;
 458         }
 459
 460         ret = drm_vblank_init(dev, priv->num_crtcs);
 461         if (ret)
 462                 dev_warn(dev->dev, "could not init vblank\n");
 463
 464         priv->fbdev = omap_fbdev_init(dev);
 465         if (!priv->fbdev) {
 466                 dev_warn(dev->dev, "omap_fbdev_init failed\n");
 467                 /* well, limp along without an fbdev.. maybe X11 will work? */
 468         }
 469
 470         /* store off drm_device for use in pm ops */
 471         dev_set_drvdata(dev->dev, dev);
 472
 473         drm_kms_helper_poll_init(dev);
 474
 475         return 0;
 476 }
 477
 478 static int dev_unload(struct drm_device *dev)
 479 {
 480         struct omap_drm_private *priv = dev->dev_private;
 481
 482         DBG("unload: dev=%p", dev);
 483
 484         drm_kms_helper_poll_fini(dev);
 485         drm_vblank_cleanup(dev);
 486         omap_drm_irq_uninstall(dev);
 487
 488         omap_fbdev_free(dev);
 489         omap_modeset_free(dev);
 490         omap_gem_deinit(dev);
 491
 492         flush_workqueue(priv->wq);
 493         destroy_workqueue(priv->wq);
 494
 495         kfree(dev->dev_private);
 496         dev->dev_private = NULL;
 497
 498         dev_set_drvdata(dev->dev, NULL);
 499
 500         return 0;
 501 }
 502
 503 static int dev_open(struct drm_device *dev, struct drm_file *file)
 504 {
 505         file->driver_priv = NULL;
 506
 507         DBG("open: dev=%p, file=%p", dev, file);
 508
 509         return 0;
 510 }
 511
 512 static int dev_firstopen(struct drm_device *dev)
 513 {
 514         DBG("firstopen: dev=%p", dev);
 515         return 0;
 516 }
 517
 518 /**
 519  * lastclose - clean up after all DRM clients have exited
 520  * @dev: DRM device
 521  *
 522  * Take care of cleaning up after all DRM clients have exited.  In the
 523  * mode setting case, we want to restore the kernel's initial mode (just
 524  * in case the last client left us in a bad state).
 525  */
 526 static void dev_lastclose(struct drm_device *dev)
 527 {
 528         int i;
 529
 530         /* we don't support vga-switcheroo.. so just make sure the fbdev
 531          * mode is active
 532          */
 533         struct omap_drm_private *priv = dev->dev_private;
 534         int ret;
 535
 536         DBG("lastclose: dev=%p", dev);
 537
 538         if (priv->rotation_prop) {
 539                 /* need to restore default rotation state.. not sure
 540                  * if there is a cleaner way to restore properties to
 541                  * default state?  Maybe a flag that properties should
 542                  * automatically be restored to default state on
 543                  * lastclose?
 544                  */
 545                 for (i = 0; i < priv->num_crtcs; i++) {
 546                         drm_object_property_set_value(&priv->crtcs[i]->base,
 547                                         priv->rotation_prop, 0);
 548                 }
 549
 550                 for (i = 0; i < priv->num_planes; i++) {
 551                         drm_object_property_set_value(&priv->planes[i]->base,
 552                                         priv->rotation_prop, 0);
 553                 }
 554         }
 555
 556         drm_modeset_lock_all(dev);
 557         ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
 558         drm_modeset_unlock_all(dev);
 559         if (ret)
 560                 DBG("failed to restore crtc mode");
 561 }
 562
 563 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
 564 {
 565         DBG("preclose: dev=%p", dev);
 566 }
 567
 568 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
 569 {
 570         DBG("postclose: dev=%p, file=%p", dev, file);
 571 }
 572
 573 static const struct vm_operations_struct omap_gem_vm_ops = {
 574         .fault = omap_gem_fault,
 575         .open = drm_gem_vm_open,
 576         .close = drm_gem_vm_close,
 577 };
 578
 579 static const struct file_operations omapdriver_fops = {
 580                 .owner = THIS_MODULE,
 581                 .open = drm_open,
 582                 .unlocked_ioctl = drm_ioctl,
 583                 .release = drm_release,
 584                 .mmap = omap_gem_mmap,
 585                 .poll = drm_poll,
 586                 .fasync = drm_fasync,
 587                 .read = drm_read,
 588                 .llseek = noop_llseek,
 589 };
 590
 591 static struct drm_driver omap_drm_driver = {
 592                 .driver_features =
 593                                 DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
 594                 .load = dev_load,
 595                 .unload = dev_unload,
 596                 .open = dev_open,
 597                 .firstopen = dev_firstopen,
 598                 .lastclose = dev_lastclose,
 599                 .preclose = dev_preclose,
 600                 .postclose = dev_postclose,
 601                 .get_vblank_counter = drm_vblank_count,
 602                 .enable_vblank = omap_irq_enable_vblank,
 603                 .disable_vblank = omap_irq_disable_vblank,
 604                 .irq_preinstall = omap_irq_preinstall,
 605                 .irq_postinstall = omap_irq_postinstall,
 606                 .irq_uninstall = omap_irq_uninstall,
 607                 .irq_handler = omap_irq_handler,
 608 #ifdef CONFIG_DEBUG_FS
 609                 .debugfs_init = omap_debugfs_init,
 610                 .debugfs_cleanup = omap_debugfs_cleanup,
 611 #endif
 612                 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 613                 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 614                 .gem_prime_export = omap_gem_prime_export,
 615                 .gem_prime_import = omap_gem_prime_import,
 616                 .gem_init_object = omap_gem_init_object,
 617                 .gem_free_object = omap_gem_free_object,
 618                 .gem_vm_ops = &omap_gem_vm_ops,
 619                 .dumb_create = omap_gem_dumb_create,
 620                 .dumb_map_offset = omap_gem_dumb_map_offset,
 621                 .dumb_destroy = omap_gem_dumb_destroy,
 622                 .ioctls = ioctls,
 623                 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 624                 .fops = &omapdriver_fops,
 625                 .name = DRIVER_NAME,
 626                 .desc = DRIVER_DESC,
 627                 .date = DRIVER_DATE,
 628                 .major = DRIVER_MAJOR,
 629                 .minor = DRIVER_MINOR,
 630                 .patchlevel = DRIVER_PATCHLEVEL,
 631 };
 632
 633 static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
 634 {
 635         DBG("");
 636         return 0;
 637 }
 638
 639 static int pdev_resume(struct platform_device *device)
 640 {
 641         DBG("");
 642         return 0;
 643 }
 644
 645 static void pdev_shutdown(struct platform_device *device)
 646 {
 647         DBG("");
 648 }
 649
 650 static int pdev_probe(struct platform_device *device)
 651 {
 652         DBG("%s", device->name);
 653         return drm_platform_init(&omap_drm_driver, device);
 654 }
 655
 656 static int pdev_remove(struct platform_device *device)
 657 {
 658         DBG("");
 659         drm_platform_exit(&omap_drm_driver, device);
 660
 661         platform_driver_unregister(&omap_dmm_driver);
 662         return 0;
 663 }
 664
 665 #ifdef CONFIG_PM
 666 static const struct dev_pm_ops omapdrm_pm_ops = {
 667         .resume = omap_gem_resume,
 668 };
 669 #endif
 670
 671 static struct platform_driver pdev = {
 672                 .driver = {
 673                         .name = DRIVER_NAME,
 674                         .owner = THIS_MODULE,
 675 #ifdef CONFIG_PM
 676                         .pm = &omapdrm_pm_ops,
 677 #endif
 678                 },
 679                 .probe = pdev_probe,
 680                 .remove = pdev_remove,
 681                 .suspend = pdev_suspend,
 682                 .resume = pdev_resume,
 683                 .shutdown = pdev_shutdown,
 684 };
 685
 686 static int __init omap_drm_init(void)
 687 {
 688         DBG("init");
 689         if (platform_driver_register(&omap_dmm_driver)) {
 690                 /* we can continue on without DMM.. so not fatal */
 691                 dev_err(NULL, "DMM registration failed\n");
 692         }
 693         return platform_driver_register(&pdev);
 694 }
 695
 696 static void __exit omap_drm_fini(void)
 697 {
 698         DBG("fini");
 699         platform_driver_unregister(&pdev);
 700 }
 701
 702 /* need late_initcall() so we load after dss_driver's are loaded */
 703 late_initcall(omap_drm_init);
 704 module_exit(omap_drm_fini);
 705
 706 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 707 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 708 MODULE_ALIAS("platform:" DRIVER_NAME);
 709 MODULE_LICENSE("GPL v2");