include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_priv {
45 int fitting_mode;
46 u32 pfit_control;
47 u32 pfit_pgm_ratios;
48 };
49
50 /**
51 * Sets the backlight level.
52 *
53 * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
54 */
55 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
56 {
57 struct drm_i915_private *dev_priv = dev->dev_private;
58 u32 blc_pwm_ctl, reg;
59
60 if (HAS_PCH_SPLIT(dev))
61 reg = BLC_PWM_CPU_CTL;
62 else
63 reg = BLC_PWM_CTL;
64
65 blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
66 I915_WRITE(reg, (blc_pwm_ctl |
67 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
68 }
69
70 /**
71 * Returns the maximum level of the backlight duty cycle field.
72 */
73 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
74 {
75 struct drm_i915_private *dev_priv = dev->dev_private;
76 u32 reg;
77
78 if (HAS_PCH_SPLIT(dev))
79 reg = BLC_PWM_PCH_CTL2;
80 else
81 reg = BLC_PWM_CTL;
82
83 return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
85 }
86
87 /**
88 * Sets the power state for the panel.
89 */
90 static void intel_lvds_set_power(struct drm_device *dev, bool on)
91 {
92 struct drm_i915_private *dev_priv = dev->dev_private;
93 u32 pp_status, ctl_reg, status_reg, lvds_reg;
94
95 if (HAS_PCH_SPLIT(dev)) {
96 ctl_reg = PCH_PP_CONTROL;
97 status_reg = PCH_PP_STATUS;
98 lvds_reg = PCH_LVDS;
99 } else {
100 ctl_reg = PP_CONTROL;
101 status_reg = PP_STATUS;
102 lvds_reg = LVDS;
103 }
104
105 if (on) {
106 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
107 POSTING_READ(lvds_reg);
108
109 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
110 POWER_TARGET_ON);
111 do {
112 pp_status = I915_READ(status_reg);
113 } while ((pp_status & PP_ON) == 0);
114
115 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
116 } else {
117 intel_lvds_set_backlight(dev, 0);
118
119 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
120 ~POWER_TARGET_ON);
121 do {
122 pp_status = I915_READ(status_reg);
123 } while (pp_status & PP_ON);
124
125 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
126 POSTING_READ(lvds_reg);
127 }
128 }
129
130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
131 {
132 struct drm_device *dev = encoder->dev;
133
134 if (mode == DRM_MODE_DPMS_ON)
135 intel_lvds_set_power(dev, true);
136 else
137 intel_lvds_set_power(dev, false);
138
139 /* XXX: We never power down the LVDS pairs. */
140 }
141
142 static void intel_lvds_save(struct drm_connector *connector)
143 {
144 struct drm_device *dev = connector->dev;
145 struct drm_i915_private *dev_priv = dev->dev_private;
146 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
147 u32 pwm_ctl_reg;
148
149 if (HAS_PCH_SPLIT(dev)) {
150 pp_on_reg = PCH_PP_ON_DELAYS;
151 pp_off_reg = PCH_PP_OFF_DELAYS;
152 pp_ctl_reg = PCH_PP_CONTROL;
153 pp_div_reg = PCH_PP_DIVISOR;
154 pwm_ctl_reg = BLC_PWM_CPU_CTL;
155 } else {
156 pp_on_reg = PP_ON_DELAYS;
157 pp_off_reg = PP_OFF_DELAYS;
158 pp_ctl_reg = PP_CONTROL;
159 pp_div_reg = PP_DIVISOR;
160 pwm_ctl_reg = BLC_PWM_CTL;
161 }
162
163 dev_priv->savePP_ON = I915_READ(pp_on_reg);
164 dev_priv->savePP_OFF = I915_READ(pp_off_reg);
165 dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
166 dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
167 dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
168 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
169 BACKLIGHT_DUTY_CYCLE_MASK);
170
171 /*
172 * If the light is off at server startup, just make it full brightness
173 */
174 if (dev_priv->backlight_duty_cycle == 0)
175 dev_priv->backlight_duty_cycle =
176 intel_lvds_get_max_backlight(dev);
177 }
178
179 static void intel_lvds_restore(struct drm_connector *connector)
180 {
181 struct drm_device *dev = connector->dev;
182 struct drm_i915_private *dev_priv = dev->dev_private;
183 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
184 u32 pwm_ctl_reg;
185
186 if (HAS_PCH_SPLIT(dev)) {
187 pp_on_reg = PCH_PP_ON_DELAYS;
188 pp_off_reg = PCH_PP_OFF_DELAYS;
189 pp_ctl_reg = PCH_PP_CONTROL;
190 pp_div_reg = PCH_PP_DIVISOR;
191 pwm_ctl_reg = BLC_PWM_CPU_CTL;
192 } else {
193 pp_on_reg = PP_ON_DELAYS;
194 pp_off_reg = PP_OFF_DELAYS;
195 pp_ctl_reg = PP_CONTROL;
196 pp_div_reg = PP_DIVISOR;
197 pwm_ctl_reg = BLC_PWM_CTL;
198 }
199
200 I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
201 I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
202 I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
203 I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
204 I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
205 if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
206 intel_lvds_set_power(dev, true);
207 else
208 intel_lvds_set_power(dev, false);
209 }
210
211 static int intel_lvds_mode_valid(struct drm_connector *connector,
212 struct drm_display_mode *mode)
213 {
214 struct drm_device *dev = connector->dev;
215 struct drm_i915_private *dev_priv = dev->dev_private;
216 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
217
218 if (fixed_mode) {
219 if (mode->hdisplay > fixed_mode->hdisplay)
220 return MODE_PANEL;
221 if (mode->vdisplay > fixed_mode->vdisplay)
222 return MODE_PANEL;
223 }
224
225 return MODE_OK;
226 }
227
228 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
229 struct drm_display_mode *mode,
230 struct drm_display_mode *adjusted_mode)
231 {
232 /*
233 * float point operation is not supported . So the PANEL_RATIO_FACTOR
234 * is defined, which can avoid the float point computation when
235 * calculating the panel ratio.
236 */
237 #define PANEL_RATIO_FACTOR 8192
238 struct drm_device *dev = encoder->dev;
239 struct drm_i915_private *dev_priv = dev->dev_private;
240 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
241 struct drm_encoder *tmp_encoder;
242 struct intel_output *intel_output = enc_to_intel_output(encoder);
243 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
244 u32 pfit_control = 0, pfit_pgm_ratios = 0;
245 int left_border = 0, right_border = 0, top_border = 0;
246 int bottom_border = 0;
247 bool border = 0;
248 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
249 int horiz_ratio, vert_ratio;
250 u32 hsync_width, vsync_width;
251 u32 hblank_width, vblank_width;
252 u32 hsync_pos, vsync_pos;
253
254 /* Should never happen!! */
255 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
256 DRM_ERROR("Can't support LVDS on pipe A\n");
257 return false;
258 }
259
260 /* Should never happen!! */
261 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
262 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
263 DRM_ERROR("Can't enable LVDS and another "
264 "encoder on the same pipe\n");
265 return false;
266 }
267 }
268 /* If we don't have a panel mode, there is nothing we can do */
269 if (dev_priv->panel_fixed_mode == NULL)
270 return true;
271 /*
272 * If we have timings from the BIOS for the panel, put them in
273 * to the adjusted mode. The CRTC will be set up for this mode,
274 * with the panel scaling set up to source from the H/VDisplay
275 * of the original mode.
276 */
277 if (dev_priv->panel_fixed_mode != NULL) {
278 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
279 adjusted_mode->hsync_start =
280 dev_priv->panel_fixed_mode->hsync_start;
281 adjusted_mode->hsync_end =
282 dev_priv->panel_fixed_mode->hsync_end;
283 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
284 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
285 adjusted_mode->vsync_start =
286 dev_priv->panel_fixed_mode->vsync_start;
287 adjusted_mode->vsync_end =
288 dev_priv->panel_fixed_mode->vsync_end;
289 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
290 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
291 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
292 }
293
294 /* Make sure pre-965s set dither correctly */
295 if (!IS_I965G(dev)) {
296 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
297 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
298 }
299
300 /* Native modes don't need fitting */
301 if (adjusted_mode->hdisplay == mode->hdisplay &&
302 adjusted_mode->vdisplay == mode->vdisplay) {
303 pfit_pgm_ratios = 0;
304 border = 0;
305 goto out;
306 }
307
308 /* full screen scale for now */
309 if (HAS_PCH_SPLIT(dev))
310 goto out;
311
312 /* 965+ wants fuzzy fitting */
313 if (IS_I965G(dev))
314 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
315 PFIT_FILTER_FUZZY;
316
317 hsync_width = adjusted_mode->crtc_hsync_end -
318 adjusted_mode->crtc_hsync_start;
319 vsync_width = adjusted_mode->crtc_vsync_end -
320 adjusted_mode->crtc_vsync_start;
321 hblank_width = adjusted_mode->crtc_hblank_end -
322 adjusted_mode->crtc_hblank_start;
323 vblank_width = adjusted_mode->crtc_vblank_end -
324 adjusted_mode->crtc_vblank_start;
325 /*
326 * Deal with panel fitting options. Figure out how to stretch the
327 * image based on its aspect ratio & the current panel fitting mode.
328 */
329 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
330 adjusted_mode->vdisplay;
331 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
332 mode->vdisplay;
333 /*
334 * Enable automatic panel scaling for non-native modes so that they fill
335 * the screen. Should be enabled before the pipe is enabled, according
336 * to register description and PRM.
337 * Change the value here to see the borders for debugging
338 */
339 if (!HAS_PCH_SPLIT(dev)) {
340 I915_WRITE(BCLRPAT_A, 0);
341 I915_WRITE(BCLRPAT_B, 0);
342 }
343
344 switch (lvds_priv->fitting_mode) {
345 case DRM_MODE_SCALE_CENTER:
346 /*
347 * For centered modes, we have to calculate border widths &
348 * heights and modify the values programmed into the CRTC.
349 */
350 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
351 right_border = left_border;
352 if (mode->hdisplay & 1)
353 right_border++;
354 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
355 bottom_border = top_border;
356 if (mode->vdisplay & 1)
357 bottom_border++;
358 /* Set active & border values */
359 adjusted_mode->crtc_hdisplay = mode->hdisplay;
360 /* Keep the boder be even */
361 if (right_border & 1)
362 right_border++;
363 /* use the border directly instead of border minuse one */
364 adjusted_mode->crtc_hblank_start = mode->hdisplay +
365 right_border;
366 /* keep the blank width constant */
367 adjusted_mode->crtc_hblank_end =
368 adjusted_mode->crtc_hblank_start + hblank_width;
369 /* get the hsync pos relative to hblank start */
370 hsync_pos = (hblank_width - hsync_width) / 2;
371 /* keep the hsync pos be even */
372 if (hsync_pos & 1)
373 hsync_pos++;
374 adjusted_mode->crtc_hsync_start =
375 adjusted_mode->crtc_hblank_start + hsync_pos;
376 /* keep the hsync width constant */
377 adjusted_mode->crtc_hsync_end =
378 adjusted_mode->crtc_hsync_start + hsync_width;
379 adjusted_mode->crtc_vdisplay = mode->vdisplay;
380 /* use the border instead of border minus one */
381 adjusted_mode->crtc_vblank_start = mode->vdisplay +
382 bottom_border;
383 /* keep the vblank width constant */
384 adjusted_mode->crtc_vblank_end =
385 adjusted_mode->crtc_vblank_start + vblank_width;
386 /* get the vsync start postion relative to vblank start */
387 vsync_pos = (vblank_width - vsync_width) / 2;
388 adjusted_mode->crtc_vsync_start =
389 adjusted_mode->crtc_vblank_start + vsync_pos;
390 /* keep the vsync width constant */
391 adjusted_mode->crtc_vsync_end =
392 adjusted_mode->crtc_vsync_start + vsync_width;
393 border = 1;
394 break;
395 case DRM_MODE_SCALE_ASPECT:
396 /* Scale but preserve the spect ratio */
397 pfit_control |= PFIT_ENABLE;
398 if (IS_I965G(dev)) {
399 /* 965+ is easy, it does everything in hw */
400 if (panel_ratio > desired_ratio)
401 pfit_control |= PFIT_SCALING_PILLAR;
402 else if (panel_ratio < desired_ratio)
403 pfit_control |= PFIT_SCALING_LETTER;
404 else
405 pfit_control |= PFIT_SCALING_AUTO;
406 } else {
407 /*
408 * For earlier chips we have to calculate the scaling
409 * ratio by hand and program it into the
410 * PFIT_PGM_RATIO register
411 */
412 u32 horiz_bits, vert_bits, bits = 12;
413 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
414 adjusted_mode->hdisplay;
415 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
416 adjusted_mode->vdisplay;
417 horiz_scale = adjusted_mode->hdisplay *
418 PANEL_RATIO_FACTOR / mode->hdisplay;
419 vert_scale = adjusted_mode->vdisplay *
420 PANEL_RATIO_FACTOR / mode->vdisplay;
421
422 /* retain aspect ratio */
423 if (panel_ratio > desired_ratio) { /* Pillar */
424 u32 scaled_width;
425 scaled_width = mode->hdisplay * vert_scale /
426 PANEL_RATIO_FACTOR;
427 horiz_ratio = vert_ratio;
428 pfit_control |= (VERT_AUTO_SCALE |
429 VERT_INTERP_BILINEAR |
430 HORIZ_INTERP_BILINEAR);
431 /* Pillar will have left/right borders */
432 left_border = (adjusted_mode->hdisplay -
433 scaled_width) / 2;
434 right_border = left_border;
435 if (mode->hdisplay & 1) /* odd resolutions */
436 right_border++;
437 /* keep the border be even */
438 if (right_border & 1)
439 right_border++;
440 adjusted_mode->crtc_hdisplay = scaled_width;
441 /* use border instead of border minus one */
442 adjusted_mode->crtc_hblank_start =
443 scaled_width + right_border;
444 /* keep the hblank width constant */
445 adjusted_mode->crtc_hblank_end =
446 adjusted_mode->crtc_hblank_start +
447 hblank_width;
448 /*
449 * get the hsync start pos relative to
450 * hblank start
451 */
452 hsync_pos = (hblank_width - hsync_width) / 2;
453 /* keep the hsync_pos be even */
454 if (hsync_pos & 1)
455 hsync_pos++;
456 adjusted_mode->crtc_hsync_start =
457 adjusted_mode->crtc_hblank_start +
458 hsync_pos;
459 /* keept hsync width constant */
460 adjusted_mode->crtc_hsync_end =
461 adjusted_mode->crtc_hsync_start +
462 hsync_width;
463 border = 1;
464 } else if (panel_ratio < desired_ratio) { /* letter */
465 u32 scaled_height = mode->vdisplay *
466 horiz_scale / PANEL_RATIO_FACTOR;
467 vert_ratio = horiz_ratio;
468 pfit_control |= (HORIZ_AUTO_SCALE |
469 VERT_INTERP_BILINEAR |
470 HORIZ_INTERP_BILINEAR);
471 /* Letterbox will have top/bottom border */
472 top_border = (adjusted_mode->vdisplay -
473 scaled_height) / 2;
474 bottom_border = top_border;
475 if (mode->vdisplay & 1)
476 bottom_border++;
477 adjusted_mode->crtc_vdisplay = scaled_height;
478 /* use border instead of border minus one */
479 adjusted_mode->crtc_vblank_start =
480 scaled_height + bottom_border;
481 /* keep the vblank width constant */
482 adjusted_mode->crtc_vblank_end =
483 adjusted_mode->crtc_vblank_start +
484 vblank_width;
485 /*
486 * get the vsync start pos relative to
487 * vblank start
488 */
489 vsync_pos = (vblank_width - vsync_width) / 2;
490 adjusted_mode->crtc_vsync_start =
491 adjusted_mode->crtc_vblank_start +
492 vsync_pos;
493 /* keep the vsync width constant */
494 adjusted_mode->crtc_vsync_end =
495 adjusted_mode->crtc_vsync_start +
496 vsync_width;
497 border = 1;
498 } else {
499 /* Aspects match, Let hw scale both directions */
500 pfit_control |= (VERT_AUTO_SCALE |
501 HORIZ_AUTO_SCALE |
502 VERT_INTERP_BILINEAR |
503 HORIZ_INTERP_BILINEAR);
504 }
505 horiz_bits = (1 << bits) * horiz_ratio /
506 PANEL_RATIO_FACTOR;
507 vert_bits = (1 << bits) * vert_ratio /
508 PANEL_RATIO_FACTOR;
509 pfit_pgm_ratios =
510 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
511 PFIT_VERT_SCALE_MASK) |
512 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
513 PFIT_HORIZ_SCALE_MASK);
514 }
515 break;
516
517 case DRM_MODE_SCALE_FULLSCREEN:
518 /*
519 * Full scaling, even if it changes the aspect ratio.
520 * Fortunately this is all done for us in hw.
521 */
522 pfit_control |= PFIT_ENABLE;
523 if (IS_I965G(dev))
524 pfit_control |= PFIT_SCALING_AUTO;
525 else
526 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
527 VERT_INTERP_BILINEAR |
528 HORIZ_INTERP_BILINEAR);
529 break;
530 default:
531 break;
532 }
533
534 out:
535 lvds_priv->pfit_control = pfit_control;
536 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
537 /*
538 * When there exists the border, it means that the LVDS_BORDR
539 * should be enabled.
540 */
541 if (border)
542 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
543 else
544 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
545 /*
546 * XXX: It would be nice to support lower refresh rates on the
547 * panels to reduce power consumption, and perhaps match the
548 * user's requested refresh rate.
549 */
550
551 return true;
552 }
553
554 static void intel_lvds_prepare(struct drm_encoder *encoder)
555 {
556 struct drm_device *dev = encoder->dev;
557 struct drm_i915_private *dev_priv = dev->dev_private;
558 u32 reg;
559
560 if (HAS_PCH_SPLIT(dev))
561 reg = BLC_PWM_CPU_CTL;
562 else
563 reg = BLC_PWM_CTL;
564
565 dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
566 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
567 BACKLIGHT_DUTY_CYCLE_MASK);
568
569 intel_lvds_set_power(dev, false);
570 }
571
572 static void intel_lvds_commit( struct drm_encoder *encoder)
573 {
574 struct drm_device *dev = encoder->dev;
575 struct drm_i915_private *dev_priv = dev->dev_private;
576
577 if (dev_priv->backlight_duty_cycle == 0)
578 dev_priv->backlight_duty_cycle =
579 intel_lvds_get_max_backlight(dev);
580
581 intel_lvds_set_power(dev, true);
582 }
583
584 static void intel_lvds_mode_set(struct drm_encoder *encoder,
585 struct drm_display_mode *mode,
586 struct drm_display_mode *adjusted_mode)
587 {
588 struct drm_device *dev = encoder->dev;
589 struct drm_i915_private *dev_priv = dev->dev_private;
590 struct intel_output *intel_output = enc_to_intel_output(encoder);
591 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
592
593 /*
594 * The LVDS pin pair will already have been turned on in the
595 * intel_crtc_mode_set since it has a large impact on the DPLL
596 * settings.
597 */
598
599 if (HAS_PCH_SPLIT(dev))
600 return;
601
602 /*
603 * Enable automatic panel scaling so that non-native modes fill the
604 * screen. Should be enabled before the pipe is enabled, according to
605 * register description and PRM.
606 */
607 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
608 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
609 }
610
611 /**
612 * Detect the LVDS connection.
613 *
614 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
615 * connected and closed means disconnected. We also send hotplug events as
616 * needed, using lid status notification from the input layer.
617 */
618 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
619 {
620 struct drm_device *dev = connector->dev;
621 enum drm_connector_status status = connector_status_connected;
622
623 /* ACPI lid methods were generally unreliable in this generation, so
624 * don't even bother.
625 */
626 if (IS_GEN2(dev) || IS_GEN3(dev))
627 return connector_status_connected;
628
629 return status;
630 }
631
632 /**
633 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
634 */
635 static int intel_lvds_get_modes(struct drm_connector *connector)
636 {
637 struct drm_device *dev = connector->dev;
638 struct intel_output *intel_output = to_intel_output(connector);
639 struct drm_i915_private *dev_priv = dev->dev_private;
640 int ret = 0;
641
642 ret = intel_ddc_get_modes(intel_output);
643
644 if (ret)
645 return ret;
646
647 /* Didn't get an EDID, so
648 * Set wide sync ranges so we get all modes
649 * handed to valid_mode for checking
650 */
651 connector->display_info.min_vfreq = 0;
652 connector->display_info.max_vfreq = 200;
653 connector->display_info.min_hfreq = 0;
654 connector->display_info.max_hfreq = 200;
655
656 if (dev_priv->panel_fixed_mode != NULL) {
657 struct drm_display_mode *mode;
658
659 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
660 drm_mode_probed_add(connector, mode);
661
662 return 1;
663 }
664
665 return 0;
666 }
667
668 /*
669 * Lid events. Note the use of 'modeset_on_lid':
670 * - we set it on lid close, and reset it on open
671 * - we use it as a "only once" bit (ie we ignore
672 * duplicate events where it was already properly
673 * set/reset)
674 * - the suspend/resume paths will also set it to
675 * zero, since they restore the mode ("lid open").
676 */
677 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
678 void *unused)
679 {
680 struct drm_i915_private *dev_priv =
681 container_of(nb, struct drm_i915_private, lid_notifier);
682 struct drm_device *dev = dev_priv->dev;
683 struct drm_connector *connector = dev_priv->int_lvds_connector;
684
685 /*
686 * check and update the status of LVDS connector after receiving
687 * the LID nofication event.
688 */
689 if (connector)
690 connector->status = connector->funcs->detect(connector);
691 if (!acpi_lid_open()) {
692 dev_priv->modeset_on_lid = 1;
693 return NOTIFY_OK;
694 }
695
696 if (!dev_priv->modeset_on_lid)
697 return NOTIFY_OK;
698
699 dev_priv->modeset_on_lid = 0;
700
701 mutex_lock(&dev->mode_config.mutex);
702 drm_helper_resume_force_mode(dev);
703 mutex_unlock(&dev->mode_config.mutex);
704
705 return NOTIFY_OK;
706 }
707
708 /**
709 * intel_lvds_destroy - unregister and free LVDS structures
710 * @connector: connector to free
711 *
712 * Unregister the DDC bus for this connector then free the driver private
713 * structure.
714 */
715 static void intel_lvds_destroy(struct drm_connector *connector)
716 {
717 struct drm_device *dev = connector->dev;
718 struct intel_output *intel_output = to_intel_output(connector);
719 struct drm_i915_private *dev_priv = dev->dev_private;
720
721 if (intel_output->ddc_bus)
722 intel_i2c_destroy(intel_output->ddc_bus);
723 if (dev_priv->lid_notifier.notifier_call)
724 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
725 drm_sysfs_connector_remove(connector);
726 drm_connector_cleanup(connector);
727 kfree(connector);
728 }
729
730 static int intel_lvds_set_property(struct drm_connector *connector,
731 struct drm_property *property,
732 uint64_t value)
733 {
734 struct drm_device *dev = connector->dev;
735 struct intel_output *intel_output =
736 to_intel_output(connector);
737
738 if (property == dev->mode_config.scaling_mode_property &&
739 connector->encoder) {
740 struct drm_crtc *crtc = connector->encoder->crtc;
741 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
742 if (value == DRM_MODE_SCALE_NONE) {
743 DRM_DEBUG_KMS("no scaling not supported\n");
744 return 0;
745 }
746 if (lvds_priv->fitting_mode == value) {
747 /* the LVDS scaling property is not changed */
748 return 0;
749 }
750 lvds_priv->fitting_mode = value;
751 if (crtc && crtc->enabled) {
752 /*
753 * If the CRTC is enabled, the display will be changed
754 * according to the new panel fitting mode.
755 */
756 drm_crtc_helper_set_mode(crtc, &crtc->mode,
757 crtc->x, crtc->y, crtc->fb);
758 }
759 }
760
761 return 0;
762 }
763
764 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
765 .dpms = intel_lvds_dpms,
766 .mode_fixup = intel_lvds_mode_fixup,
767 .prepare = intel_lvds_prepare,
768 .mode_set = intel_lvds_mode_set,
769 .commit = intel_lvds_commit,
770 };
771
772 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
773 .get_modes = intel_lvds_get_modes,
774 .mode_valid = intel_lvds_mode_valid,
775 .best_encoder = intel_best_encoder,
776 };
777
778 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
779 .dpms = drm_helper_connector_dpms,
780 .save = intel_lvds_save,
781 .restore = intel_lvds_restore,
782 .detect = intel_lvds_detect,
783 .fill_modes = drm_helper_probe_single_connector_modes,
784 .set_property = intel_lvds_set_property,
785 .destroy = intel_lvds_destroy,
786 };
787
788
789 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
790 {
791 drm_encoder_cleanup(encoder);
792 }
793
794 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
795 .destroy = intel_lvds_enc_destroy,
796 };
797
798 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
799 {
800 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
801 return 1;
802 }
803
804 /* These systems claim to have LVDS, but really don't */
805 static const struct dmi_system_id intel_no_lvds[] = {
806 {
807 .callback = intel_no_lvds_dmi_callback,
808 .ident = "Apple Mac Mini (Core series)",
809 .matches = {
810 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
811 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
812 },
813 },
814 {
815 .callback = intel_no_lvds_dmi_callback,
816 .ident = "Apple Mac Mini (Core 2 series)",
817 .matches = {
818 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
819 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
820 },
821 },
822 {
823 .callback = intel_no_lvds_dmi_callback,
824 .ident = "MSI IM-945GSE-A",
825 .matches = {
826 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
827 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
828 },
829 },
830 {
831 .callback = intel_no_lvds_dmi_callback,
832 .ident = "Dell Studio Hybrid",
833 .matches = {
834 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
835 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
836 },
837 },
838 {
839 .callback = intel_no_lvds_dmi_callback,
840 .ident = "AOpen Mini PC",
841 .matches = {
842 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
843 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
844 },
845 },
846 {
847 .callback = intel_no_lvds_dmi_callback,
848 .ident = "AOpen Mini PC MP915",
849 .matches = {
850 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
851 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
852 },
853 },
854 {
855 .callback = intel_no_lvds_dmi_callback,
856 .ident = "Aopen i945GTt-VFA",
857 .matches = {
858 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
859 },
860 },
861
862 { } /* terminating entry */
863 };
864
865 /**
866 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
867 * @dev: drm device
868 * @connector: LVDS connector
869 *
870 * Find the reduced downclock for LVDS in EDID.
871 */
872 static void intel_find_lvds_downclock(struct drm_device *dev,
873 struct drm_connector *connector)
874 {
875 struct drm_i915_private *dev_priv = dev->dev_private;
876 struct drm_display_mode *scan, *panel_fixed_mode;
877 int temp_downclock;
878
879 panel_fixed_mode = dev_priv->panel_fixed_mode;
880 temp_downclock = panel_fixed_mode->clock;
881
882 mutex_lock(&dev->mode_config.mutex);
883 list_for_each_entry(scan, &connector->probed_modes, head) {
884 /*
885 * If one mode has the same resolution with the fixed_panel
886 * mode while they have the different refresh rate, it means
887 * that the reduced downclock is found for the LVDS. In such
888 * case we can set the different FPx0/1 to dynamically select
889 * between low and high frequency.
890 */
891 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
892 scan->hsync_start == panel_fixed_mode->hsync_start &&
893 scan->hsync_end == panel_fixed_mode->hsync_end &&
894 scan->htotal == panel_fixed_mode->htotal &&
895 scan->vdisplay == panel_fixed_mode->vdisplay &&
896 scan->vsync_start == panel_fixed_mode->vsync_start &&
897 scan->vsync_end == panel_fixed_mode->vsync_end &&
898 scan->vtotal == panel_fixed_mode->vtotal) {
899 if (scan->clock < temp_downclock) {
900 /*
901 * The downclock is already found. But we
902 * expect to find the lower downclock.
903 */
904 temp_downclock = scan->clock;
905 }
906 }
907 }
908 mutex_unlock(&dev->mode_config.mutex);
909 if (temp_downclock < panel_fixed_mode->clock &&
910 i915_lvds_downclock) {
911 /* We found the downclock for LVDS. */
912 dev_priv->lvds_downclock_avail = 1;
913 dev_priv->lvds_downclock = temp_downclock;
914 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
915 "Normal clock %dKhz, downclock %dKhz\n",
916 panel_fixed_mode->clock, temp_downclock);
917 }
918 return;
919 }
920
921 /*
922 * Enumerate the child dev array parsed from VBT to check whether
923 * the LVDS is present.
924 * If it is present, return 1.
925 * If it is not present, return false.
926 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
927 * Note: The addin_offset should also be checked for LVDS panel.
928 * Only when it is non-zero, it is assumed that it is present.
929 */
930 static int lvds_is_present_in_vbt(struct drm_device *dev)
931 {
932 struct drm_i915_private *dev_priv = dev->dev_private;
933 struct child_device_config *p_child;
934 int i, ret;
935
936 if (!dev_priv->child_dev_num)
937 return 1;
938
939 ret = 0;
940 for (i = 0; i < dev_priv->child_dev_num; i++) {
941 p_child = dev_priv->child_dev + i;
942 /*
943 * If the device type is not LFP, continue.
944 * If the device type is 0x22, it is also regarded as LFP.
945 */
946 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
947 p_child->device_type != DEVICE_TYPE_LFP)
948 continue;
949
950 /* The addin_offset should be checked. Only when it is
951 * non-zero, it is regarded as present.
952 */
953 if (p_child->addin_offset) {
954 ret = 1;
955 break;
956 }
957 }
958 return ret;
959 }
960
961 /**
962 * intel_lvds_init - setup LVDS connectors on this device
963 * @dev: drm device
964 *
965 * Create the connector, register the LVDS DDC bus, and try to figure out what
966 * modes we can display on the LVDS panel (if present).
967 */
968 void intel_lvds_init(struct drm_device *dev)
969 {
970 struct drm_i915_private *dev_priv = dev->dev_private;
971 struct intel_output *intel_output;
972 struct drm_connector *connector;
973 struct drm_encoder *encoder;
974 struct drm_display_mode *scan; /* *modes, *bios_mode; */
975 struct drm_crtc *crtc;
976 struct intel_lvds_priv *lvds_priv;
977 u32 lvds;
978 int pipe, gpio = GPIOC;
979
980 /* Skip init on machines we know falsely report LVDS */
981 if (dmi_check_system(intel_no_lvds))
982 return;
983
984 if (!lvds_is_present_in_vbt(dev)) {
985 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
986 return;
987 }
988
989 if (HAS_PCH_SPLIT(dev)) {
990 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
991 return;
992 if (dev_priv->edp_support) {
993 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
994 return;
995 }
996 gpio = PCH_GPIOC;
997 }
998
999 intel_output = kzalloc(sizeof(struct intel_output) +
1000 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1001 if (!intel_output) {
1002 return;
1003 }
1004
1005 connector = &intel_output->base;
1006 encoder = &intel_output->enc;
1007 drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
1008 DRM_MODE_CONNECTOR_LVDS);
1009
1010 drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
1011 DRM_MODE_ENCODER_LVDS);
1012
1013 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1014 intel_output->type = INTEL_OUTPUT_LVDS;
1015
1016 intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1017 intel_output->crtc_mask = (1 << 1);
1018 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1019 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1020 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1021 connector->interlace_allowed = false;
1022 connector->doublescan_allowed = false;
1023
1024 lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
1025 intel_output->dev_priv = lvds_priv;
1026 /* create the scaling mode property */
1027 drm_mode_create_scaling_mode_property(dev);
1028 /*
1029 * the initial panel fitting mode will be FULL_SCREEN.
1030 */
1031
1032 drm_connector_attach_property(&intel_output->base,
1033 dev->mode_config.scaling_mode_property,
1034 DRM_MODE_SCALE_FULLSCREEN);
1035 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1036 /*
1037 * LVDS discovery:
1038 * 1) check for EDID on DDC
1039 * 2) check for VBT data
1040 * 3) check to see if LVDS is already on
1041 * if none of the above, no panel
1042 * 4) make sure lid is open
1043 * if closed, act like it's not there for now
1044 */
1045
1046 /* Set up the DDC bus. */
1047 intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1048 if (!intel_output->ddc_bus) {
1049 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1050 "failed.\n");
1051 goto failed;
1052 }
1053
1054 /*
1055 * Attempt to get the fixed panel mode from DDC. Assume that the
1056 * preferred mode is the right one.
1057 */
1058 intel_ddc_get_modes(intel_output);
1059
1060 list_for_each_entry(scan, &connector->probed_modes, head) {
1061 mutex_lock(&dev->mode_config.mutex);
1062 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1063 dev_priv->panel_fixed_mode =
1064 drm_mode_duplicate(dev, scan);
1065 mutex_unlock(&dev->mode_config.mutex);
1066 intel_find_lvds_downclock(dev, connector);
1067 goto out;
1068 }
1069 mutex_unlock(&dev->mode_config.mutex);
1070 }
1071
1072 /* Failed to get EDID, what about VBT? */
1073 if (dev_priv->lfp_lvds_vbt_mode) {
1074 mutex_lock(&dev->mode_config.mutex);
1075 dev_priv->panel_fixed_mode =
1076 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1077 mutex_unlock(&dev->mode_config.mutex);
1078 if (dev_priv->panel_fixed_mode) {
1079 dev_priv->panel_fixed_mode->type |=
1080 DRM_MODE_TYPE_PREFERRED;
1081 goto out;
1082 }
1083 }
1084
1085 /*
1086 * If we didn't get EDID, try checking if the panel is already turned
1087 * on. If so, assume that whatever is currently programmed is the
1088 * correct mode.
1089 */
1090
1091 /* Ironlake: FIXME if still fail, not try pipe mode now */
1092 if (HAS_PCH_SPLIT(dev))
1093 goto failed;
1094
1095 lvds = I915_READ(LVDS);
1096 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1097 crtc = intel_get_crtc_from_pipe(dev, pipe);
1098
1099 if (crtc && (lvds & LVDS_PORT_EN)) {
1100 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1101 if (dev_priv->panel_fixed_mode) {
1102 dev_priv->panel_fixed_mode->type |=
1103 DRM_MODE_TYPE_PREFERRED;
1104 goto out;
1105 }
1106 }
1107
1108 /* If we still don't have a mode after all that, give up. */
1109 if (!dev_priv->panel_fixed_mode)
1110 goto failed;
1111
1112 out:
1113 if (HAS_PCH_SPLIT(dev)) {
1114 u32 pwm;
1115 /* make sure PWM is enabled */
1116 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1117 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1118 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1119
1120 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1121 pwm |= PWM_PCH_ENABLE;
1122 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1123 }
1124 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1125 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1126 DRM_DEBUG_KMS("lid notifier registration failed\n");
1127 dev_priv->lid_notifier.notifier_call = NULL;
1128 }
1129 /* keep the LVDS connector */
1130 dev_priv->int_lvds_connector = connector;
1131 drm_sysfs_connector_add(connector);
1132 return;
1133
1134 failed:
1135 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1136 if (intel_output->ddc_bus)
1137 intel_i2c_destroy(intel_output->ddc_bus);
1138 drm_connector_cleanup(connector);
1139 drm_encoder_cleanup(encoder);
1140 kfree(intel_output);
1141 }