Merge branch 'drm-next-3.10' of git://people.freedesktop.org/~agd5f/linux into drm...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / gma500 / cdv_intel_crt.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27 #include <linux/i2c.h>
28 #include <drm/drmP.h>
29
30 #include "intel_bios.h"
31 #include "psb_drv.h"
32 #include "psb_intel_drv.h"
33 #include "psb_intel_reg.h"
34 #include "power.h"
35 #include "cdv_device.h"
36 #include <linux/pm_runtime.h>
37
38
39 static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
40 {
41 struct drm_device *dev = encoder->dev;
42 u32 temp, reg;
43 reg = ADPA;
44
45 temp = REG_READ(reg);
46 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
47 temp &= ~ADPA_DAC_ENABLE;
48
49 switch (mode) {
50 case DRM_MODE_DPMS_ON:
51 temp |= ADPA_DAC_ENABLE;
52 break;
53 case DRM_MODE_DPMS_STANDBY:
54 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
55 break;
56 case DRM_MODE_DPMS_SUSPEND:
57 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
58 break;
59 case DRM_MODE_DPMS_OFF:
60 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
61 break;
62 }
63
64 REG_WRITE(reg, temp);
65 }
66
67 static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
68 struct drm_display_mode *mode)
69 {
70 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
71 return MODE_NO_DBLESCAN;
72
73 /* The lowest clock for CDV is 20000KHz */
74 if (mode->clock < 20000)
75 return MODE_CLOCK_LOW;
76
77 /* The max clock for CDV is 355 instead of 400 */
78 if (mode->clock > 355000)
79 return MODE_CLOCK_HIGH;
80
81 return MODE_OK;
82 }
83
84 static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
85 const struct drm_display_mode *mode,
86 struct drm_display_mode *adjusted_mode)
87 {
88 return true;
89 }
90
91 static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
92 struct drm_display_mode *mode,
93 struct drm_display_mode *adjusted_mode)
94 {
95
96 struct drm_device *dev = encoder->dev;
97 struct drm_crtc *crtc = encoder->crtc;
98 struct psb_intel_crtc *psb_intel_crtc =
99 to_psb_intel_crtc(crtc);
100 int dpll_md_reg;
101 u32 adpa, dpll_md;
102 u32 adpa_reg;
103
104 if (psb_intel_crtc->pipe == 0)
105 dpll_md_reg = DPLL_A_MD;
106 else
107 dpll_md_reg = DPLL_B_MD;
108
109 adpa_reg = ADPA;
110
111 /*
112 * Disable separate mode multiplier used when cloning SDVO to CRT
113 * XXX this needs to be adjusted when we really are cloning
114 */
115 {
116 dpll_md = REG_READ(dpll_md_reg);
117 REG_WRITE(dpll_md_reg,
118 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
119 }
120
121 adpa = 0;
122 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
123 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
124 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
125 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
126
127 if (psb_intel_crtc->pipe == 0)
128 adpa |= ADPA_PIPE_A_SELECT;
129 else
130 adpa |= ADPA_PIPE_B_SELECT;
131
132 REG_WRITE(adpa_reg, adpa);
133 }
134
135
136 /**
137 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
138 *
139 * \return true if CRT is connected.
140 * \return false if CRT is disconnected.
141 */
142 static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
143 bool force)
144 {
145 struct drm_device *dev = connector->dev;
146 u32 hotplug_en;
147 int i, tries = 0, ret = false;
148 u32 orig;
149
150 /*
151 * On a CDV thep, CRT detect sequence need to be done twice
152 * to get a reliable result.
153 */
154 tries = 2;
155
156 orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
157 hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
158 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
159
160 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
161 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
162
163 for (i = 0; i < tries ; i++) {
164 unsigned long timeout;
165 /* turn on the FORCE_DETECT */
166 REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
167 timeout = jiffies + msecs_to_jiffies(1000);
168 /* wait for FORCE_DETECT to go off */
169 do {
170 if (!(REG_READ(PORT_HOTPLUG_EN) &
171 CRT_HOTPLUG_FORCE_DETECT))
172 break;
173 msleep(1);
174 } while (time_after(timeout, jiffies));
175 }
176
177 if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
178 CRT_HOTPLUG_MONITOR_NONE)
179 ret = true;
180
181 /* clear the interrupt we just generated, if any */
182 REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
183
184 /* and put the bits back */
185 REG_WRITE(PORT_HOTPLUG_EN, orig);
186 return ret;
187 }
188
189 static enum drm_connector_status cdv_intel_crt_detect(
190 struct drm_connector *connector, bool force)
191 {
192 if (cdv_intel_crt_detect_hotplug(connector, force))
193 return connector_status_connected;
194 else
195 return connector_status_disconnected;
196 }
197
198 static void cdv_intel_crt_destroy(struct drm_connector *connector)
199 {
200 struct psb_intel_encoder *psb_intel_encoder =
201 psb_intel_attached_encoder(connector);
202
203 psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
204 drm_sysfs_connector_remove(connector);
205 drm_connector_cleanup(connector);
206 kfree(connector);
207 }
208
209 static int cdv_intel_crt_get_modes(struct drm_connector *connector)
210 {
211 struct psb_intel_encoder *psb_intel_encoder =
212 psb_intel_attached_encoder(connector);
213 return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter);
214 }
215
216 static int cdv_intel_crt_set_property(struct drm_connector *connector,
217 struct drm_property *property,
218 uint64_t value)
219 {
220 return 0;
221 }
222
223 /*
224 * Routines for controlling stuff on the analog port
225 */
226
227 static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
228 .dpms = cdv_intel_crt_dpms,
229 .mode_fixup = cdv_intel_crt_mode_fixup,
230 .prepare = psb_intel_encoder_prepare,
231 .commit = psb_intel_encoder_commit,
232 .mode_set = cdv_intel_crt_mode_set,
233 };
234
235 static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
236 .dpms = drm_helper_connector_dpms,
237 .detect = cdv_intel_crt_detect,
238 .fill_modes = drm_helper_probe_single_connector_modes,
239 .destroy = cdv_intel_crt_destroy,
240 .set_property = cdv_intel_crt_set_property,
241 };
242
243 static const struct drm_connector_helper_funcs
244 cdv_intel_crt_connector_helper_funcs = {
245 .mode_valid = cdv_intel_crt_mode_valid,
246 .get_modes = cdv_intel_crt_get_modes,
247 .best_encoder = psb_intel_best_encoder,
248 };
249
250 static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
251 {
252 drm_encoder_cleanup(encoder);
253 }
254
255 static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
256 .destroy = cdv_intel_crt_enc_destroy,
257 };
258
259 void cdv_intel_crt_init(struct drm_device *dev,
260 struct psb_intel_mode_device *mode_dev)
261 {
262
263 struct psb_intel_connector *psb_intel_connector;
264 struct psb_intel_encoder *psb_intel_encoder;
265 struct drm_connector *connector;
266 struct drm_encoder *encoder;
267
268 u32 i2c_reg;
269
270 psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
271 if (!psb_intel_encoder)
272 return;
273
274 psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
275 if (!psb_intel_connector)
276 goto failed_connector;
277
278 connector = &psb_intel_connector->base;
279 drm_connector_init(dev, connector,
280 &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
281
282 encoder = &psb_intel_encoder->base;
283 drm_encoder_init(dev, encoder,
284 &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
285
286 psb_intel_connector_attach_encoder(psb_intel_connector,
287 psb_intel_encoder);
288
289 /* Set up the DDC bus. */
290 i2c_reg = GPIOA;
291 /* Remove the following code for CDV */
292 /*
293 if (dev_priv->crt_ddc_bus != 0)
294 i2c_reg = dev_priv->crt_ddc_bus;
295 }*/
296 psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
297 i2c_reg, "CRTDDC_A");
298 if (!psb_intel_encoder->ddc_bus) {
299 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
300 "failed.\n");
301 goto failed_ddc;
302 }
303
304 psb_intel_encoder->type = INTEL_OUTPUT_ANALOG;
305 /*
306 psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
307 psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
308 */
309 connector->interlace_allowed = 0;
310 connector->doublescan_allowed = 0;
311
312 drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
313 drm_connector_helper_add(connector,
314 &cdv_intel_crt_connector_helper_funcs);
315
316 drm_sysfs_connector_add(connector);
317
318 return;
319 failed_ddc:
320 drm_encoder_cleanup(&psb_intel_encoder->base);
321 drm_connector_cleanup(&psb_intel_connector->base);
322 kfree(psb_intel_connector);
323 failed_connector:
324 kfree(psb_intel_encoder);
325 return;
326 }