Merge branch 'for-next' of git://sources.calxeda.com/kernel/linux into HEAD
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / eisa / pci_eisa.c
1 /*
2 * Minimalist driver for a generic PCI-to-EISA bridge.
3 *
4 * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
5 *
6 * This code is released under the GPL version 2.
7 *
8 * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
9 * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/device.h>
14 #include <linux/eisa.h>
15 #include <linux/pci.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18
19 /* There is only *one* pci_eisa device per machine, right ? */
20 static struct eisa_root_device pci_eisa_root;
21
22 static int __init pci_eisa_init(struct pci_dev *pdev)
23 {
24 int rc, i;
25 struct resource *res, *bus_res = NULL;
26
27 if ((rc = pci_enable_device (pdev))) {
28 printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
29 pci_name(pdev));
30 return rc;
31 }
32
33 /*
34 * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
35 * device, so the resources available on EISA are the same as those
36 * available on the 82375 bus. This works the same as a PCI-PCI
37 * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
38 * We assume other PCI-EISA bridges are similar.
39 *
40 * eisa_root_register() can only deal with a single io port resource,
41 * so we use the first valid io port resource.
42 */
43 pci_bus_for_each_resource(pdev->bus, res, i)
44 if (res && (res->flags & IORESOURCE_IO)) {
45 bus_res = res;
46 break;
47 }
48
49 if (!bus_res) {
50 dev_err(&pdev->dev, "No resources available\n");
51 return -1;
52 }
53
54 pci_eisa_root.dev = &pdev->dev;
55 pci_eisa_root.res = bus_res;
56 pci_eisa_root.bus_base_addr = bus_res->start;
57 pci_eisa_root.slots = EISA_MAX_SLOTS;
58 pci_eisa_root.dma_mask = pdev->dma_mask;
59 dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
60
61 if (eisa_root_register (&pci_eisa_root)) {
62 printk (KERN_ERR "pci_eisa : Could not register EISA root\n");
63 return -1;
64 }
65
66 return 0;
67 }
68
69 /*
70 * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
71 * Otherwise pnp resource will get enabled early and could prevent eisa
72 * to be initialized.
73 * Also need to make sure pci_eisa_init_early() is called after
74 * x86/pci_subsys_init().
75 * So need to use subsys_initcall_sync with it.
76 */
77 static int __init pci_eisa_init_early(void)
78 {
79 struct pci_dev *dev = NULL;
80 int ret;
81
82 for_each_pci_dev(dev)
83 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
84 ret = pci_eisa_init(dev);
85 if (ret)
86 return ret;
87 }
88
89 return 0;
90 }
91 subsys_initcall_sync(pci_eisa_init_early);