drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / crypto / atmel-sha-regs.h
1 #ifndef __ATMEL_SHA_REGS_H__
2 #define __ATMEL_SHA_REGS_H__
3
4 #define SHA_REG_DIGEST(x) (0x80 + ((x) * 0x04))
5 #define SHA_REG_DIN(x) (0x40 + ((x) * 0x04))
6
7 #define SHA_CR 0x00
8 #define SHA_CR_START (1 << 0)
9 #define SHA_CR_FIRST (1 << 4)
10 #define SHA_CR_SWRST (1 << 8)
11
12 #define SHA_MR 0x04
13 #define SHA_MR_MODE_MASK (0x3 << 0)
14 #define SHA_MR_MODE_MANUAL 0x0
15 #define SHA_MR_MODE_AUTO 0x1
16 #define SHA_MR_MODE_PDC 0x2
17 #define SHA_MR_PROCDLY (1 << 4)
18 #define SHA_MR_ALGO_SHA1 (0 << 8)
19 #define SHA_MR_ALGO_SHA256 (1 << 8)
20 #define SHA_MR_ALGO_SHA384 (2 << 8)
21 #define SHA_MR_ALGO_SHA512 (3 << 8)
22 #define SHA_MR_ALGO_SHA224 (4 << 8)
23 #define SHA_MR_DUALBUFF (1 << 16)
24
25 #define SHA_IER 0x10
26 #define SHA_IDR 0x14
27 #define SHA_IMR 0x18
28 #define SHA_ISR 0x1C
29 #define SHA_INT_DATARDY (1 << 0)
30 #define SHA_INT_ENDTX (1 << 1)
31 #define SHA_INT_TXBUFE (1 << 2)
32 #define SHA_INT_URAD (1 << 8)
33 #define SHA_ISR_URAT_MASK (0x7 << 12)
34 #define SHA_ISR_URAT_IDR (0x0 << 12)
35 #define SHA_ISR_URAT_ODR (0x1 << 12)
36 #define SHA_ISR_URAT_MR (0x2 << 12)
37 #define SHA_ISR_URAT_WO (0x5 << 12)
38
39 #define SHA_HW_VERSION 0xFC
40
41 #define SHA_TPR 0x108
42 #define SHA_TCR 0x10C
43 #define SHA_TNPR 0x118
44 #define SHA_TNCR 0x11C
45 #define SHA_PTCR 0x120
46 #define SHA_PTCR_TXTEN (1 << 8)
47 #define SHA_PTCR_TXTDIS (1 << 9)
48 #define SHA_PTSR 0x124
49 #define SHA_PTSR_TXTEN (1 << 8)
50
51 #endif /* __ATMEL_SHA_REGS_H__ */