Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplu...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / rsxx / cregs.c
1 /*
2 * Filename: cregs.c
3 *
4 *
5 * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
6 * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
7 *
8 * (C) Copyright 2013 IBM Corporation
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25 #include <linux/completion.h>
26 #include <linux/slab.h>
27
28 #include "rsxx_priv.h"
29
30 #define CREG_TIMEOUT_MSEC 10000
31
32 typedef void (*creg_cmd_cb)(struct rsxx_cardinfo *card,
33 struct creg_cmd *cmd,
34 int st);
35
36 struct creg_cmd {
37 struct list_head list;
38 creg_cmd_cb cb;
39 void *cb_private;
40 unsigned int op;
41 unsigned int addr;
42 int cnt8;
43 void *buf;
44 unsigned int stream;
45 unsigned int status;
46 };
47
48 static struct kmem_cache *creg_cmd_pool;
49
50
51 /*------------ Private Functions --------------*/
52
53 #if defined(__LITTLE_ENDIAN)
54 #define LITTLE_ENDIAN 1
55 #elif defined(__BIG_ENDIAN)
56 #define LITTLE_ENDIAN 0
57 #else
58 #error Unknown endianess!!! Aborting...
59 #endif
60
61 static int copy_to_creg_data(struct rsxx_cardinfo *card,
62 int cnt8,
63 void *buf,
64 unsigned int stream)
65 {
66 int i = 0;
67 u32 *data = buf;
68
69 if (unlikely(card->eeh_state))
70 return -EIO;
71
72 for (i = 0; cnt8 > 0; i++, cnt8 -= 4) {
73 /*
74 * Firmware implementation makes it necessary to byte swap on
75 * little endian processors.
76 */
77 if (LITTLE_ENDIAN && stream)
78 iowrite32be(data[i], card->regmap + CREG_DATA(i));
79 else
80 iowrite32(data[i], card->regmap + CREG_DATA(i));
81 }
82
83 return 0;
84 }
85
86
87 static int copy_from_creg_data(struct rsxx_cardinfo *card,
88 int cnt8,
89 void *buf,
90 unsigned int stream)
91 {
92 int i = 0;
93 u32 *data = buf;
94
95 if (unlikely(card->eeh_state))
96 return -EIO;
97
98 for (i = 0; cnt8 > 0; i++, cnt8 -= 4) {
99 /*
100 * Firmware implementation makes it necessary to byte swap on
101 * little endian processors.
102 */
103 if (LITTLE_ENDIAN && stream)
104 data[i] = ioread32be(card->regmap + CREG_DATA(i));
105 else
106 data[i] = ioread32(card->regmap + CREG_DATA(i));
107 }
108
109 return 0;
110 }
111
112 static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd)
113 {
114 int st;
115
116 if (unlikely(card->eeh_state))
117 return;
118
119 iowrite32(cmd->addr, card->regmap + CREG_ADD);
120 iowrite32(cmd->cnt8, card->regmap + CREG_CNT);
121
122 if (cmd->op == CREG_OP_WRITE) {
123 if (cmd->buf) {
124 st = copy_to_creg_data(card, cmd->cnt8,
125 cmd->buf, cmd->stream);
126 if (st)
127 return;
128 }
129 }
130
131 if (unlikely(card->eeh_state))
132 return;
133
134 /* Setting the valid bit will kick off the command. */
135 iowrite32(cmd->op, card->regmap + CREG_CMD);
136 }
137
138 static void creg_kick_queue(struct rsxx_cardinfo *card)
139 {
140 if (card->creg_ctrl.active || list_empty(&card->creg_ctrl.queue))
141 return;
142
143 card->creg_ctrl.active = 1;
144 card->creg_ctrl.active_cmd = list_first_entry(&card->creg_ctrl.queue,
145 struct creg_cmd, list);
146 list_del(&card->creg_ctrl.active_cmd->list);
147 card->creg_ctrl.q_depth--;
148
149 /*
150 * We have to set the timer before we push the new command. Otherwise,
151 * we could create a race condition that would occur if the timer
152 * was not canceled, and expired after the new command was pushed,
153 * but before the command was issued to hardware.
154 */
155 mod_timer(&card->creg_ctrl.cmd_timer,
156 jiffies + msecs_to_jiffies(CREG_TIMEOUT_MSEC));
157
158 creg_issue_cmd(card, card->creg_ctrl.active_cmd);
159 }
160
161 static int creg_queue_cmd(struct rsxx_cardinfo *card,
162 unsigned int op,
163 unsigned int addr,
164 unsigned int cnt8,
165 void *buf,
166 int stream,
167 creg_cmd_cb callback,
168 void *cb_private)
169 {
170 struct creg_cmd *cmd;
171
172 /* Don't queue stuff up if we're halted. */
173 if (unlikely(card->halt))
174 return -EINVAL;
175
176 if (card->creg_ctrl.reset)
177 return -EAGAIN;
178
179 if (cnt8 > MAX_CREG_DATA8)
180 return -EINVAL;
181
182 cmd = kmem_cache_alloc(creg_cmd_pool, GFP_KERNEL);
183 if (!cmd)
184 return -ENOMEM;
185
186 INIT_LIST_HEAD(&cmd->list);
187
188 cmd->op = op;
189 cmd->addr = addr;
190 cmd->cnt8 = cnt8;
191 cmd->buf = buf;
192 cmd->stream = stream;
193 cmd->cb = callback;
194 cmd->cb_private = cb_private;
195 cmd->status = 0;
196
197 spin_lock_bh(&card->creg_ctrl.lock);
198 list_add_tail(&cmd->list, &card->creg_ctrl.queue);
199 card->creg_ctrl.q_depth++;
200 creg_kick_queue(card);
201 spin_unlock_bh(&card->creg_ctrl.lock);
202
203 return 0;
204 }
205
206 static void creg_cmd_timed_out(unsigned long data)
207 {
208 struct rsxx_cardinfo *card = (struct rsxx_cardinfo *) data;
209 struct creg_cmd *cmd;
210
211 spin_lock(&card->creg_ctrl.lock);
212 cmd = card->creg_ctrl.active_cmd;
213 card->creg_ctrl.active_cmd = NULL;
214 spin_unlock(&card->creg_ctrl.lock);
215
216 if (cmd == NULL) {
217 card->creg_ctrl.creg_stats.creg_timeout++;
218 dev_warn(CARD_TO_DEV(card),
219 "No active command associated with timeout!\n");
220 return;
221 }
222
223 if (cmd->cb)
224 cmd->cb(card, cmd, -ETIMEDOUT);
225
226 kmem_cache_free(creg_cmd_pool, cmd);
227
228
229 spin_lock(&card->creg_ctrl.lock);
230 card->creg_ctrl.active = 0;
231 creg_kick_queue(card);
232 spin_unlock(&card->creg_ctrl.lock);
233 }
234
235
236 static void creg_cmd_done(struct work_struct *work)
237 {
238 struct rsxx_cardinfo *card;
239 struct creg_cmd *cmd;
240 int st = 0;
241
242 card = container_of(work, struct rsxx_cardinfo,
243 creg_ctrl.done_work);
244
245 /*
246 * The timer could not be cancelled for some reason,
247 * race to pop the active command.
248 */
249 if (del_timer_sync(&card->creg_ctrl.cmd_timer) == 0)
250 card->creg_ctrl.creg_stats.failed_cancel_timer++;
251
252 spin_lock_bh(&card->creg_ctrl.lock);
253 cmd = card->creg_ctrl.active_cmd;
254 card->creg_ctrl.active_cmd = NULL;
255 spin_unlock_bh(&card->creg_ctrl.lock);
256
257 if (cmd == NULL) {
258 dev_err(CARD_TO_DEV(card),
259 "Spurious creg interrupt!\n");
260 return;
261 }
262
263 card->creg_ctrl.creg_stats.stat = ioread32(card->regmap + CREG_STAT);
264 cmd->status = card->creg_ctrl.creg_stats.stat;
265 if ((cmd->status & CREG_STAT_STATUS_MASK) == 0) {
266 dev_err(CARD_TO_DEV(card),
267 "Invalid status on creg command\n");
268 /*
269 * At this point we're probably reading garbage from HW. Don't
270 * do anything else that could mess up the system and let
271 * the sync function return an error.
272 */
273 st = -EIO;
274 goto creg_done;
275 } else if (cmd->status & CREG_STAT_ERROR) {
276 st = -EIO;
277 }
278
279 if ((cmd->op == CREG_OP_READ)) {
280 unsigned int cnt8 = ioread32(card->regmap + CREG_CNT);
281
282 /* Paranoid Sanity Checks */
283 if (!cmd->buf) {
284 dev_err(CARD_TO_DEV(card),
285 "Buffer not given for read.\n");
286 st = -EIO;
287 goto creg_done;
288 }
289 if (cnt8 != cmd->cnt8) {
290 dev_err(CARD_TO_DEV(card),
291 "count mismatch\n");
292 st = -EIO;
293 goto creg_done;
294 }
295
296 st = copy_from_creg_data(card, cnt8, cmd->buf, cmd->stream);
297 }
298
299 creg_done:
300 if (cmd->cb)
301 cmd->cb(card, cmd, st);
302
303 kmem_cache_free(creg_cmd_pool, cmd);
304
305 spin_lock_bh(&card->creg_ctrl.lock);
306 card->creg_ctrl.active = 0;
307 creg_kick_queue(card);
308 spin_unlock_bh(&card->creg_ctrl.lock);
309 }
310
311 static void creg_reset(struct rsxx_cardinfo *card)
312 {
313 struct creg_cmd *cmd = NULL;
314 struct creg_cmd *tmp;
315 unsigned long flags;
316
317 /*
318 * mutex_trylock is used here because if reset_lock is taken then a
319 * reset is already happening. So, we can just go ahead and return.
320 */
321 if (!mutex_trylock(&card->creg_ctrl.reset_lock))
322 return;
323
324 card->creg_ctrl.reset = 1;
325 spin_lock_irqsave(&card->irq_lock, flags);
326 rsxx_disable_ier_and_isr(card, CR_INTR_CREG | CR_INTR_EVENT);
327 spin_unlock_irqrestore(&card->irq_lock, flags);
328
329 dev_warn(CARD_TO_DEV(card),
330 "Resetting creg interface for recovery\n");
331
332 /* Cancel outstanding commands */
333 spin_lock_bh(&card->creg_ctrl.lock);
334 list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) {
335 list_del(&cmd->list);
336 card->creg_ctrl.q_depth--;
337 if (cmd->cb)
338 cmd->cb(card, cmd, -ECANCELED);
339 kmem_cache_free(creg_cmd_pool, cmd);
340 }
341
342 cmd = card->creg_ctrl.active_cmd;
343 card->creg_ctrl.active_cmd = NULL;
344 if (cmd) {
345 if (timer_pending(&card->creg_ctrl.cmd_timer))
346 del_timer_sync(&card->creg_ctrl.cmd_timer);
347
348 if (cmd->cb)
349 cmd->cb(card, cmd, -ECANCELED);
350 kmem_cache_free(creg_cmd_pool, cmd);
351
352 card->creg_ctrl.active = 0;
353 }
354 spin_unlock_bh(&card->creg_ctrl.lock);
355
356 card->creg_ctrl.reset = 0;
357 spin_lock_irqsave(&card->irq_lock, flags);
358 rsxx_enable_ier_and_isr(card, CR_INTR_CREG | CR_INTR_EVENT);
359 spin_unlock_irqrestore(&card->irq_lock, flags);
360
361 mutex_unlock(&card->creg_ctrl.reset_lock);
362 }
363
364 /* Used for synchronous accesses */
365 struct creg_completion {
366 struct completion *cmd_done;
367 int st;
368 u32 creg_status;
369 };
370
371 static void creg_cmd_done_cb(struct rsxx_cardinfo *card,
372 struct creg_cmd *cmd,
373 int st)
374 {
375 struct creg_completion *cmd_completion;
376
377 cmd_completion = cmd->cb_private;
378 BUG_ON(!cmd_completion);
379
380 cmd_completion->st = st;
381 cmd_completion->creg_status = cmd->status;
382 complete(cmd_completion->cmd_done);
383 }
384
385 static int __issue_creg_rw(struct rsxx_cardinfo *card,
386 unsigned int op,
387 unsigned int addr,
388 unsigned int cnt8,
389 void *buf,
390 int stream,
391 unsigned int *hw_stat)
392 {
393 DECLARE_COMPLETION_ONSTACK(cmd_done);
394 struct creg_completion completion;
395 unsigned long timeout;
396 int st;
397
398 completion.cmd_done = &cmd_done;
399 completion.st = 0;
400 completion.creg_status = 0;
401
402 st = creg_queue_cmd(card, op, addr, cnt8, buf, stream, creg_cmd_done_cb,
403 &completion);
404 if (st)
405 return st;
406
407 /*
408 * This timeout is necessary for unresponsive hardware. The additional
409 * 20 seconds to used to guarantee that each cregs requests has time to
410 * complete.
411 */
412 timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC *
413 card->creg_ctrl.q_depth + 20000);
414
415 /*
416 * The creg interface is guaranteed to complete. It has a timeout
417 * mechanism that will kick in if hardware does not respond.
418 */
419 st = wait_for_completion_timeout(completion.cmd_done, timeout);
420 if (st == 0) {
421 /*
422 * This is really bad, because the kernel timer did not
423 * expire and notify us of a timeout!
424 */
425 dev_crit(CARD_TO_DEV(card),
426 "cregs timer failed\n");
427 creg_reset(card);
428 return -EIO;
429 }
430
431 *hw_stat = completion.creg_status;
432
433 if (completion.st) {
434 dev_warn(CARD_TO_DEV(card),
435 "creg command failed(%d x%08x)\n",
436 completion.st, addr);
437 return completion.st;
438 }
439
440 return 0;
441 }
442
443 static int issue_creg_rw(struct rsxx_cardinfo *card,
444 u32 addr,
445 unsigned int size8,
446 void *data,
447 int stream,
448 int read)
449 {
450 unsigned int hw_stat;
451 unsigned int xfer;
452 unsigned int op;
453 int st;
454
455 op = read ? CREG_OP_READ : CREG_OP_WRITE;
456
457 do {
458 xfer = min_t(unsigned int, size8, MAX_CREG_DATA8);
459
460 st = __issue_creg_rw(card, op, addr, xfer,
461 data, stream, &hw_stat);
462 if (st)
463 return st;
464
465 data = (char *)data + xfer;
466 addr += xfer;
467 size8 -= xfer;
468 } while (size8);
469
470 return 0;
471 }
472
473 /* ---------------------------- Public API ---------------------------------- */
474 int rsxx_creg_write(struct rsxx_cardinfo *card,
475 u32 addr,
476 unsigned int size8,
477 void *data,
478 int byte_stream)
479 {
480 return issue_creg_rw(card, addr, size8, data, byte_stream, 0);
481 }
482
483 int rsxx_creg_read(struct rsxx_cardinfo *card,
484 u32 addr,
485 unsigned int size8,
486 void *data,
487 int byte_stream)
488 {
489 return issue_creg_rw(card, addr, size8, data, byte_stream, 1);
490 }
491
492 int rsxx_get_card_state(struct rsxx_cardinfo *card, unsigned int *state)
493 {
494 return rsxx_creg_read(card, CREG_ADD_CARD_STATE,
495 sizeof(*state), state, 0);
496 }
497
498 int rsxx_get_card_size8(struct rsxx_cardinfo *card, u64 *size8)
499 {
500 unsigned int size;
501 int st;
502
503 st = rsxx_creg_read(card, CREG_ADD_CARD_SIZE,
504 sizeof(size), &size, 0);
505 if (st)
506 return st;
507
508 *size8 = (u64)size * RSXX_HW_BLK_SIZE;
509 return 0;
510 }
511
512 int rsxx_get_num_targets(struct rsxx_cardinfo *card,
513 unsigned int *n_targets)
514 {
515 return rsxx_creg_read(card, CREG_ADD_NUM_TARGETS,
516 sizeof(*n_targets), n_targets, 0);
517 }
518
519 int rsxx_get_card_capabilities(struct rsxx_cardinfo *card,
520 u32 *capabilities)
521 {
522 return rsxx_creg_read(card, CREG_ADD_CAPABILITIES,
523 sizeof(*capabilities), capabilities, 0);
524 }
525
526 int rsxx_issue_card_cmd(struct rsxx_cardinfo *card, u32 cmd)
527 {
528 return rsxx_creg_write(card, CREG_ADD_CARD_CMD,
529 sizeof(cmd), &cmd, 0);
530 }
531
532
533 /*----------------- HW Log Functions -------------------*/
534 static void hw_log_msg(struct rsxx_cardinfo *card, const char *str, int len)
535 {
536 static char level;
537
538 /*
539 * New messages start with "<#>", where # is the log level. Messages
540 * that extend past the log buffer will use the previous level
541 */
542 if ((len > 3) && (str[0] == '<') && (str[2] == '>')) {
543 level = str[1];
544 str += 3; /* Skip past the log level. */
545 len -= 3;
546 }
547
548 switch (level) {
549 case '0':
550 dev_emerg(CARD_TO_DEV(card), "HW: %.*s", len, str);
551 break;
552 case '1':
553 dev_alert(CARD_TO_DEV(card), "HW: %.*s", len, str);
554 break;
555 case '2':
556 dev_crit(CARD_TO_DEV(card), "HW: %.*s", len, str);
557 break;
558 case '3':
559 dev_err(CARD_TO_DEV(card), "HW: %.*s", len, str);
560 break;
561 case '4':
562 dev_warn(CARD_TO_DEV(card), "HW: %.*s", len, str);
563 break;
564 case '5':
565 dev_notice(CARD_TO_DEV(card), "HW: %.*s", len, str);
566 break;
567 case '6':
568 dev_info(CARD_TO_DEV(card), "HW: %.*s", len, str);
569 break;
570 case '7':
571 dev_dbg(CARD_TO_DEV(card), "HW: %.*s", len, str);
572 break;
573 default:
574 dev_info(CARD_TO_DEV(card), "HW: %.*s", len, str);
575 break;
576 }
577 }
578
579 /*
580 * The substrncpy function copies the src string (which includes the
581 * terminating '\0' character), up to the count into the dest pointer.
582 * Returns the number of bytes copied to dest.
583 */
584 static int substrncpy(char *dest, const char *src, int count)
585 {
586 int max_cnt = count;
587
588 while (count) {
589 count--;
590 *dest = *src;
591 if (*dest == '\0')
592 break;
593 src++;
594 dest++;
595 }
596 return max_cnt - count;
597 }
598
599
600 static void read_hw_log_done(struct rsxx_cardinfo *card,
601 struct creg_cmd *cmd,
602 int st)
603 {
604 char *buf;
605 char *log_str;
606 int cnt;
607 int len;
608 int off;
609
610 buf = cmd->buf;
611 off = 0;
612
613 /* Failed getting the log message */
614 if (st)
615 return;
616
617 while (off < cmd->cnt8) {
618 log_str = &card->log.buf[card->log.buf_len];
619 cnt = min(cmd->cnt8 - off, LOG_BUF_SIZE8 - card->log.buf_len);
620 len = substrncpy(log_str, &buf[off], cnt);
621
622 off += len;
623 card->log.buf_len += len;
624
625 /*
626 * Flush the log if we've hit the end of a message or if we've
627 * run out of buffer space.
628 */
629 if ((log_str[len - 1] == '\0') ||
630 (card->log.buf_len == LOG_BUF_SIZE8)) {
631 if (card->log.buf_len != 1) /* Don't log blank lines. */
632 hw_log_msg(card, card->log.buf,
633 card->log.buf_len);
634 card->log.buf_len = 0;
635 }
636
637 }
638
639 if (cmd->status & CREG_STAT_LOG_PENDING)
640 rsxx_read_hw_log(card);
641 }
642
643 int rsxx_read_hw_log(struct rsxx_cardinfo *card)
644 {
645 int st;
646
647 st = creg_queue_cmd(card, CREG_OP_READ, CREG_ADD_LOG,
648 sizeof(card->log.tmp), card->log.tmp,
649 1, read_hw_log_done, NULL);
650 if (st)
651 dev_err(CARD_TO_DEV(card),
652 "Failed getting log text\n");
653
654 return st;
655 }
656
657 /*-------------- IOCTL REG Access ------------------*/
658 static int issue_reg_cmd(struct rsxx_cardinfo *card,
659 struct rsxx_reg_access *cmd,
660 int read)
661 {
662 unsigned int op = read ? CREG_OP_READ : CREG_OP_WRITE;
663
664 return __issue_creg_rw(card, op, cmd->addr, cmd->cnt, cmd->data,
665 cmd->stream, &cmd->stat);
666 }
667
668 int rsxx_reg_access(struct rsxx_cardinfo *card,
669 struct rsxx_reg_access __user *ucmd,
670 int read)
671 {
672 struct rsxx_reg_access cmd;
673 int st;
674
675 st = copy_from_user(&cmd, ucmd, sizeof(cmd));
676 if (st)
677 return -EFAULT;
678
679 if (cmd.cnt > RSXX_MAX_REG_CNT)
680 return -EFAULT;
681
682 st = issue_reg_cmd(card, &cmd, read);
683 if (st)
684 return st;
685
686 st = put_user(cmd.stat, &ucmd->stat);
687 if (st)
688 return -EFAULT;
689
690 if (read) {
691 st = copy_to_user(ucmd->data, cmd.data, cmd.cnt);
692 if (st)
693 return -EFAULT;
694 }
695
696 return 0;
697 }
698
699 void rsxx_eeh_save_issued_creg(struct rsxx_cardinfo *card)
700 {
701 struct creg_cmd *cmd = NULL;
702
703 cmd = card->creg_ctrl.active_cmd;
704 card->creg_ctrl.active_cmd = NULL;
705
706 if (cmd) {
707 del_timer_sync(&card->creg_ctrl.cmd_timer);
708
709 spin_lock_bh(&card->creg_ctrl.lock);
710 list_add(&cmd->list, &card->creg_ctrl.queue);
711 card->creg_ctrl.q_depth++;
712 card->creg_ctrl.active = 0;
713 spin_unlock_bh(&card->creg_ctrl.lock);
714 }
715 }
716
717 void rsxx_kick_creg_queue(struct rsxx_cardinfo *card)
718 {
719 spin_lock_bh(&card->creg_ctrl.lock);
720 if (!list_empty(&card->creg_ctrl.queue))
721 creg_kick_queue(card);
722 spin_unlock_bh(&card->creg_ctrl.lock);
723 }
724
725 /*------------ Initialization & Setup --------------*/
726 int rsxx_creg_setup(struct rsxx_cardinfo *card)
727 {
728 card->creg_ctrl.active_cmd = NULL;
729
730 INIT_WORK(&card->creg_ctrl.done_work, creg_cmd_done);
731 mutex_init(&card->creg_ctrl.reset_lock);
732 INIT_LIST_HEAD(&card->creg_ctrl.queue);
733 spin_lock_init(&card->creg_ctrl.lock);
734 setup_timer(&card->creg_ctrl.cmd_timer, creg_cmd_timed_out,
735 (unsigned long) card);
736
737 return 0;
738 }
739
740 void rsxx_creg_destroy(struct rsxx_cardinfo *card)
741 {
742 struct creg_cmd *cmd;
743 struct creg_cmd *tmp;
744 int cnt = 0;
745
746 /* Cancel outstanding commands */
747 spin_lock_bh(&card->creg_ctrl.lock);
748 list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) {
749 list_del(&cmd->list);
750 if (cmd->cb)
751 cmd->cb(card, cmd, -ECANCELED);
752 kmem_cache_free(creg_cmd_pool, cmd);
753 cnt++;
754 }
755
756 if (cnt)
757 dev_info(CARD_TO_DEV(card),
758 "Canceled %d queue creg commands\n", cnt);
759
760 cmd = card->creg_ctrl.active_cmd;
761 card->creg_ctrl.active_cmd = NULL;
762 if (cmd) {
763 if (timer_pending(&card->creg_ctrl.cmd_timer))
764 del_timer_sync(&card->creg_ctrl.cmd_timer);
765
766 if (cmd->cb)
767 cmd->cb(card, cmd, -ECANCELED);
768 dev_info(CARD_TO_DEV(card),
769 "Canceled active creg command\n");
770 kmem_cache_free(creg_cmd_pool, cmd);
771 }
772 spin_unlock_bh(&card->creg_ctrl.lock);
773
774 cancel_work_sync(&card->creg_ctrl.done_work);
775 }
776
777
778 int rsxx_creg_init(void)
779 {
780 creg_cmd_pool = KMEM_CACHE(creg_cmd, SLAB_HWCACHE_ALIGN);
781 if (!creg_cmd_pool)
782 return -ENOMEM;
783
784 return 0;
785 }
786
787 void rsxx_creg_cleanup(void)
788 {
789 kmem_cache_destroy(creg_cmd_pool);
790 }