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Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplu...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / mtip32xx / mtip32xx.c
1 /*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21 #include <linux/pci.h>
22 #include <linux/interrupt.h>
23 #include <linux/ata.h>
24 #include <linux/delay.h>
25 #include <linux/hdreg.h>
26 #include <linux/uaccess.h>
27 #include <linux/random.h>
28 #include <linux/smp.h>
29 #include <linux/compat.h>
30 #include <linux/fs.h>
31 #include <linux/module.h>
32 #include <linux/genhd.h>
33 #include <linux/blkdev.h>
34 #include <linux/bio.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/idr.h>
37 #include <linux/kthread.h>
38 #include <../drivers/ata/ahci.h>
39 #include <linux/export.h>
40 #include <linux/debugfs.h>
41 #include "mtip32xx.h"
42
43 #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
44 #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16))
45 #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS)
46 #define HW_PORT_PRIV_DMA_SZ \
47 (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ)
48
49 #define HOST_CAP_NZDMA (1 << 19)
50 #define HOST_HSORG 0xFC
51 #define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
52 #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
53 #define HSORG_HWREV 0xFF00
54 #define HSORG_STYLE 0x8
55 #define HSORG_SLOTGROUPS 0x7
56
57 #define PORT_COMMAND_ISSUE 0x38
58 #define PORT_SDBV 0x7C
59
60 #define PORT_OFFSET 0x100
61 #define PORT_MEM_SIZE 0x80
62
63 #define PORT_IRQ_ERR \
64 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
65 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
66 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
67 PORT_IRQ_OVERFLOW)
68 #define PORT_IRQ_LEGACY \
69 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
70 #define PORT_IRQ_HANDLED \
71 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
72 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
73 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
74 #define DEF_PORT_IRQ \
75 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
76
77 /* product numbers */
78 #define MTIP_PRODUCT_UNKNOWN 0x00
79 #define MTIP_PRODUCT_ASICFPGA 0x11
80
81 /* Device instance number, incremented each time a device is probed. */
82 static int instance;
83
84 struct list_head online_list;
85 struct list_head removing_list;
86 spinlock_t dev_lock;
87
88 /*
89 * Global variable used to hold the major block device number
90 * allocated in mtip_init().
91 */
92 static int mtip_major;
93 static struct dentry *dfs_parent;
94 static struct dentry *dfs_device_status;
95
96 static u32 cpu_use[NR_CPUS];
97
98 static DEFINE_SPINLOCK(rssd_index_lock);
99 static DEFINE_IDA(rssd_index_ida);
100
101 static int mtip_block_initialize(struct driver_data *dd);
102
103 #ifdef CONFIG_COMPAT
104 struct mtip_compat_ide_task_request_s {
105 __u8 io_ports[8];
106 __u8 hob_ports[8];
107 ide_reg_valid_t out_flags;
108 ide_reg_valid_t in_flags;
109 int data_phase;
110 int req_cmd;
111 compat_ulong_t out_size;
112 compat_ulong_t in_size;
113 };
114 #endif
115
116 /*
117 * This function check_for_surprise_removal is called
118 * while card is removed from the system and it will
119 * read the vendor id from the configration space
120 *
121 * @pdev Pointer to the pci_dev structure.
122 *
123 * return value
124 * true if device removed, else false
125 */
126 static bool mtip_check_surprise_removal(struct pci_dev *pdev)
127 {
128 u16 vendor_id = 0;
129
130 /* Read the vendorID from the configuration space */
131 pci_read_config_word(pdev, 0x00, &vendor_id);
132 if (vendor_id == 0xFFFF)
133 return true; /* device removed */
134
135 return false; /* device present */
136 }
137
138 /*
139 * This function is called for clean the pending command in the
140 * command slot during the surprise removal of device and return
141 * error to the upper layer.
142 *
143 * @dd Pointer to the DRIVER_DATA structure.
144 *
145 * return value
146 * None
147 */
148 static void mtip_command_cleanup(struct driver_data *dd)
149 {
150 int group = 0, commandslot = 0, commandindex = 0;
151 struct mtip_cmd *command;
152 struct mtip_port *port = dd->port;
153 static int in_progress;
154
155 if (in_progress)
156 return;
157
158 in_progress = 1;
159
160 for (group = 0; group < 4; group++) {
161 for (commandslot = 0; commandslot < 32; commandslot++) {
162 if (!(port->allocated[group] & (1 << commandslot)))
163 continue;
164
165 commandindex = group << 5 | commandslot;
166 command = &port->commands[commandindex];
167
168 if (atomic_read(&command->active)
169 && (command->async_callback)) {
170 command->async_callback(command->async_data,
171 -ENODEV);
172 command->async_callback = NULL;
173 command->async_data = NULL;
174 }
175
176 dma_unmap_sg(&port->dd->pdev->dev,
177 command->sg,
178 command->scatter_ents,
179 command->direction);
180 }
181 }
182
183 up(&port->cmd_slot);
184
185 set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag);
186 in_progress = 0;
187 }
188
189 /*
190 * Obtain an empty command slot.
191 *
192 * This function needs to be reentrant since it could be called
193 * at the same time on multiple CPUs. The allocation of the
194 * command slot must be atomic.
195 *
196 * @port Pointer to the port data structure.
197 *
198 * return value
199 * >= 0 Index of command slot obtained.
200 * -1 No command slots available.
201 */
202 static int get_slot(struct mtip_port *port)
203 {
204 int slot, i;
205 unsigned int num_command_slots = port->dd->slot_groups * 32;
206
207 /*
208 * Try 10 times, because there is a small race here.
209 * that's ok, because it's still cheaper than a lock.
210 *
211 * Race: Since this section is not protected by lock, same bit
212 * could be chosen by different process contexts running in
213 * different processor. So instead of costly lock, we are going
214 * with loop.
215 */
216 for (i = 0; i < 10; i++) {
217 slot = find_next_zero_bit(port->allocated,
218 num_command_slots, 1);
219 if ((slot < num_command_slots) &&
220 (!test_and_set_bit(slot, port->allocated)))
221 return slot;
222 }
223 dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n");
224
225 if (mtip_check_surprise_removal(port->dd->pdev)) {
226 /* Device not present, clean outstanding commands */
227 mtip_command_cleanup(port->dd);
228 }
229 return -1;
230 }
231
232 /*
233 * Release a command slot.
234 *
235 * @port Pointer to the port data structure.
236 * @tag Tag of command to release
237 *
238 * return value
239 * None
240 */
241 static inline void release_slot(struct mtip_port *port, int tag)
242 {
243 smp_mb__before_clear_bit();
244 clear_bit(tag, port->allocated);
245 smp_mb__after_clear_bit();
246 }
247
248 /*
249 * Reset the HBA (without sleeping)
250 *
251 * @dd Pointer to the driver data structure.
252 *
253 * return value
254 * 0 The reset was successful.
255 * -1 The HBA Reset bit did not clear.
256 */
257 static int mtip_hba_reset(struct driver_data *dd)
258 {
259 unsigned long timeout;
260
261 /* Set the reset bit */
262 writel(HOST_RESET, dd->mmio + HOST_CTL);
263
264 /* Flush */
265 readl(dd->mmio + HOST_CTL);
266
267 /* Spin for up to 2 seconds, waiting for reset acknowledgement */
268 timeout = jiffies + msecs_to_jiffies(2000);
269 do {
270 mdelay(10);
271 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
272 return -1;
273
274 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
275 && time_before(jiffies, timeout));
276
277 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
278 return -1;
279
280 return 0;
281 }
282
283 /*
284 * Issue a command to the hardware.
285 *
286 * Set the appropriate bit in the s_active and Command Issue hardware
287 * registers, causing hardware command processing to begin.
288 *
289 * @port Pointer to the port structure.
290 * @tag The tag of the command to be issued.
291 *
292 * return value
293 * None
294 */
295 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
296 {
297 int group = tag >> 5;
298
299 atomic_set(&port->commands[tag].active, 1);
300
301 /* guard SACT and CI registers */
302 spin_lock(&port->cmd_issue_lock[group]);
303 writel((1 << MTIP_TAG_BIT(tag)),
304 port->s_active[MTIP_TAG_INDEX(tag)]);
305 writel((1 << MTIP_TAG_BIT(tag)),
306 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
307 spin_unlock(&port->cmd_issue_lock[group]);
308
309 /* Set the command's timeout value.*/
310 port->commands[tag].comp_time = jiffies + msecs_to_jiffies(
311 MTIP_NCQ_COMMAND_TIMEOUT_MS);
312 }
313
314 /*
315 * Enable/disable the reception of FIS
316 *
317 * @port Pointer to the port data structure
318 * @enable 1 to enable, 0 to disable
319 *
320 * return value
321 * Previous state: 1 enabled, 0 disabled
322 */
323 static int mtip_enable_fis(struct mtip_port *port, int enable)
324 {
325 u32 tmp;
326
327 /* enable FIS reception */
328 tmp = readl(port->mmio + PORT_CMD);
329 if (enable)
330 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
331 else
332 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
333
334 /* Flush */
335 readl(port->mmio + PORT_CMD);
336
337 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
338 }
339
340 /*
341 * Enable/disable the DMA engine
342 *
343 * @port Pointer to the port data structure
344 * @enable 1 to enable, 0 to disable
345 *
346 * return value
347 * Previous state: 1 enabled, 0 disabled.
348 */
349 static int mtip_enable_engine(struct mtip_port *port, int enable)
350 {
351 u32 tmp;
352
353 /* enable FIS reception */
354 tmp = readl(port->mmio + PORT_CMD);
355 if (enable)
356 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
357 else
358 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
359
360 readl(port->mmio + PORT_CMD);
361 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
362 }
363
364 /*
365 * Enables the port DMA engine and FIS reception.
366 *
367 * return value
368 * None
369 */
370 static inline void mtip_start_port(struct mtip_port *port)
371 {
372 /* Enable FIS reception */
373 mtip_enable_fis(port, 1);
374
375 /* Enable the DMA engine */
376 mtip_enable_engine(port, 1);
377 }
378
379 /*
380 * Deinitialize a port by disabling port interrupts, the DMA engine,
381 * and FIS reception.
382 *
383 * @port Pointer to the port structure
384 *
385 * return value
386 * None
387 */
388 static inline void mtip_deinit_port(struct mtip_port *port)
389 {
390 /* Disable interrupts on this port */
391 writel(0, port->mmio + PORT_IRQ_MASK);
392
393 /* Disable the DMA engine */
394 mtip_enable_engine(port, 0);
395
396 /* Disable FIS reception */
397 mtip_enable_fis(port, 0);
398 }
399
400 /*
401 * Initialize a port.
402 *
403 * This function deinitializes the port by calling mtip_deinit_port() and
404 * then initializes it by setting the command header and RX FIS addresses,
405 * clearing the SError register and any pending port interrupts before
406 * re-enabling the default set of port interrupts.
407 *
408 * @port Pointer to the port structure.
409 *
410 * return value
411 * None
412 */
413 static void mtip_init_port(struct mtip_port *port)
414 {
415 int i;
416 mtip_deinit_port(port);
417
418 /* Program the command list base and FIS base addresses */
419 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
420 writel((port->command_list_dma >> 16) >> 16,
421 port->mmio + PORT_LST_ADDR_HI);
422 writel((port->rxfis_dma >> 16) >> 16,
423 port->mmio + PORT_FIS_ADDR_HI);
424 }
425
426 writel(port->command_list_dma & 0xFFFFFFFF,
427 port->mmio + PORT_LST_ADDR);
428 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
429
430 /* Clear SError */
431 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
432
433 /* reset the completed registers.*/
434 for (i = 0; i < port->dd->slot_groups; i++)
435 writel(0xFFFFFFFF, port->completed[i]);
436
437 /* Clear any pending interrupts for this port */
438 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
439
440 /* Clear any pending interrupts on the HBA. */
441 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
442 port->dd->mmio + HOST_IRQ_STAT);
443
444 /* Enable port interrupts */
445 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
446 }
447
448 /*
449 * Restart a port
450 *
451 * @port Pointer to the port data structure.
452 *
453 * return value
454 * None
455 */
456 static void mtip_restart_port(struct mtip_port *port)
457 {
458 unsigned long timeout;
459
460 /* Disable the DMA engine */
461 mtip_enable_engine(port, 0);
462
463 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
464 timeout = jiffies + msecs_to_jiffies(500);
465 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
466 && time_before(jiffies, timeout))
467 ;
468
469 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
470 return;
471
472 /*
473 * Chip quirk: escalate to hba reset if
474 * PxCMD.CR not clear after 500 ms
475 */
476 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
477 dev_warn(&port->dd->pdev->dev,
478 "PxCMD.CR not clear, escalating reset\n");
479
480 if (mtip_hba_reset(port->dd))
481 dev_err(&port->dd->pdev->dev,
482 "HBA reset escalation failed.\n");
483
484 /* 30 ms delay before com reset to quiesce chip */
485 mdelay(30);
486 }
487
488 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
489
490 /* Set PxSCTL.DET */
491 writel(readl(port->mmio + PORT_SCR_CTL) |
492 1, port->mmio + PORT_SCR_CTL);
493 readl(port->mmio + PORT_SCR_CTL);
494
495 /* Wait 1 ms to quiesce chip function */
496 timeout = jiffies + msecs_to_jiffies(1);
497 while (time_before(jiffies, timeout))
498 ;
499
500 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
501 return;
502
503 /* Clear PxSCTL.DET */
504 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
505 port->mmio + PORT_SCR_CTL);
506 readl(port->mmio + PORT_SCR_CTL);
507
508 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
509 timeout = jiffies + msecs_to_jiffies(500);
510 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
511 && time_before(jiffies, timeout))
512 ;
513
514 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
515 return;
516
517 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
518 dev_warn(&port->dd->pdev->dev,
519 "COM reset failed\n");
520
521 mtip_init_port(port);
522 mtip_start_port(port);
523
524 }
525
526 static int mtip_device_reset(struct driver_data *dd)
527 {
528 int rv = 0;
529
530 if (mtip_check_surprise_removal(dd->pdev))
531 return 0;
532
533 if (mtip_hba_reset(dd) < 0)
534 rv = -EFAULT;
535
536 mdelay(1);
537 mtip_init_port(dd->port);
538 mtip_start_port(dd->port);
539
540 /* Enable interrupts on the HBA. */
541 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
542 dd->mmio + HOST_CTL);
543 return rv;
544 }
545
546 /*
547 * Helper function for tag logging
548 */
549 static void print_tags(struct driver_data *dd,
550 char *msg,
551 unsigned long *tagbits,
552 int cnt)
553 {
554 unsigned char tagmap[128];
555 int group, tagmap_len = 0;
556
557 memset(tagmap, 0, sizeof(tagmap));
558 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
559 tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ",
560 tagbits[group-1]);
561 dev_warn(&dd->pdev->dev,
562 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
563 }
564
565 /*
566 * Called periodically to see if any read/write commands are
567 * taking too long to complete.
568 *
569 * @data Pointer to the PORT data structure.
570 *
571 * return value
572 * None
573 */
574 static void mtip_timeout_function(unsigned long int data)
575 {
576 struct mtip_port *port = (struct mtip_port *) data;
577 struct host_to_dev_fis *fis;
578 struct mtip_cmd *command;
579 int tag, cmdto_cnt = 0;
580 unsigned int bit, group;
581 unsigned int num_command_slots;
582 unsigned long to, tagaccum[SLOTBITS_IN_LONGS];
583
584 if (unlikely(!port))
585 return;
586
587 if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) {
588 mod_timer(&port->cmd_timer,
589 jiffies + msecs_to_jiffies(30000));
590 return;
591 }
592 /* clear the tag accumulator */
593 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
594 num_command_slots = port->dd->slot_groups * 32;
595
596 for (tag = 0; tag < num_command_slots; tag++) {
597 /*
598 * Skip internal command slot as it has
599 * its own timeout mechanism
600 */
601 if (tag == MTIP_TAG_INTERNAL)
602 continue;
603
604 if (atomic_read(&port->commands[tag].active) &&
605 (time_after(jiffies, port->commands[tag].comp_time))) {
606 group = tag >> 5;
607 bit = tag & 0x1F;
608
609 command = &port->commands[tag];
610 fis = (struct host_to_dev_fis *) command->command;
611
612 set_bit(tag, tagaccum);
613 cmdto_cnt++;
614 if (cmdto_cnt == 1)
615 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
616
617 /*
618 * Clear the completed bit. This should prevent
619 * any interrupt handlers from trying to retire
620 * the command.
621 */
622 writel(1 << bit, port->completed[group]);
623
624 /* Call the async completion callback. */
625 if (likely(command->async_callback))
626 command->async_callback(command->async_data,
627 -EIO);
628 command->async_callback = NULL;
629 command->comp_func = NULL;
630
631 /* Unmap the DMA scatter list entries */
632 dma_unmap_sg(&port->dd->pdev->dev,
633 command->sg,
634 command->scatter_ents,
635 command->direction);
636
637 /*
638 * Clear the allocated bit and active tag for the
639 * command.
640 */
641 atomic_set(&port->commands[tag].active, 0);
642 release_slot(port, tag);
643
644 up(&port->cmd_slot);
645 }
646 }
647
648 if (cmdto_cnt) {
649 print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
650 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
651 mtip_device_reset(port->dd);
652 wake_up_interruptible(&port->svc_wait);
653 }
654 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
655 }
656
657 if (port->ic_pause_timer) {
658 to = port->ic_pause_timer + msecs_to_jiffies(1000);
659 if (time_after(jiffies, to)) {
660 if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
661 port->ic_pause_timer = 0;
662 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
663 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
664 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
665 wake_up_interruptible(&port->svc_wait);
666 }
667
668
669 }
670 }
671
672 /* Restart the timer */
673 mod_timer(&port->cmd_timer,
674 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
675 }
676
677 /*
678 * IO completion function.
679 *
680 * This completion function is called by the driver ISR when a
681 * command that was issued by the kernel completes. It first calls the
682 * asynchronous completion function which normally calls back into the block
683 * layer passing the asynchronous callback data, then unmaps the
684 * scatter list associated with the completed command, and finally
685 * clears the allocated bit associated with the completed command.
686 *
687 * @port Pointer to the port data structure.
688 * @tag Tag of the command.
689 * @data Pointer to driver_data.
690 * @status Completion status.
691 *
692 * return value
693 * None
694 */
695 static void mtip_async_complete(struct mtip_port *port,
696 int tag,
697 void *data,
698 int status)
699 {
700 struct mtip_cmd *command;
701 struct driver_data *dd = data;
702 int cb_status = status ? -EIO : 0;
703
704 if (unlikely(!dd) || unlikely(!port))
705 return;
706
707 command = &port->commands[tag];
708
709 if (unlikely(status == PORT_IRQ_TF_ERR)) {
710 dev_warn(&port->dd->pdev->dev,
711 "Command tag %d failed due to TFE\n", tag);
712 }
713
714 /* Upper layer callback */
715 if (likely(command->async_callback))
716 command->async_callback(command->async_data, cb_status);
717
718 command->async_callback = NULL;
719 command->comp_func = NULL;
720
721 /* Unmap the DMA scatter list entries */
722 dma_unmap_sg(&dd->pdev->dev,
723 command->sg,
724 command->scatter_ents,
725 command->direction);
726
727 /* Clear the allocated and active bits for the command */
728 atomic_set(&port->commands[tag].active, 0);
729 release_slot(port, tag);
730
731 up(&port->cmd_slot);
732 }
733
734 /*
735 * Internal command completion callback function.
736 *
737 * This function is normally called by the driver ISR when an internal
738 * command completed. This function signals the command completion by
739 * calling complete().
740 *
741 * @port Pointer to the port data structure.
742 * @tag Tag of the command that has completed.
743 * @data Pointer to a completion structure.
744 * @status Completion status.
745 *
746 * return value
747 * None
748 */
749 static void mtip_completion(struct mtip_port *port,
750 int tag,
751 void *data,
752 int status)
753 {
754 struct mtip_cmd *command = &port->commands[tag];
755 struct completion *waiting = data;
756 if (unlikely(status == PORT_IRQ_TF_ERR))
757 dev_warn(&port->dd->pdev->dev,
758 "Internal command %d completed with TFE\n", tag);
759
760 command->async_callback = NULL;
761 command->comp_func = NULL;
762
763 complete(waiting);
764 }
765
766 static void mtip_null_completion(struct mtip_port *port,
767 int tag,
768 void *data,
769 int status)
770 {
771 return;
772 }
773
774 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
775 dma_addr_t buffer_dma, unsigned int sectors);
776 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
777 struct smart_attr *attrib);
778 /*
779 * Handle an error.
780 *
781 * @dd Pointer to the DRIVER_DATA structure.
782 *
783 * return value
784 * None
785 */
786 static void mtip_handle_tfe(struct driver_data *dd)
787 {
788 int group, tag, bit, reissue, rv;
789 struct mtip_port *port;
790 struct mtip_cmd *cmd;
791 u32 completed;
792 struct host_to_dev_fis *fis;
793 unsigned long tagaccum[SLOTBITS_IN_LONGS];
794 unsigned int cmd_cnt = 0;
795 unsigned char *buf;
796 char *fail_reason = NULL;
797 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
798
799 dev_warn(&dd->pdev->dev, "Taskfile error\n");
800
801 port = dd->port;
802
803 /* Stop the timer to prevent command timeouts. */
804 del_timer(&port->cmd_timer);
805 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
806
807 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
808 test_bit(MTIP_TAG_INTERNAL, port->allocated)) {
809 cmd = &port->commands[MTIP_TAG_INTERNAL];
810 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
811
812 atomic_inc(&cmd->active); /* active > 1 indicates error */
813 if (cmd->comp_data && cmd->comp_func) {
814 cmd->comp_func(port, MTIP_TAG_INTERNAL,
815 cmd->comp_data, PORT_IRQ_TF_ERR);
816 }
817 goto handle_tfe_exit;
818 }
819
820 /* clear the tag accumulator */
821 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
822
823 /* Loop through all the groups */
824 for (group = 0; group < dd->slot_groups; group++) {
825 completed = readl(port->completed[group]);
826
827 /* clear completed status register in the hardware.*/
828 writel(completed, port->completed[group]);
829
830 /* Process successfully completed commands */
831 for (bit = 0; bit < 32 && completed; bit++) {
832 if (!(completed & (1<<bit)))
833 continue;
834 tag = (group << 5) + bit;
835
836 /* Skip the internal command slot */
837 if (tag == MTIP_TAG_INTERNAL)
838 continue;
839
840 cmd = &port->commands[tag];
841 if (likely(cmd->comp_func)) {
842 set_bit(tag, tagaccum);
843 cmd_cnt++;
844 atomic_set(&cmd->active, 0);
845 cmd->comp_func(port,
846 tag,
847 cmd->comp_data,
848 0);
849 } else {
850 dev_err(&port->dd->pdev->dev,
851 "Missing completion func for tag %d",
852 tag);
853 if (mtip_check_surprise_removal(dd->pdev)) {
854 mtip_command_cleanup(dd);
855 /* don't proceed further */
856 return;
857 }
858 }
859 }
860 }
861
862 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
863
864 /* Restart the port */
865 mdelay(20);
866 mtip_restart_port(port);
867
868 /* Trying to determine the cause of the error */
869 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
870 dd->port->log_buf,
871 dd->port->log_buf_dma, 1);
872 if (rv) {
873 dev_warn(&dd->pdev->dev,
874 "Error in READ LOG EXT (10h) command\n");
875 /* non-critical error, don't fail the load */
876 } else {
877 buf = (unsigned char *)dd->port->log_buf;
878 if (buf[259] & 0x1) {
879 dev_info(&dd->pdev->dev,
880 "Write protect bit is set.\n");
881 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
882 fail_all_ncq_write = 1;
883 fail_reason = "write protect";
884 }
885 if (buf[288] == 0xF7) {
886 dev_info(&dd->pdev->dev,
887 "Exceeded Tmax, drive in thermal shutdown.\n");
888 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
889 fail_all_ncq_cmds = 1;
890 fail_reason = "thermal shutdown";
891 }
892 if (buf[288] == 0xBF) {
893 dev_info(&dd->pdev->dev,
894 "Drive indicates rebuild has failed.\n");
895 fail_all_ncq_cmds = 1;
896 fail_reason = "rebuild failed";
897 }
898 }
899
900 /* clear the tag accumulator */
901 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
902
903 /* Loop through all the groups */
904 for (group = 0; group < dd->slot_groups; group++) {
905 for (bit = 0; bit < 32; bit++) {
906 reissue = 1;
907 tag = (group << 5) + bit;
908 cmd = &port->commands[tag];
909
910 /* If the active bit is set re-issue the command */
911 if (atomic_read(&cmd->active) == 0)
912 continue;
913
914 fis = (struct host_to_dev_fis *)cmd->command;
915
916 /* Should re-issue? */
917 if (tag == MTIP_TAG_INTERNAL ||
918 fis->command == ATA_CMD_SET_FEATURES)
919 reissue = 0;
920 else {
921 if (fail_all_ncq_cmds ||
922 (fail_all_ncq_write &&
923 fis->command == ATA_CMD_FPDMA_WRITE)) {
924 dev_warn(&dd->pdev->dev,
925 " Fail: %s w/tag %d [%s].\n",
926 fis->command == ATA_CMD_FPDMA_WRITE ?
927 "write" : "read",
928 tag,
929 fail_reason != NULL ?
930 fail_reason : "unknown");
931 atomic_set(&cmd->active, 0);
932 if (cmd->comp_func) {
933 cmd->comp_func(port, tag,
934 cmd->comp_data,
935 -ENODATA);
936 }
937 continue;
938 }
939 }
940
941 /*
942 * First check if this command has
943 * exceeded its retries.
944 */
945 if (reissue && (cmd->retries-- > 0)) {
946
947 set_bit(tag, tagaccum);
948
949 /* Re-issue the command. */
950 mtip_issue_ncq_command(port, tag);
951
952 continue;
953 }
954
955 /* Retire a command that will not be reissued */
956 dev_warn(&port->dd->pdev->dev,
957 "retiring tag %d\n", tag);
958 atomic_set(&cmd->active, 0);
959
960 if (cmd->comp_func)
961 cmd->comp_func(
962 port,
963 tag,
964 cmd->comp_data,
965 PORT_IRQ_TF_ERR);
966 else
967 dev_warn(&port->dd->pdev->dev,
968 "Bad completion for tag %d\n",
969 tag);
970 }
971 }
972 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
973
974 handle_tfe_exit:
975 /* clear eh_active */
976 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
977 wake_up_interruptible(&port->svc_wait);
978
979 mod_timer(&port->cmd_timer,
980 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
981 }
982
983 /*
984 * Handle a set device bits interrupt
985 */
986 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
987 u32 completed)
988 {
989 struct driver_data *dd = port->dd;
990 int tag, bit;
991 struct mtip_cmd *command;
992
993 if (!completed) {
994 WARN_ON_ONCE(!completed);
995 return;
996 }
997 /* clear completed status register in the hardware.*/
998 writel(completed, port->completed[group]);
999
1000 /* Process completed commands. */
1001 for (bit = 0; (bit < 32) && completed; bit++) {
1002 if (completed & 0x01) {
1003 tag = (group << 5) | bit;
1004
1005 /* skip internal command slot. */
1006 if (unlikely(tag == MTIP_TAG_INTERNAL))
1007 continue;
1008
1009 command = &port->commands[tag];
1010 /* make internal callback */
1011 if (likely(command->comp_func)) {
1012 command->comp_func(
1013 port,
1014 tag,
1015 command->comp_data,
1016 0);
1017 } else {
1018 dev_warn(&dd->pdev->dev,
1019 "Null completion "
1020 "for tag %d",
1021 tag);
1022
1023 if (mtip_check_surprise_removal(
1024 dd->pdev)) {
1025 mtip_command_cleanup(dd);
1026 return;
1027 }
1028 }
1029 }
1030 completed >>= 1;
1031 }
1032
1033 /* If last, re-enable interrupts */
1034 if (atomic_dec_return(&dd->irq_workers_active) == 0)
1035 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
1036 }
1037
1038 /*
1039 * Process legacy pio and d2h interrupts
1040 */
1041 static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
1042 {
1043 struct mtip_port *port = dd->port;
1044 struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL];
1045
1046 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
1047 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1048 & (1 << MTIP_TAG_INTERNAL))) {
1049 if (cmd->comp_func) {
1050 cmd->comp_func(port,
1051 MTIP_TAG_INTERNAL,
1052 cmd->comp_data,
1053 0);
1054 return;
1055 }
1056 }
1057
1058 return;
1059 }
1060
1061 /*
1062 * Demux and handle errors
1063 */
1064 static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
1065 {
1066 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR)))
1067 mtip_handle_tfe(dd);
1068
1069 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
1070 dev_warn(&dd->pdev->dev,
1071 "Clearing PxSERR.DIAG.x\n");
1072 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
1073 }
1074
1075 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
1076 dev_warn(&dd->pdev->dev,
1077 "Clearing PxSERR.DIAG.n\n");
1078 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
1079 }
1080
1081 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
1082 dev_warn(&dd->pdev->dev,
1083 "Port stat errors %x unhandled\n",
1084 (port_stat & ~PORT_IRQ_HANDLED));
1085 }
1086 }
1087
1088 static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
1089 {
1090 struct driver_data *dd = (struct driver_data *) data;
1091 struct mtip_port *port = dd->port;
1092 u32 hba_stat, port_stat;
1093 int rv = IRQ_NONE;
1094 int do_irq_enable = 1, i, workers;
1095 struct mtip_work *twork;
1096
1097 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1098 if (hba_stat) {
1099 rv = IRQ_HANDLED;
1100
1101 /* Acknowledge the interrupt status on the port.*/
1102 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1103 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1104
1105 /* Demux port status */
1106 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
1107 do_irq_enable = 0;
1108 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
1109
1110 /* Start at 1: group zero is always local? */
1111 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
1112 i++) {
1113 twork = &dd->work[i];
1114 twork->completed = readl(port->completed[i]);
1115 if (twork->completed)
1116 workers++;
1117 }
1118
1119 atomic_set(&dd->irq_workers_active, workers);
1120 if (workers) {
1121 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
1122 twork = &dd->work[i];
1123 if (twork->completed)
1124 queue_work_on(
1125 twork->cpu_binding,
1126 dd->isr_workq,
1127 &twork->work);
1128 }
1129
1130 if (likely(dd->work[0].completed))
1131 mtip_workq_sdbfx(port, 0,
1132 dd->work[0].completed);
1133
1134 } else {
1135 /*
1136 * Chip quirk: SDB interrupt but nothing
1137 * to complete
1138 */
1139 do_irq_enable = 1;
1140 }
1141 }
1142
1143 if (unlikely(port_stat & PORT_IRQ_ERR)) {
1144 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
1145 mtip_command_cleanup(dd);
1146 /* don't proceed further */
1147 return IRQ_HANDLED;
1148 }
1149 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1150 &dd->dd_flag))
1151 return rv;
1152
1153 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
1154 }
1155
1156 if (unlikely(port_stat & PORT_IRQ_LEGACY))
1157 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
1158 }
1159
1160 /* acknowledge interrupt */
1161 if (unlikely(do_irq_enable))
1162 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
1163
1164 return rv;
1165 }
1166
1167 /*
1168 * HBA interrupt subroutine.
1169 *
1170 * @irq IRQ number.
1171 * @instance Pointer to the driver data structure.
1172 *
1173 * return value
1174 * IRQ_HANDLED A HBA interrupt was pending and handled.
1175 * IRQ_NONE This interrupt was not for the HBA.
1176 */
1177 static irqreturn_t mtip_irq_handler(int irq, void *instance)
1178 {
1179 struct driver_data *dd = instance;
1180
1181 return mtip_handle_irq(dd);
1182 }
1183
1184 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
1185 {
1186 atomic_set(&port->commands[tag].active, 1);
1187 writel(1 << MTIP_TAG_BIT(tag),
1188 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
1189 }
1190
1191 static bool mtip_pause_ncq(struct mtip_port *port,
1192 struct host_to_dev_fis *fis)
1193 {
1194 struct host_to_dev_fis *reply;
1195 unsigned long task_file_data;
1196
1197 reply = port->rxfis + RX_FIS_D2H_REG;
1198 task_file_data = readl(port->mmio+PORT_TFDATA);
1199
1200 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1201 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1202
1203 if ((task_file_data & 1))
1204 return false;
1205
1206 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1207 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1208 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1209 port->ic_pause_timer = jiffies;
1210 return true;
1211 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1212 (fis->features == 0x03)) {
1213 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1214 port->ic_pause_timer = jiffies;
1215 return true;
1216 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1217 ((fis->command == 0xFC) &&
1218 (fis->features == 0x27 || fis->features == 0x72 ||
1219 fis->features == 0x62 || fis->features == 0x26))) {
1220 /* Com reset after secure erase or lowlevel format */
1221 mtip_restart_port(port);
1222 return false;
1223 }
1224
1225 return false;
1226 }
1227
1228 /*
1229 * Wait for port to quiesce
1230 *
1231 * @port Pointer to port data structure
1232 * @timeout Max duration to wait (ms)
1233 *
1234 * return value
1235 * 0 Success
1236 * -EBUSY Commands still active
1237 */
1238 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1239 {
1240 unsigned long to;
1241 unsigned int n;
1242 unsigned int active = 1;
1243
1244 to = jiffies + msecs_to_jiffies(timeout);
1245 do {
1246 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1247 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1248 msleep(20);
1249 continue; /* svc thd is actively issuing commands */
1250 }
1251 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1252 return -EFAULT;
1253 /*
1254 * Ignore s_active bit 0 of array element 0.
1255 * This bit will always be set
1256 */
1257 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1258 for (n = 1; n < port->dd->slot_groups; n++)
1259 active |= readl(port->s_active[n]);
1260
1261 if (!active)
1262 break;
1263
1264 msleep(20);
1265 } while (time_before(jiffies, to));
1266
1267 return active ? -EBUSY : 0;
1268 }
1269
1270 /*
1271 * Execute an internal command and wait for the completion.
1272 *
1273 * @port Pointer to the port data structure.
1274 * @fis Pointer to the FIS that describes the command.
1275 * @fis_len Length in WORDS of the FIS.
1276 * @buffer DMA accessible for command data.
1277 * @buf_len Length, in bytes, of the data buffer.
1278 * @opts Command header options, excluding the FIS length
1279 * and the number of PRD entries.
1280 * @timeout Time in ms to wait for the command to complete.
1281 *
1282 * return value
1283 * 0 Command completed successfully.
1284 * -EFAULT The buffer address is not correctly aligned.
1285 * -EBUSY Internal command or other IO in progress.
1286 * -EAGAIN Time out waiting for command to complete.
1287 */
1288 static int mtip_exec_internal_command(struct mtip_port *port,
1289 struct host_to_dev_fis *fis,
1290 int fis_len,
1291 dma_addr_t buffer,
1292 int buf_len,
1293 u32 opts,
1294 gfp_t atomic,
1295 unsigned long timeout)
1296 {
1297 struct mtip_cmd_sg *command_sg;
1298 DECLARE_COMPLETION_ONSTACK(wait);
1299 int rv = 0, ready2go = 1;
1300 struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1301 unsigned long to;
1302 struct driver_data *dd = port->dd;
1303
1304 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1305 if (buffer & 0x00000007) {
1306 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1307 return -EFAULT;
1308 }
1309
1310 to = jiffies + msecs_to_jiffies(timeout);
1311 do {
1312 ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL,
1313 port->allocated);
1314 if (ready2go)
1315 break;
1316 mdelay(100);
1317 } while (time_before(jiffies, to));
1318 if (!ready2go) {
1319 dev_warn(&dd->pdev->dev,
1320 "Internal cmd active. new cmd [%02X]\n", fis->command);
1321 return -EBUSY;
1322 }
1323 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1324 port->ic_pause_timer = 0;
1325
1326 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1327 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1328
1329 if (atomic == GFP_KERNEL) {
1330 if (fis->command != ATA_CMD_STANDBYNOW1) {
1331 /* wait for io to complete if non atomic */
1332 if (mtip_quiesce_io(port, 5000) < 0) {
1333 dev_warn(&dd->pdev->dev,
1334 "Failed to quiesce IO\n");
1335 release_slot(port, MTIP_TAG_INTERNAL);
1336 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1337 wake_up_interruptible(&port->svc_wait);
1338 return -EBUSY;
1339 }
1340 }
1341
1342 /* Set the completion function and data for the command. */
1343 int_cmd->comp_data = &wait;
1344 int_cmd->comp_func = mtip_completion;
1345
1346 } else {
1347 /* Clear completion - we're going to poll */
1348 int_cmd->comp_data = NULL;
1349 int_cmd->comp_func = mtip_null_completion;
1350 }
1351
1352 /* Copy the command to the command table */
1353 memcpy(int_cmd->command, fis, fis_len*4);
1354
1355 /* Populate the SG list */
1356 int_cmd->command_header->opts =
1357 __force_bit2int cpu_to_le32(opts | fis_len);
1358 if (buf_len) {
1359 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1360
1361 command_sg->info =
1362 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1363 command_sg->dba =
1364 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1365 command_sg->dba_upper =
1366 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
1367
1368 int_cmd->command_header->opts |=
1369 __force_bit2int cpu_to_le32((1 << 16));
1370 }
1371
1372 /* Populate the command header */
1373 int_cmd->command_header->byte_count = 0;
1374
1375 /* Issue the command to the hardware */
1376 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1377
1378 if (atomic == GFP_KERNEL) {
1379 /* Wait for the command to complete or timeout. */
1380 if (wait_for_completion_interruptible_timeout(
1381 &wait,
1382 msecs_to_jiffies(timeout)) <= 0) {
1383 if (rv == -ERESTARTSYS) { /* interrupted */
1384 dev_err(&dd->pdev->dev,
1385 "Internal command [%02X] was interrupted after %lu ms\n",
1386 fis->command, timeout);
1387 rv = -EINTR;
1388 goto exec_ic_exit;
1389 } else if (rv == 0) /* timeout */
1390 dev_err(&dd->pdev->dev,
1391 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1392 fis->command, timeout);
1393 else
1394 dev_err(&dd->pdev->dev,
1395 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1396 fis->command, rv, timeout);
1397
1398 if (mtip_check_surprise_removal(dd->pdev) ||
1399 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1400 &dd->dd_flag)) {
1401 dev_err(&dd->pdev->dev,
1402 "Internal command [%02X] wait returned due to SR\n",
1403 fis->command);
1404 rv = -ENXIO;
1405 goto exec_ic_exit;
1406 }
1407 mtip_device_reset(dd); /* recover from timeout issue */
1408 rv = -EAGAIN;
1409 goto exec_ic_exit;
1410 }
1411 } else {
1412 u32 hba_stat, port_stat;
1413
1414 /* Spin for <timeout> checking if command still outstanding */
1415 timeout = jiffies + msecs_to_jiffies(timeout);
1416 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1417 & (1 << MTIP_TAG_INTERNAL))
1418 && time_before(jiffies, timeout)) {
1419 if (mtip_check_surprise_removal(dd->pdev)) {
1420 rv = -ENXIO;
1421 goto exec_ic_exit;
1422 }
1423 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1424 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1425 &dd->dd_flag)) {
1426 rv = -ENXIO;
1427 goto exec_ic_exit;
1428 }
1429 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1430 if (!port_stat)
1431 continue;
1432
1433 if (port_stat & PORT_IRQ_ERR) {
1434 dev_err(&dd->pdev->dev,
1435 "Internal command [%02X] failed\n",
1436 fis->command);
1437 mtip_device_reset(dd);
1438 rv = -EIO;
1439 goto exec_ic_exit;
1440 } else {
1441 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1442 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1443 if (hba_stat)
1444 writel(hba_stat,
1445 dd->mmio + HOST_IRQ_STAT);
1446 }
1447 break;
1448 }
1449 }
1450
1451 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1452 & (1 << MTIP_TAG_INTERNAL)) {
1453 rv = -ENXIO;
1454 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1455 mtip_device_reset(dd);
1456 rv = -EAGAIN;
1457 }
1458 }
1459 exec_ic_exit:
1460 /* Clear the allocated and active bits for the internal command. */
1461 atomic_set(&int_cmd->active, 0);
1462 release_slot(port, MTIP_TAG_INTERNAL);
1463 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1464 /* NCQ paused */
1465 return rv;
1466 }
1467 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1468 wake_up_interruptible(&port->svc_wait);
1469
1470 return rv;
1471 }
1472
1473 /*
1474 * Byte-swap ATA ID strings.
1475 *
1476 * ATA identify data contains strings in byte-swapped 16-bit words.
1477 * They must be swapped (on all architectures) to be usable as C strings.
1478 * This function swaps bytes in-place.
1479 *
1480 * @buf The buffer location of the string
1481 * @len The number of bytes to swap
1482 *
1483 * return value
1484 * None
1485 */
1486 static inline void ata_swap_string(u16 *buf, unsigned int len)
1487 {
1488 int i;
1489 for (i = 0; i < (len/2); i++)
1490 be16_to_cpus(&buf[i]);
1491 }
1492
1493 /*
1494 * Request the device identity information.
1495 *
1496 * If a user space buffer is not specified, i.e. is NULL, the
1497 * identify information is still read from the drive and placed
1498 * into the identify data buffer (@e port->identify) in the
1499 * port data structure.
1500 * When the identify buffer contains valid identify information @e
1501 * port->identify_valid is non-zero.
1502 *
1503 * @port Pointer to the port structure.
1504 * @user_buffer A user space buffer where the identify data should be
1505 * copied.
1506 *
1507 * return value
1508 * 0 Command completed successfully.
1509 * -EFAULT An error occurred while coping data to the user buffer.
1510 * -1 Command failed.
1511 */
1512 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1513 {
1514 int rv = 0;
1515 struct host_to_dev_fis fis;
1516
1517 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1518 return -EFAULT;
1519
1520 /* Build the FIS. */
1521 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1522 fis.type = 0x27;
1523 fis.opts = 1 << 7;
1524 fis.command = ATA_CMD_ID_ATA;
1525
1526 /* Set the identify information as invalid. */
1527 port->identify_valid = 0;
1528
1529 /* Clear the identify information. */
1530 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1531
1532 /* Execute the command. */
1533 if (mtip_exec_internal_command(port,
1534 &fis,
1535 5,
1536 port->identify_dma,
1537 sizeof(u16) * ATA_ID_WORDS,
1538 0,
1539 GFP_KERNEL,
1540 MTIP_INTERNAL_COMMAND_TIMEOUT_MS)
1541 < 0) {
1542 rv = -1;
1543 goto out;
1544 }
1545
1546 /*
1547 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1548 * perform field-sensitive swapping on the string fields.
1549 * See the kernel use of ata_id_string() for proof of this.
1550 */
1551 #ifdef __LITTLE_ENDIAN
1552 ata_swap_string(port->identify + 27, 40); /* model string*/
1553 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1554 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1555 #else
1556 {
1557 int i;
1558 for (i = 0; i < ATA_ID_WORDS; i++)
1559 port->identify[i] = le16_to_cpu(port->identify[i]);
1560 }
1561 #endif
1562
1563 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1564 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1565 port->dd->trim_supp = true;
1566 else
1567 port->dd->trim_supp = false;
1568
1569 /* Set the identify buffer as valid. */
1570 port->identify_valid = 1;
1571
1572 if (user_buffer) {
1573 if (copy_to_user(
1574 user_buffer,
1575 port->identify,
1576 ATA_ID_WORDS * sizeof(u16))) {
1577 rv = -EFAULT;
1578 goto out;
1579 }
1580 }
1581
1582 out:
1583 return rv;
1584 }
1585
1586 /*
1587 * Issue a standby immediate command to the device.
1588 *
1589 * @port Pointer to the port structure.
1590 *
1591 * return value
1592 * 0 Command was executed successfully.
1593 * -1 An error occurred while executing the command.
1594 */
1595 static int mtip_standby_immediate(struct mtip_port *port)
1596 {
1597 int rv;
1598 struct host_to_dev_fis fis;
1599 unsigned long start;
1600
1601 /* Build the FIS. */
1602 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1603 fis.type = 0x27;
1604 fis.opts = 1 << 7;
1605 fis.command = ATA_CMD_STANDBYNOW1;
1606
1607 start = jiffies;
1608 rv = mtip_exec_internal_command(port,
1609 &fis,
1610 5,
1611 0,
1612 0,
1613 0,
1614 GFP_ATOMIC,
1615 15000);
1616 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1617 jiffies_to_msecs(jiffies - start));
1618 if (rv)
1619 dev_warn(&port->dd->pdev->dev,
1620 "STANDBY IMMEDIATE command failed.\n");
1621
1622 return rv;
1623 }
1624
1625 /*
1626 * Issue a READ LOG EXT command to the device.
1627 *
1628 * @port pointer to the port structure.
1629 * @page page number to fetch
1630 * @buffer pointer to buffer
1631 * @buffer_dma dma address corresponding to @buffer
1632 * @sectors page length to fetch, in sectors
1633 *
1634 * return value
1635 * @rv return value from mtip_exec_internal_command()
1636 */
1637 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1638 dma_addr_t buffer_dma, unsigned int sectors)
1639 {
1640 struct host_to_dev_fis fis;
1641
1642 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1643 fis.type = 0x27;
1644 fis.opts = 1 << 7;
1645 fis.command = ATA_CMD_READ_LOG_EXT;
1646 fis.sect_count = sectors & 0xFF;
1647 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1648 fis.lba_low = page;
1649 fis.lba_mid = 0;
1650 fis.device = ATA_DEVICE_OBS;
1651
1652 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1653
1654 return mtip_exec_internal_command(port,
1655 &fis,
1656 5,
1657 buffer_dma,
1658 sectors * ATA_SECT_SIZE,
1659 0,
1660 GFP_ATOMIC,
1661 MTIP_INTERNAL_COMMAND_TIMEOUT_MS);
1662 }
1663
1664 /*
1665 * Issue a SMART READ DATA command to the device.
1666 *
1667 * @port pointer to the port structure.
1668 * @buffer pointer to buffer
1669 * @buffer_dma dma address corresponding to @buffer
1670 *
1671 * return value
1672 * @rv return value from mtip_exec_internal_command()
1673 */
1674 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1675 dma_addr_t buffer_dma)
1676 {
1677 struct host_to_dev_fis fis;
1678
1679 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1680 fis.type = 0x27;
1681 fis.opts = 1 << 7;
1682 fis.command = ATA_CMD_SMART;
1683 fis.features = 0xD0;
1684 fis.sect_count = 1;
1685 fis.lba_mid = 0x4F;
1686 fis.lba_hi = 0xC2;
1687 fis.device = ATA_DEVICE_OBS;
1688
1689 return mtip_exec_internal_command(port,
1690 &fis,
1691 5,
1692 buffer_dma,
1693 ATA_SECT_SIZE,
1694 0,
1695 GFP_ATOMIC,
1696 15000);
1697 }
1698
1699 /*
1700 * Get the value of a smart attribute
1701 *
1702 * @port pointer to the port structure
1703 * @id attribute number
1704 * @attrib pointer to return attrib information corresponding to @id
1705 *
1706 * return value
1707 * -EINVAL NULL buffer passed or unsupported attribute @id.
1708 * -EPERM Identify data not valid, SMART not supported or not enabled
1709 */
1710 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1711 struct smart_attr *attrib)
1712 {
1713 int rv, i;
1714 struct smart_attr *pattr;
1715
1716 if (!attrib)
1717 return -EINVAL;
1718
1719 if (!port->identify_valid) {
1720 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1721 return -EPERM;
1722 }
1723 if (!(port->identify[82] & 0x1)) {
1724 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1725 return -EPERM;
1726 }
1727 if (!(port->identify[85] & 0x1)) {
1728 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1729 return -EPERM;
1730 }
1731
1732 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1733 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1734 if (rv) {
1735 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1736 return rv;
1737 }
1738
1739 pattr = (struct smart_attr *)(port->smart_buf + 2);
1740 for (i = 0; i < 29; i++, pattr++)
1741 if (pattr->attr_id == id) {
1742 memcpy(attrib, pattr, sizeof(struct smart_attr));
1743 break;
1744 }
1745
1746 if (i == 29) {
1747 dev_warn(&port->dd->pdev->dev,
1748 "Query for invalid SMART attribute ID\n");
1749 rv = -EINVAL;
1750 }
1751
1752 return rv;
1753 }
1754
1755 /*
1756 * Trim unused sectors
1757 *
1758 * @dd pointer to driver_data structure
1759 * @lba starting lba
1760 * @len # of 512b sectors to trim
1761 *
1762 * return value
1763 * -ENOMEM Out of dma memory
1764 * -EINVAL Invalid parameters passed in, trim not supported
1765 * -EIO Error submitting trim request to hw
1766 */
1767 static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1768 unsigned int len)
1769 {
1770 int i, rv = 0;
1771 u64 tlba, tlen, sect_left;
1772 struct mtip_trim_entry *buf;
1773 dma_addr_t dma_addr;
1774 struct host_to_dev_fis fis;
1775
1776 if (!len || dd->trim_supp == false)
1777 return -EINVAL;
1778
1779 /* Trim request too big */
1780 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1781
1782 /* Trim request not aligned on 4k boundary */
1783 WARN_ON(len % 8 != 0);
1784
1785 /* Warn if vu_trim structure is too big */
1786 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1787
1788 /* Allocate a DMA buffer for the trim structure */
1789 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1790 GFP_KERNEL);
1791 if (!buf)
1792 return -ENOMEM;
1793 memset(buf, 0, ATA_SECT_SIZE);
1794
1795 for (i = 0, sect_left = len, tlba = lba;
1796 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1797 i++) {
1798 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1799 MTIP_MAX_TRIM_ENTRY_LEN :
1800 sect_left);
1801 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1802 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1803 tlba += tlen;
1804 sect_left -= tlen;
1805 }
1806 WARN_ON(sect_left != 0);
1807
1808 /* Build the fis */
1809 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1810 fis.type = 0x27;
1811 fis.opts = 1 << 7;
1812 fis.command = 0xfb;
1813 fis.features = 0x60;
1814 fis.sect_count = 1;
1815 fis.device = ATA_DEVICE_OBS;
1816
1817 if (mtip_exec_internal_command(dd->port,
1818 &fis,
1819 5,
1820 dma_addr,
1821 ATA_SECT_SIZE,
1822 0,
1823 GFP_KERNEL,
1824 MTIP_TRIM_TIMEOUT_MS) < 0)
1825 rv = -EIO;
1826
1827 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1828 return rv;
1829 }
1830
1831 /*
1832 * Get the drive capacity.
1833 *
1834 * @dd Pointer to the device data structure.
1835 * @sectors Pointer to the variable that will receive the sector count.
1836 *
1837 * return value
1838 * 1 Capacity was returned successfully.
1839 * 0 The identify information is invalid.
1840 */
1841 static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
1842 {
1843 struct mtip_port *port = dd->port;
1844 u64 total, raw0, raw1, raw2, raw3;
1845 raw0 = port->identify[100];
1846 raw1 = port->identify[101];
1847 raw2 = port->identify[102];
1848 raw3 = port->identify[103];
1849 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1850 *sectors = total;
1851 return (bool) !!port->identify_valid;
1852 }
1853
1854 /*
1855 * Display the identify command data.
1856 *
1857 * @port Pointer to the port data structure.
1858 *
1859 * return value
1860 * None
1861 */
1862 static void mtip_dump_identify(struct mtip_port *port)
1863 {
1864 sector_t sectors;
1865 unsigned short revid;
1866 char cbuf[42];
1867
1868 if (!port->identify_valid)
1869 return;
1870
1871 strlcpy(cbuf, (char *)(port->identify+10), 21);
1872 dev_info(&port->dd->pdev->dev,
1873 "Serial No.: %s\n", cbuf);
1874
1875 strlcpy(cbuf, (char *)(port->identify+23), 9);
1876 dev_info(&port->dd->pdev->dev,
1877 "Firmware Ver.: %s\n", cbuf);
1878
1879 strlcpy(cbuf, (char *)(port->identify+27), 41);
1880 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1881
1882 if (mtip_hw_get_capacity(port->dd, &sectors))
1883 dev_info(&port->dd->pdev->dev,
1884 "Capacity: %llu sectors (%llu MB)\n",
1885 (u64)sectors,
1886 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1887
1888 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1889 switch (revid & 0xFF) {
1890 case 0x1:
1891 strlcpy(cbuf, "A0", 3);
1892 break;
1893 case 0x3:
1894 strlcpy(cbuf, "A2", 3);
1895 break;
1896 default:
1897 strlcpy(cbuf, "?", 2);
1898 break;
1899 }
1900 dev_info(&port->dd->pdev->dev,
1901 "Card Type: %s\n", cbuf);
1902 }
1903
1904 /*
1905 * Map the commands scatter list into the command table.
1906 *
1907 * @command Pointer to the command.
1908 * @nents Number of scatter list entries.
1909 *
1910 * return value
1911 * None
1912 */
1913 static inline void fill_command_sg(struct driver_data *dd,
1914 struct mtip_cmd *command,
1915 int nents)
1916 {
1917 int n;
1918 unsigned int dma_len;
1919 struct mtip_cmd_sg *command_sg;
1920 struct scatterlist *sg = command->sg;
1921
1922 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1923
1924 for (n = 0; n < nents; n++) {
1925 dma_len = sg_dma_len(sg);
1926 if (dma_len > 0x400000)
1927 dev_err(&dd->pdev->dev,
1928 "DMA segment length truncated\n");
1929 command_sg->info = __force_bit2int
1930 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1931 command_sg->dba = __force_bit2int
1932 cpu_to_le32(sg_dma_address(sg));
1933 command_sg->dba_upper = __force_bit2int
1934 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
1935 command_sg++;
1936 sg++;
1937 }
1938 }
1939
1940 /*
1941 * @brief Execute a drive command.
1942 *
1943 * return value 0 The command completed successfully.
1944 * return value -1 An error occurred while executing the command.
1945 */
1946 static int exec_drive_task(struct mtip_port *port, u8 *command)
1947 {
1948 struct host_to_dev_fis fis;
1949 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1950
1951 /* Build the FIS. */
1952 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1953 fis.type = 0x27;
1954 fis.opts = 1 << 7;
1955 fis.command = command[0];
1956 fis.features = command[1];
1957 fis.sect_count = command[2];
1958 fis.sector = command[3];
1959 fis.cyl_low = command[4];
1960 fis.cyl_hi = command[5];
1961 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1962
1963 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
1964 __func__,
1965 command[0],
1966 command[1],
1967 command[2],
1968 command[3],
1969 command[4],
1970 command[5],
1971 command[6]);
1972
1973 /* Execute the command. */
1974 if (mtip_exec_internal_command(port,
1975 &fis,
1976 5,
1977 0,
1978 0,
1979 0,
1980 GFP_KERNEL,
1981 MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) {
1982 return -1;
1983 }
1984
1985 command[0] = reply->command; /* Status*/
1986 command[1] = reply->features; /* Error*/
1987 command[4] = reply->cyl_low;
1988 command[5] = reply->cyl_hi;
1989
1990 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
1991 __func__,
1992 command[0],
1993 command[1],
1994 command[4],
1995 command[5]);
1996
1997 return 0;
1998 }
1999
2000 /*
2001 * @brief Execute a drive command.
2002 *
2003 * @param port Pointer to the port data structure.
2004 * @param command Pointer to the user specified command parameters.
2005 * @param user_buffer Pointer to the user space buffer where read sector
2006 * data should be copied.
2007 *
2008 * return value 0 The command completed successfully.
2009 * return value -EFAULT An error occurred while copying the completion
2010 * data to the user space buffer.
2011 * return value -1 An error occurred while executing the command.
2012 */
2013 static int exec_drive_command(struct mtip_port *port, u8 *command,
2014 void __user *user_buffer)
2015 {
2016 struct host_to_dev_fis fis;
2017 struct host_to_dev_fis *reply;
2018 u8 *buf = NULL;
2019 dma_addr_t dma_addr = 0;
2020 int rv = 0, xfer_sz = command[3];
2021
2022 if (xfer_sz) {
2023 if (!user_buffer)
2024 return -EFAULT;
2025
2026 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
2027 ATA_SECT_SIZE * xfer_sz,
2028 &dma_addr,
2029 GFP_KERNEL);
2030 if (!buf) {
2031 dev_err(&port->dd->pdev->dev,
2032 "Memory allocation failed (%d bytes)\n",
2033 ATA_SECT_SIZE * xfer_sz);
2034 return -ENOMEM;
2035 }
2036 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
2037 }
2038
2039 /* Build the FIS. */
2040 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2041 fis.type = 0x27;
2042 fis.opts = 1 << 7;
2043 fis.command = command[0];
2044 fis.features = command[2];
2045 fis.sect_count = command[3];
2046 if (fis.command == ATA_CMD_SMART) {
2047 fis.sector = command[1];
2048 fis.cyl_low = 0x4F;
2049 fis.cyl_hi = 0xC2;
2050 }
2051
2052 if (xfer_sz)
2053 reply = (port->rxfis + RX_FIS_PIO_SETUP);
2054 else
2055 reply = (port->rxfis + RX_FIS_D2H_REG);
2056
2057 dbg_printk(MTIP_DRV_NAME
2058 " %s: User Command: cmd %x, sect %x, "
2059 "feat %x, sectcnt %x\n",
2060 __func__,
2061 command[0],
2062 command[1],
2063 command[2],
2064 command[3]);
2065
2066 /* Execute the command. */
2067 if (mtip_exec_internal_command(port,
2068 &fis,
2069 5,
2070 (xfer_sz ? dma_addr : 0),
2071 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
2072 0,
2073 GFP_KERNEL,
2074 MTIP_IOCTL_COMMAND_TIMEOUT_MS)
2075 < 0) {
2076 rv = -EFAULT;
2077 goto exit_drive_command;
2078 }
2079
2080 /* Collect the completion status. */
2081 command[0] = reply->command; /* Status*/
2082 command[1] = reply->features; /* Error*/
2083 command[2] = reply->sect_count;
2084
2085 dbg_printk(MTIP_DRV_NAME
2086 " %s: Completion Status: stat %x, "
2087 "err %x, nsect %x\n",
2088 __func__,
2089 command[0],
2090 command[1],
2091 command[2]);
2092
2093 if (xfer_sz) {
2094 if (copy_to_user(user_buffer,
2095 buf,
2096 ATA_SECT_SIZE * command[3])) {
2097 rv = -EFAULT;
2098 goto exit_drive_command;
2099 }
2100 }
2101 exit_drive_command:
2102 if (buf)
2103 dmam_free_coherent(&port->dd->pdev->dev,
2104 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
2105 return rv;
2106 }
2107
2108 /*
2109 * Indicates whether a command has a single sector payload.
2110 *
2111 * @command passed to the device to perform the certain event.
2112 * @features passed to the device to perform the certain event.
2113 *
2114 * return value
2115 * 1 command is one that always has a single sector payload,
2116 * regardless of the value in the Sector Count field.
2117 * 0 otherwise
2118 *
2119 */
2120 static unsigned int implicit_sector(unsigned char command,
2121 unsigned char features)
2122 {
2123 unsigned int rv = 0;
2124
2125 /* list of commands that have an implicit sector count of 1 */
2126 switch (command) {
2127 case ATA_CMD_SEC_SET_PASS:
2128 case ATA_CMD_SEC_UNLOCK:
2129 case ATA_CMD_SEC_ERASE_PREP:
2130 case ATA_CMD_SEC_ERASE_UNIT:
2131 case ATA_CMD_SEC_FREEZE_LOCK:
2132 case ATA_CMD_SEC_DISABLE_PASS:
2133 case ATA_CMD_PMP_READ:
2134 case ATA_CMD_PMP_WRITE:
2135 rv = 1;
2136 break;
2137 case ATA_CMD_SET_MAX:
2138 if (features == ATA_SET_MAX_UNLOCK)
2139 rv = 1;
2140 break;
2141 case ATA_CMD_SMART:
2142 if ((features == ATA_SMART_READ_VALUES) ||
2143 (features == ATA_SMART_READ_THRESHOLDS))
2144 rv = 1;
2145 break;
2146 case ATA_CMD_CONF_OVERLAY:
2147 if ((features == ATA_DCO_IDENTIFY) ||
2148 (features == ATA_DCO_SET))
2149 rv = 1;
2150 break;
2151 }
2152 return rv;
2153 }
2154 static void mtip_set_timeout(struct driver_data *dd,
2155 struct host_to_dev_fis *fis,
2156 unsigned int *timeout, u8 erasemode)
2157 {
2158 switch (fis->command) {
2159 case ATA_CMD_DOWNLOAD_MICRO:
2160 *timeout = 120000; /* 2 minutes */
2161 break;
2162 case ATA_CMD_SEC_ERASE_UNIT:
2163 case 0xFC:
2164 if (erasemode)
2165 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
2166 else
2167 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
2168 break;
2169 case ATA_CMD_STANDBYNOW1:
2170 *timeout = 120000; /* 2 minutes */
2171 break;
2172 case 0xF7:
2173 case 0xFA:
2174 *timeout = 60000; /* 60 seconds */
2175 break;
2176 case ATA_CMD_SMART:
2177 *timeout = 15000; /* 15 seconds */
2178 break;
2179 default:
2180 *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS;
2181 break;
2182 }
2183 }
2184
2185 /*
2186 * Executes a taskfile
2187 * See ide_taskfile_ioctl() for derivation
2188 */
2189 static int exec_drive_taskfile(struct driver_data *dd,
2190 void __user *buf,
2191 ide_task_request_t *req_task,
2192 int outtotal)
2193 {
2194 struct host_to_dev_fis fis;
2195 struct host_to_dev_fis *reply;
2196 u8 *outbuf = NULL;
2197 u8 *inbuf = NULL;
2198 dma_addr_t outbuf_dma = 0;
2199 dma_addr_t inbuf_dma = 0;
2200 dma_addr_t dma_buffer = 0;
2201 int err = 0;
2202 unsigned int taskin = 0;
2203 unsigned int taskout = 0;
2204 u8 nsect = 0;
2205 unsigned int timeout;
2206 unsigned int force_single_sector;
2207 unsigned int transfer_size;
2208 unsigned long task_file_data;
2209 int intotal = outtotal + req_task->out_size;
2210 int erasemode = 0;
2211
2212 taskout = req_task->out_size;
2213 taskin = req_task->in_size;
2214 /* 130560 = 512 * 0xFF*/
2215 if (taskin > 130560 || taskout > 130560) {
2216 err = -EINVAL;
2217 goto abort;
2218 }
2219
2220 if (taskout) {
2221 outbuf = kzalloc(taskout, GFP_KERNEL);
2222 if (outbuf == NULL) {
2223 err = -ENOMEM;
2224 goto abort;
2225 }
2226 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2227 err = -EFAULT;
2228 goto abort;
2229 }
2230 outbuf_dma = pci_map_single(dd->pdev,
2231 outbuf,
2232 taskout,
2233 DMA_TO_DEVICE);
2234 if (outbuf_dma == 0) {
2235 err = -ENOMEM;
2236 goto abort;
2237 }
2238 dma_buffer = outbuf_dma;
2239 }
2240
2241 if (taskin) {
2242 inbuf = kzalloc(taskin, GFP_KERNEL);
2243 if (inbuf == NULL) {
2244 err = -ENOMEM;
2245 goto abort;
2246 }
2247
2248 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2249 err = -EFAULT;
2250 goto abort;
2251 }
2252 inbuf_dma = pci_map_single(dd->pdev,
2253 inbuf,
2254 taskin, DMA_FROM_DEVICE);
2255 if (inbuf_dma == 0) {
2256 err = -ENOMEM;
2257 goto abort;
2258 }
2259 dma_buffer = inbuf_dma;
2260 }
2261
2262 /* only supports PIO and non-data commands from this ioctl. */
2263 switch (req_task->data_phase) {
2264 case TASKFILE_OUT:
2265 nsect = taskout / ATA_SECT_SIZE;
2266 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2267 break;
2268 case TASKFILE_IN:
2269 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2270 break;
2271 case TASKFILE_NO_DATA:
2272 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2273 break;
2274 default:
2275 err = -EINVAL;
2276 goto abort;
2277 }
2278
2279 /* Build the FIS. */
2280 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2281
2282 fis.type = 0x27;
2283 fis.opts = 1 << 7;
2284 fis.command = req_task->io_ports[7];
2285 fis.features = req_task->io_ports[1];
2286 fis.sect_count = req_task->io_ports[2];
2287 fis.lba_low = req_task->io_ports[3];
2288 fis.lba_mid = req_task->io_ports[4];
2289 fis.lba_hi = req_task->io_ports[5];
2290 /* Clear the dev bit*/
2291 fis.device = req_task->io_ports[6] & ~0x10;
2292
2293 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2294 req_task->in_flags.all =
2295 IDE_TASKFILE_STD_IN_FLAGS |
2296 (IDE_HOB_STD_IN_FLAGS << 8);
2297 fis.lba_low_ex = req_task->hob_ports[3];
2298 fis.lba_mid_ex = req_task->hob_ports[4];
2299 fis.lba_hi_ex = req_task->hob_ports[5];
2300 fis.features_ex = req_task->hob_ports[1];
2301 fis.sect_cnt_ex = req_task->hob_ports[2];
2302
2303 } else {
2304 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2305 }
2306
2307 force_single_sector = implicit_sector(fis.command, fis.features);
2308
2309 if ((taskin || taskout) && (!fis.sect_count)) {
2310 if (nsect)
2311 fis.sect_count = nsect;
2312 else {
2313 if (!force_single_sector) {
2314 dev_warn(&dd->pdev->dev,
2315 "data movement but "
2316 "sect_count is 0\n");
2317 err = -EINVAL;
2318 goto abort;
2319 }
2320 }
2321 }
2322
2323 dbg_printk(MTIP_DRV_NAME
2324 " %s: cmd %x, feat %x, nsect %x,"
2325 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2326 " head/dev %x\n",
2327 __func__,
2328 fis.command,
2329 fis.features,
2330 fis.sect_count,
2331 fis.lba_low,
2332 fis.lba_mid,
2333 fis.lba_hi,
2334 fis.device);
2335
2336 /* check for erase mode support during secure erase.*/
2337 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2338 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
2339 erasemode = 1;
2340 }
2341
2342 mtip_set_timeout(dd, &fis, &timeout, erasemode);
2343
2344 /* Determine the correct transfer size.*/
2345 if (force_single_sector)
2346 transfer_size = ATA_SECT_SIZE;
2347 else
2348 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2349
2350 /* Execute the command.*/
2351 if (mtip_exec_internal_command(dd->port,
2352 &fis,
2353 5,
2354 dma_buffer,
2355 transfer_size,
2356 0,
2357 GFP_KERNEL,
2358 timeout) < 0) {
2359 err = -EIO;
2360 goto abort;
2361 }
2362
2363 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2364
2365 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2366 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2367 req_task->io_ports[7] = reply->control;
2368 } else {
2369 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2370 req_task->io_ports[7] = reply->command;
2371 }
2372
2373 /* reclaim the DMA buffers.*/
2374 if (inbuf_dma)
2375 pci_unmap_single(dd->pdev, inbuf_dma,
2376 taskin, DMA_FROM_DEVICE);
2377 if (outbuf_dma)
2378 pci_unmap_single(dd->pdev, outbuf_dma,
2379 taskout, DMA_TO_DEVICE);
2380 inbuf_dma = 0;
2381 outbuf_dma = 0;
2382
2383 /* return the ATA registers to the caller.*/
2384 req_task->io_ports[1] = reply->features;
2385 req_task->io_ports[2] = reply->sect_count;
2386 req_task->io_ports[3] = reply->lba_low;
2387 req_task->io_ports[4] = reply->lba_mid;
2388 req_task->io_ports[5] = reply->lba_hi;
2389 req_task->io_ports[6] = reply->device;
2390
2391 if (req_task->out_flags.all & 1) {
2392
2393 req_task->hob_ports[3] = reply->lba_low_ex;
2394 req_task->hob_ports[4] = reply->lba_mid_ex;
2395 req_task->hob_ports[5] = reply->lba_hi_ex;
2396 req_task->hob_ports[1] = reply->features_ex;
2397 req_task->hob_ports[2] = reply->sect_cnt_ex;
2398 }
2399 dbg_printk(MTIP_DRV_NAME
2400 " %s: Completion: stat %x,"
2401 "err %x, sect_cnt %x, lbalo %x,"
2402 "lbamid %x, lbahi %x, dev %x\n",
2403 __func__,
2404 req_task->io_ports[7],
2405 req_task->io_ports[1],
2406 req_task->io_ports[2],
2407 req_task->io_ports[3],
2408 req_task->io_ports[4],
2409 req_task->io_ports[5],
2410 req_task->io_ports[6]);
2411
2412 if (taskout) {
2413 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2414 err = -EFAULT;
2415 goto abort;
2416 }
2417 }
2418 if (taskin) {
2419 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2420 err = -EFAULT;
2421 goto abort;
2422 }
2423 }
2424 abort:
2425 if (inbuf_dma)
2426 pci_unmap_single(dd->pdev, inbuf_dma,
2427 taskin, DMA_FROM_DEVICE);
2428 if (outbuf_dma)
2429 pci_unmap_single(dd->pdev, outbuf_dma,
2430 taskout, DMA_TO_DEVICE);
2431 kfree(outbuf);
2432 kfree(inbuf);
2433
2434 return err;
2435 }
2436
2437 /*
2438 * Handle IOCTL calls from the Block Layer.
2439 *
2440 * This function is called by the Block Layer when it receives an IOCTL
2441 * command that it does not understand. If the IOCTL command is not supported
2442 * this function returns -ENOTTY.
2443 *
2444 * @dd Pointer to the driver data structure.
2445 * @cmd IOCTL command passed from the Block Layer.
2446 * @arg IOCTL argument passed from the Block Layer.
2447 *
2448 * return value
2449 * 0 The IOCTL completed successfully.
2450 * -ENOTTY The specified command is not supported.
2451 * -EFAULT An error occurred copying data to a user space buffer.
2452 * -EIO An error occurred while executing the command.
2453 */
2454 static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2455 unsigned long arg)
2456 {
2457 switch (cmd) {
2458 case HDIO_GET_IDENTITY:
2459 {
2460 if (copy_to_user((void __user *)arg, dd->port->identify,
2461 sizeof(u16) * ATA_ID_WORDS))
2462 return -EFAULT;
2463 break;
2464 }
2465 case HDIO_DRIVE_CMD:
2466 {
2467 u8 drive_command[4];
2468
2469 /* Copy the user command info to our buffer. */
2470 if (copy_from_user(drive_command,
2471 (void __user *) arg,
2472 sizeof(drive_command)))
2473 return -EFAULT;
2474
2475 /* Execute the drive command. */
2476 if (exec_drive_command(dd->port,
2477 drive_command,
2478 (void __user *) (arg+4)))
2479 return -EIO;
2480
2481 /* Copy the status back to the users buffer. */
2482 if (copy_to_user((void __user *) arg,
2483 drive_command,
2484 sizeof(drive_command)))
2485 return -EFAULT;
2486
2487 break;
2488 }
2489 case HDIO_DRIVE_TASK:
2490 {
2491 u8 drive_command[7];
2492
2493 /* Copy the user command info to our buffer. */
2494 if (copy_from_user(drive_command,
2495 (void __user *) arg,
2496 sizeof(drive_command)))
2497 return -EFAULT;
2498
2499 /* Execute the drive command. */
2500 if (exec_drive_task(dd->port, drive_command))
2501 return -EIO;
2502
2503 /* Copy the status back to the users buffer. */
2504 if (copy_to_user((void __user *) arg,
2505 drive_command,
2506 sizeof(drive_command)))
2507 return -EFAULT;
2508
2509 break;
2510 }
2511 case HDIO_DRIVE_TASKFILE: {
2512 ide_task_request_t req_task;
2513 int ret, outtotal;
2514
2515 if (copy_from_user(&req_task, (void __user *) arg,
2516 sizeof(req_task)))
2517 return -EFAULT;
2518
2519 outtotal = sizeof(req_task);
2520
2521 ret = exec_drive_taskfile(dd, (void __user *) arg,
2522 &req_task, outtotal);
2523
2524 if (copy_to_user((void __user *) arg, &req_task,
2525 sizeof(req_task)))
2526 return -EFAULT;
2527
2528 return ret;
2529 }
2530
2531 default:
2532 return -EINVAL;
2533 }
2534 return 0;
2535 }
2536
2537 /*
2538 * Submit an IO to the hw
2539 *
2540 * This function is called by the block layer to issue an io
2541 * to the device. Upon completion, the callback function will
2542 * be called with the data parameter passed as the callback data.
2543 *
2544 * @dd Pointer to the driver data structure.
2545 * @start First sector to read.
2546 * @nsect Number of sectors to read.
2547 * @nents Number of entries in scatter list for the read command.
2548 * @tag The tag of this read command.
2549 * @callback Pointer to the function that should be called
2550 * when the read completes.
2551 * @data Callback data passed to the callback function
2552 * when the read completes.
2553 * @dir Direction (read or write)
2554 *
2555 * return value
2556 * None
2557 */
2558 static void mtip_hw_submit_io(struct driver_data *dd, sector_t sector,
2559 int nsect, int nents, int tag, void *callback,
2560 void *data, int dir)
2561 {
2562 struct host_to_dev_fis *fis;
2563 struct mtip_port *port = dd->port;
2564 struct mtip_cmd *command = &port->commands[tag];
2565 int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2566 u64 start = sector;
2567
2568 /* Map the scatter list for DMA access */
2569 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
2570
2571 command->scatter_ents = nents;
2572
2573 /*
2574 * The number of retries for this command before it is
2575 * reported as a failure to the upper layers.
2576 */
2577 command->retries = MTIP_MAX_RETRIES;
2578
2579 /* Fill out fis */
2580 fis = command->command;
2581 fis->type = 0x27;
2582 fis->opts = 1 << 7;
2583 fis->command =
2584 (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE);
2585 fis->lba_low = start & 0xFF;
2586 fis->lba_mid = (start >> 8) & 0xFF;
2587 fis->lba_hi = (start >> 16) & 0xFF;
2588 fis->lba_low_ex = (start >> 24) & 0xFF;
2589 fis->lba_mid_ex = (start >> 32) & 0xFF;
2590 fis->lba_hi_ex = (start >> 40) & 0xFF;
2591 fis->device = 1 << 6;
2592 fis->features = nsect & 0xFF;
2593 fis->features_ex = (nsect >> 8) & 0xFF;
2594 fis->sect_count = ((tag << 3) | (tag >> 5));
2595 fis->sect_cnt_ex = 0;
2596 fis->control = 0;
2597 fis->res2 = 0;
2598 fis->res3 = 0;
2599 fill_command_sg(dd, command, nents);
2600
2601 /* Populate the command header */
2602 command->command_header->opts =
2603 __force_bit2int cpu_to_le32(
2604 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
2605 command->command_header->byte_count = 0;
2606
2607 /*
2608 * Set the completion function and data for the command
2609 * within this layer.
2610 */
2611 command->comp_data = dd;
2612 command->comp_func = mtip_async_complete;
2613 command->direction = dma_dir;
2614
2615 /*
2616 * Set the completion function and data for the command passed
2617 * from the upper layer.
2618 */
2619 command->async_data = data;
2620 command->async_callback = callback;
2621
2622 /*
2623 * To prevent this command from being issued
2624 * if an internal command is in progress or error handling is active.
2625 */
2626 if (port->flags & MTIP_PF_PAUSE_IO) {
2627 set_bit(tag, port->cmds_to_issue);
2628 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2629 return;
2630 }
2631
2632 /* Issue the command to the hardware */
2633 mtip_issue_ncq_command(port, tag);
2634
2635 return;
2636 }
2637
2638 /*
2639 * Release a command slot.
2640 *
2641 * @dd Pointer to the driver data structure.
2642 * @tag Slot tag
2643 *
2644 * return value
2645 * None
2646 */
2647 static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag)
2648 {
2649 release_slot(dd->port, tag);
2650 }
2651
2652 /*
2653 * Obtain a command slot and return its associated scatter list.
2654 *
2655 * @dd Pointer to the driver data structure.
2656 * @tag Pointer to an int that will receive the allocated command
2657 * slot tag.
2658 *
2659 * return value
2660 * Pointer to the scatter list for the allocated command slot
2661 * or NULL if no command slots are available.
2662 */
2663 static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
2664 int *tag)
2665 {
2666 /*
2667 * It is possible that, even with this semaphore, a thread
2668 * may think that no command slots are available. Therefore, we
2669 * need to make an attempt to get_slot().
2670 */
2671 down(&dd->port->cmd_slot);
2672 *tag = get_slot(dd->port);
2673
2674 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
2675 up(&dd->port->cmd_slot);
2676 return NULL;
2677 }
2678 if (unlikely(*tag < 0)) {
2679 up(&dd->port->cmd_slot);
2680 return NULL;
2681 }
2682
2683 return dd->port->commands[*tag].sg;
2684 }
2685
2686 /*
2687 * Sysfs status dump.
2688 *
2689 * @dev Pointer to the device structure, passed by the kernrel.
2690 * @attr Pointer to the device_attribute structure passed by the kernel.
2691 * @buf Pointer to the char buffer that will receive the stats info.
2692 *
2693 * return value
2694 * The size, in bytes, of the data copied into buf.
2695 */
2696 static ssize_t mtip_hw_show_status(struct device *dev,
2697 struct device_attribute *attr,
2698 char *buf)
2699 {
2700 struct driver_data *dd = dev_to_disk(dev)->private_data;
2701 int size = 0;
2702
2703 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
2704 size += sprintf(buf, "%s", "thermal_shutdown\n");
2705 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
2706 size += sprintf(buf, "%s", "write_protect\n");
2707 else
2708 size += sprintf(buf, "%s", "online\n");
2709
2710 return size;
2711 }
2712
2713 static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2714
2715 /* debugsfs entries */
2716
2717 static ssize_t show_device_status(struct device_driver *drv, char *buf)
2718 {
2719 int size = 0;
2720 struct driver_data *dd, *tmp;
2721 unsigned long flags;
2722 char id_buf[42];
2723 u16 status = 0;
2724
2725 spin_lock_irqsave(&dev_lock, flags);
2726 size += sprintf(&buf[size], "Devices Present:\n");
2727 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
2728 if (dd->pdev) {
2729 if (dd->port &&
2730 dd->port->identify &&
2731 dd->port->identify_valid) {
2732 strlcpy(id_buf,
2733 (char *) (dd->port->identify + 10), 21);
2734 status = *(dd->port->identify + 141);
2735 } else {
2736 memset(id_buf, 0, 42);
2737 status = 0;
2738 }
2739
2740 if (dd->port &&
2741 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2742 size += sprintf(&buf[size],
2743 " device %s %s (ftl rebuild %d %%)\n",
2744 dev_name(&dd->pdev->dev),
2745 id_buf,
2746 status);
2747 } else {
2748 size += sprintf(&buf[size],
2749 " device %s %s\n",
2750 dev_name(&dd->pdev->dev),
2751 id_buf);
2752 }
2753 }
2754 }
2755
2756 size += sprintf(&buf[size], "Devices Being Removed:\n");
2757 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
2758 if (dd->pdev) {
2759 if (dd->port &&
2760 dd->port->identify &&
2761 dd->port->identify_valid) {
2762 strlcpy(id_buf,
2763 (char *) (dd->port->identify+10), 21);
2764 status = *(dd->port->identify + 141);
2765 } else {
2766 memset(id_buf, 0, 42);
2767 status = 0;
2768 }
2769
2770 if (dd->port &&
2771 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2772 size += sprintf(&buf[size],
2773 " device %s %s (ftl rebuild %d %%)\n",
2774 dev_name(&dd->pdev->dev),
2775 id_buf,
2776 status);
2777 } else {
2778 size += sprintf(&buf[size],
2779 " device %s %s\n",
2780 dev_name(&dd->pdev->dev),
2781 id_buf);
2782 }
2783 }
2784 }
2785 spin_unlock_irqrestore(&dev_lock, flags);
2786
2787 return size;
2788 }
2789
2790 static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2791 size_t len, loff_t *offset)
2792 {
2793 int size = *offset;
2794 char buf[MTIP_DFS_MAX_BUF_SIZE];
2795
2796 if (!len || *offset)
2797 return 0;
2798
2799 size += show_device_status(NULL, buf);
2800
2801 *offset = size <= len ? size : len;
2802 size = copy_to_user(ubuf, buf, *offset);
2803 if (size)
2804 return -EFAULT;
2805
2806 return *offset;
2807 }
2808
2809 static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2810 size_t len, loff_t *offset)
2811 {
2812 struct driver_data *dd = (struct driver_data *)f->private_data;
2813 char buf[MTIP_DFS_MAX_BUF_SIZE];
2814 u32 group_allocated;
2815 int size = *offset;
2816 int n;
2817
2818 if (!len || size)
2819 return 0;
2820
2821 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2822
2823 for (n = dd->slot_groups-1; n >= 0; n--)
2824 size += sprintf(&buf[size], "%08X ",
2825 readl(dd->port->s_active[n]));
2826
2827 size += sprintf(&buf[size], "]\n");
2828 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2829
2830 for (n = dd->slot_groups-1; n >= 0; n--)
2831 size += sprintf(&buf[size], "%08X ",
2832 readl(dd->port->cmd_issue[n]));
2833
2834 size += sprintf(&buf[size], "]\n");
2835 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2836
2837 for (n = dd->slot_groups-1; n >= 0; n--)
2838 size += sprintf(&buf[size], "%08X ",
2839 readl(dd->port->completed[n]));
2840
2841 size += sprintf(&buf[size], "]\n");
2842 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2843 readl(dd->port->mmio + PORT_IRQ_STAT));
2844 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2845 readl(dd->mmio + HOST_IRQ_STAT));
2846 size += sprintf(&buf[size], "\n");
2847
2848 size += sprintf(&buf[size], "L/ Allocated : [ 0x");
2849
2850 for (n = dd->slot_groups-1; n >= 0; n--) {
2851 if (sizeof(long) > sizeof(u32))
2852 group_allocated =
2853 dd->port->allocated[n/2] >> (32*(n&1));
2854 else
2855 group_allocated = dd->port->allocated[n];
2856 size += sprintf(&buf[size], "%08X ", group_allocated);
2857 }
2858 size += sprintf(&buf[size], "]\n");
2859
2860 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2861
2862 for (n = dd->slot_groups-1; n >= 0; n--) {
2863 if (sizeof(long) > sizeof(u32))
2864 group_allocated =
2865 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2866 else
2867 group_allocated = dd->port->cmds_to_issue[n];
2868 size += sprintf(&buf[size], "%08X ", group_allocated);
2869 }
2870 size += sprintf(&buf[size], "]\n");
2871
2872 *offset = size <= len ? size : len;
2873 size = copy_to_user(ubuf, buf, *offset);
2874 if (size)
2875 return -EFAULT;
2876
2877 return *offset;
2878 }
2879
2880 static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2881 size_t len, loff_t *offset)
2882 {
2883 struct driver_data *dd = (struct driver_data *)f->private_data;
2884 char buf[MTIP_DFS_MAX_BUF_SIZE];
2885 int size = *offset;
2886
2887 if (!len || size)
2888 return 0;
2889
2890 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2891 dd->port->flags);
2892 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2893 dd->dd_flag);
2894
2895 *offset = size <= len ? size : len;
2896 size = copy_to_user(ubuf, buf, *offset);
2897 if (size)
2898 return -EFAULT;
2899
2900 return *offset;
2901 }
2902
2903 static const struct file_operations mtip_device_status_fops = {
2904 .owner = THIS_MODULE,
2905 .open = simple_open,
2906 .read = mtip_hw_read_device_status,
2907 .llseek = no_llseek,
2908 };
2909
2910 static const struct file_operations mtip_regs_fops = {
2911 .owner = THIS_MODULE,
2912 .open = simple_open,
2913 .read = mtip_hw_read_registers,
2914 .llseek = no_llseek,
2915 };
2916
2917 static const struct file_operations mtip_flags_fops = {
2918 .owner = THIS_MODULE,
2919 .open = simple_open,
2920 .read = mtip_hw_read_flags,
2921 .llseek = no_llseek,
2922 };
2923
2924 /*
2925 * Create the sysfs related attributes.
2926 *
2927 * @dd Pointer to the driver data structure.
2928 * @kobj Pointer to the kobj for the block device.
2929 *
2930 * return value
2931 * 0 Operation completed successfully.
2932 * -EINVAL Invalid parameter.
2933 */
2934 static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
2935 {
2936 if (!kobj || !dd)
2937 return -EINVAL;
2938
2939 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2940 dev_warn(&dd->pdev->dev,
2941 "Error creating 'status' sysfs entry\n");
2942 return 0;
2943 }
2944
2945 /*
2946 * Remove the sysfs related attributes.
2947 *
2948 * @dd Pointer to the driver data structure.
2949 * @kobj Pointer to the kobj for the block device.
2950 *
2951 * return value
2952 * 0 Operation completed successfully.
2953 * -EINVAL Invalid parameter.
2954 */
2955 static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
2956 {
2957 if (!kobj || !dd)
2958 return -EINVAL;
2959
2960 sysfs_remove_file(kobj, &dev_attr_status.attr);
2961
2962 return 0;
2963 }
2964
2965 static int mtip_hw_debugfs_init(struct driver_data *dd)
2966 {
2967 if (!dfs_parent)
2968 return -1;
2969
2970 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2971 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2972 dev_warn(&dd->pdev->dev,
2973 "Error creating node %s under debugfs\n",
2974 dd->disk->disk_name);
2975 dd->dfs_node = NULL;
2976 return -1;
2977 }
2978
2979 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2980 &mtip_flags_fops);
2981 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2982 &mtip_regs_fops);
2983
2984 return 0;
2985 }
2986
2987 static void mtip_hw_debugfs_exit(struct driver_data *dd)
2988 {
2989 debugfs_remove_recursive(dd->dfs_node);
2990 }
2991
2992
2993 /*
2994 * Perform any init/resume time hardware setup
2995 *
2996 * @dd Pointer to the driver data structure.
2997 *
2998 * return value
2999 * None
3000 */
3001 static inline void hba_setup(struct driver_data *dd)
3002 {
3003 u32 hwdata;
3004 hwdata = readl(dd->mmio + HOST_HSORG);
3005
3006 /* interrupt bug workaround: use only 1 IS bit.*/
3007 writel(hwdata |
3008 HSORG_DISABLE_SLOTGRP_INTR |
3009 HSORG_DISABLE_SLOTGRP_PXIS,
3010 dd->mmio + HOST_HSORG);
3011 }
3012
3013 /*
3014 * Detect the details of the product, and store anything needed
3015 * into the driver data structure. This includes product type and
3016 * version and number of slot groups.
3017 *
3018 * @dd Pointer to the driver data structure.
3019 *
3020 * return value
3021 * None
3022 */
3023 static void mtip_detect_product(struct driver_data *dd)
3024 {
3025 u32 hwdata;
3026 unsigned int rev, slotgroups;
3027
3028 /*
3029 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
3030 * info register:
3031 * [15:8] hardware/software interface rev#
3032 * [ 3] asic-style interface
3033 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
3034 */
3035 hwdata = readl(dd->mmio + HOST_HSORG);
3036
3037 dd->product_type = MTIP_PRODUCT_UNKNOWN;
3038 dd->slot_groups = 1;
3039
3040 if (hwdata & 0x8) {
3041 dd->product_type = MTIP_PRODUCT_ASICFPGA;
3042 rev = (hwdata & HSORG_HWREV) >> 8;
3043 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
3044 dev_info(&dd->pdev->dev,
3045 "ASIC-FPGA design, HS rev 0x%x, "
3046 "%i slot groups [%i slots]\n",
3047 rev,
3048 slotgroups,
3049 slotgroups * 32);
3050
3051 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
3052 dev_warn(&dd->pdev->dev,
3053 "Warning: driver only supports "
3054 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
3055 slotgroups = MTIP_MAX_SLOT_GROUPS;
3056 }
3057 dd->slot_groups = slotgroups;
3058 return;
3059 }
3060
3061 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
3062 }
3063
3064 /*
3065 * Blocking wait for FTL rebuild to complete
3066 *
3067 * @dd Pointer to the DRIVER_DATA structure.
3068 *
3069 * return value
3070 * 0 FTL rebuild completed successfully
3071 * -EFAULT FTL rebuild error/timeout/interruption
3072 */
3073 static int mtip_ftl_rebuild_poll(struct driver_data *dd)
3074 {
3075 unsigned long timeout, cnt = 0, start;
3076
3077 dev_warn(&dd->pdev->dev,
3078 "FTL rebuild in progress. Polling for completion.\n");
3079
3080 start = jiffies;
3081 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
3082
3083 do {
3084 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3085 &dd->dd_flag)))
3086 return -EFAULT;
3087 if (mtip_check_surprise_removal(dd->pdev))
3088 return -EFAULT;
3089
3090 if (mtip_get_identify(dd->port, NULL) < 0)
3091 return -EFAULT;
3092
3093 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3094 MTIP_FTL_REBUILD_MAGIC) {
3095 ssleep(1);
3096 /* Print message every 3 minutes */
3097 if (cnt++ >= 180) {
3098 dev_warn(&dd->pdev->dev,
3099 "FTL rebuild in progress (%d secs).\n",
3100 jiffies_to_msecs(jiffies - start) / 1000);
3101 cnt = 0;
3102 }
3103 } else {
3104 dev_warn(&dd->pdev->dev,
3105 "FTL rebuild complete (%d secs).\n",
3106 jiffies_to_msecs(jiffies - start) / 1000);
3107 mtip_block_initialize(dd);
3108 return 0;
3109 }
3110 ssleep(10);
3111 } while (time_before(jiffies, timeout));
3112
3113 /* Check for timeout */
3114 dev_err(&dd->pdev->dev,
3115 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
3116 jiffies_to_msecs(jiffies - start) / 1000);
3117 return -EFAULT;
3118 }
3119
3120 /*
3121 * service thread to issue queued commands
3122 *
3123 * @data Pointer to the driver data structure.
3124 *
3125 * return value
3126 * 0
3127 */
3128
3129 static int mtip_service_thread(void *data)
3130 {
3131 struct driver_data *dd = (struct driver_data *)data;
3132 unsigned long slot, slot_start, slot_wrap;
3133 unsigned int num_cmd_slots = dd->slot_groups * 32;
3134 struct mtip_port *port = dd->port;
3135
3136 while (1) {
3137 /*
3138 * the condition is to check neither an internal command is
3139 * is in progress nor error handling is active
3140 */
3141 wait_event_interruptible(port->svc_wait, (port->flags) &&
3142 !(port->flags & MTIP_PF_PAUSE_IO));
3143
3144 if (kthread_should_stop())
3145 break;
3146
3147 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3148 &dd->dd_flag)))
3149 break;
3150
3151 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
3152 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
3153 slot = 1;
3154 /* used to restrict the loop to one iteration */
3155 slot_start = num_cmd_slots;
3156 slot_wrap = 0;
3157 while (1) {
3158 slot = find_next_bit(port->cmds_to_issue,
3159 num_cmd_slots, slot);
3160 if (slot_wrap == 1) {
3161 if ((slot_start >= slot) ||
3162 (slot >= num_cmd_slots))
3163 break;
3164 }
3165 if (unlikely(slot_start == num_cmd_slots))
3166 slot_start = slot;
3167
3168 if (unlikely(slot == num_cmd_slots)) {
3169 slot = 1;
3170 slot_wrap = 1;
3171 continue;
3172 }
3173
3174 /* Issue the command to the hardware */
3175 mtip_issue_ncq_command(port, slot);
3176
3177 clear_bit(slot, port->cmds_to_issue);
3178 }
3179
3180 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
3181 } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
3182 if (!mtip_ftl_rebuild_poll(dd))
3183 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
3184 &dd->dd_flag);
3185 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
3186 }
3187 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
3188
3189 if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
3190 break;
3191 }
3192 return 0;
3193 }
3194
3195 /*
3196 * Called once for each card.
3197 *
3198 * @dd Pointer to the driver data structure.
3199 *
3200 * return value
3201 * 0 on success, else an error code.
3202 */
3203 static int mtip_hw_init(struct driver_data *dd)
3204 {
3205 int i;
3206 int rv;
3207 unsigned int num_command_slots;
3208 unsigned long timeout, timetaken;
3209 unsigned char *buf;
3210 struct smart_attr attr242;
3211
3212 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3213
3214 mtip_detect_product(dd);
3215 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3216 rv = -EIO;
3217 goto out1;
3218 }
3219 num_command_slots = dd->slot_groups * 32;
3220
3221 hba_setup(dd);
3222
3223 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3224 dd->numa_node);
3225 if (!dd->port) {
3226 dev_err(&dd->pdev->dev,
3227 "Memory allocation: port structure\n");
3228 return -ENOMEM;
3229 }
3230
3231 /* Continue workqueue setup */
3232 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3233 dd->work[i].port = dd->port;
3234
3235 /* Counting semaphore to track command slot usage */
3236 sema_init(&dd->port->cmd_slot, num_command_slots - 1);
3237
3238 /* Spinlock to prevent concurrent issue */
3239 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3240 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3241
3242 /* Set the port mmio base address. */
3243 dd->port->mmio = dd->mmio + PORT_OFFSET;
3244 dd->port->dd = dd;
3245
3246 /* Allocate memory for the command list. */
3247 dd->port->command_list =
3248 dmam_alloc_coherent(&dd->pdev->dev,
3249 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3250 &dd->port->command_list_dma,
3251 GFP_KERNEL);
3252 if (!dd->port->command_list) {
3253 dev_err(&dd->pdev->dev,
3254 "Memory allocation: command list\n");
3255 rv = -ENOMEM;
3256 goto out1;
3257 }
3258
3259 /* Clear the memory we have allocated. */
3260 memset(dd->port->command_list,
3261 0,
3262 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4));
3263
3264 /* Setup the addresse of the RX FIS. */
3265 dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ;
3266 dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ;
3267
3268 /* Setup the address of the command tables. */
3269 dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ;
3270 dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ;
3271
3272 /* Setup the address of the identify data. */
3273 dd->port->identify = dd->port->command_table +
3274 HW_CMD_TBL_AR_SZ;
3275 dd->port->identify_dma = dd->port->command_tbl_dma +
3276 HW_CMD_TBL_AR_SZ;
3277
3278 /* Setup the address of the sector buffer - for some non-ncq cmds */
3279 dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE;
3280 dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE;
3281
3282 /* Setup the address of the log buf - for read log command */
3283 dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE;
3284 dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE;
3285
3286 /* Setup the address of the smart buf - for smart read data command */
3287 dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE;
3288 dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE;
3289
3290
3291 /* Point the command headers at the command tables. */
3292 for (i = 0; i < num_command_slots; i++) {
3293 dd->port->commands[i].command_header =
3294 dd->port->command_list +
3295 (sizeof(struct mtip_cmd_hdr) * i);
3296 dd->port->commands[i].command_header_dma =
3297 dd->port->command_list_dma +
3298 (sizeof(struct mtip_cmd_hdr) * i);
3299
3300 dd->port->commands[i].command =
3301 dd->port->command_table + (HW_CMD_TBL_SZ * i);
3302 dd->port->commands[i].command_dma =
3303 dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i);
3304
3305 if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64)
3306 dd->port->commands[i].command_header->ctbau =
3307 __force_bit2int cpu_to_le32(
3308 (dd->port->commands[i].command_dma >> 16) >> 16);
3309 dd->port->commands[i].command_header->ctba =
3310 __force_bit2int cpu_to_le32(
3311 dd->port->commands[i].command_dma & 0xFFFFFFFF);
3312
3313 /*
3314 * If this is not done, a bug is reported by the stock
3315 * FC11 i386. Due to the fact that it has lots of kernel
3316 * debugging enabled.
3317 */
3318 sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG);
3319
3320 /* Mark all commands as currently inactive.*/
3321 atomic_set(&dd->port->commands[i].active, 0);
3322 }
3323
3324 /* Setup the pointers to the extended s_active and CI registers. */
3325 for (i = 0; i < dd->slot_groups; i++) {
3326 dd->port->s_active[i] =
3327 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3328 dd->port->cmd_issue[i] =
3329 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3330 dd->port->completed[i] =
3331 dd->port->mmio + i*0x80 + PORT_SDBV;
3332 }
3333
3334 timetaken = jiffies;
3335 timeout = jiffies + msecs_to_jiffies(30000);
3336 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3337 time_before(jiffies, timeout)) {
3338 mdelay(100);
3339 }
3340 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3341 timetaken = jiffies - timetaken;
3342 dev_warn(&dd->pdev->dev,
3343 "Surprise removal detected at %u ms\n",
3344 jiffies_to_msecs(timetaken));
3345 rv = -ENODEV;
3346 goto out2 ;
3347 }
3348 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
3349 timetaken = jiffies - timetaken;
3350 dev_warn(&dd->pdev->dev,
3351 "Removal detected at %u ms\n",
3352 jiffies_to_msecs(timetaken));
3353 rv = -EFAULT;
3354 goto out2;
3355 }
3356
3357 /* Conditionally reset the HBA. */
3358 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3359 if (mtip_hba_reset(dd) < 0) {
3360 dev_err(&dd->pdev->dev,
3361 "Card did not reset within timeout\n");
3362 rv = -EIO;
3363 goto out2;
3364 }
3365 } else {
3366 /* Clear any pending interrupts on the HBA */
3367 writel(readl(dd->mmio + HOST_IRQ_STAT),
3368 dd->mmio + HOST_IRQ_STAT);
3369 }
3370
3371 mtip_init_port(dd->port);
3372 mtip_start_port(dd->port);
3373
3374 /* Setup the ISR and enable interrupts. */
3375 rv = devm_request_irq(&dd->pdev->dev,
3376 dd->pdev->irq,
3377 mtip_irq_handler,
3378 IRQF_SHARED,
3379 dev_driver_string(&dd->pdev->dev),
3380 dd);
3381
3382 if (rv) {
3383 dev_err(&dd->pdev->dev,
3384 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3385 goto out2;
3386 }
3387 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
3388
3389 /* Enable interrupts on the HBA. */
3390 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3391 dd->mmio + HOST_CTL);
3392
3393 init_timer(&dd->port->cmd_timer);
3394 init_waitqueue_head(&dd->port->svc_wait);
3395
3396 dd->port->cmd_timer.data = (unsigned long int) dd->port;
3397 dd->port->cmd_timer.function = mtip_timeout_function;
3398 mod_timer(&dd->port->cmd_timer,
3399 jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD));
3400
3401
3402 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
3403 rv = -EFAULT;
3404 goto out3;
3405 }
3406
3407 if (mtip_get_identify(dd->port, NULL) < 0) {
3408 rv = -EFAULT;
3409 goto out3;
3410 }
3411
3412 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3413 MTIP_FTL_REBUILD_MAGIC) {
3414 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3415 return MTIP_FTL_REBUILD_MAGIC;
3416 }
3417 mtip_dump_identify(dd->port);
3418
3419 /* check write protect, over temp and rebuild statuses */
3420 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3421 dd->port->log_buf,
3422 dd->port->log_buf_dma, 1);
3423 if (rv) {
3424 dev_warn(&dd->pdev->dev,
3425 "Error in READ LOG EXT (10h) command\n");
3426 /* non-critical error, don't fail the load */
3427 } else {
3428 buf = (unsigned char *)dd->port->log_buf;
3429 if (buf[259] & 0x1) {
3430 dev_info(&dd->pdev->dev,
3431 "Write protect bit is set.\n");
3432 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3433 }
3434 if (buf[288] == 0xF7) {
3435 dev_info(&dd->pdev->dev,
3436 "Exceeded Tmax, drive in thermal shutdown.\n");
3437 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3438 }
3439 if (buf[288] == 0xBF) {
3440 dev_info(&dd->pdev->dev,
3441 "Drive indicates rebuild has failed.\n");
3442 /* TODO */
3443 }
3444 }
3445
3446 /* get write protect progess */
3447 memset(&attr242, 0, sizeof(struct smart_attr));
3448 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3449 dev_warn(&dd->pdev->dev,
3450 "Unable to check write protect progress\n");
3451 else
3452 dev_info(&dd->pdev->dev,
3453 "Write protect progress: %u%% (%u blocks)\n",
3454 attr242.cur, le32_to_cpu(attr242.data));
3455 return rv;
3456
3457 out3:
3458 del_timer_sync(&dd->port->cmd_timer);
3459
3460 /* Disable interrupts on the HBA. */
3461 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3462 dd->mmio + HOST_CTL);
3463
3464 /* Release the IRQ. */
3465 irq_set_affinity_hint(dd->pdev->irq, NULL);
3466 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3467
3468 out2:
3469 mtip_deinit_port(dd->port);
3470
3471 /* Free the command/command header memory. */
3472 dmam_free_coherent(&dd->pdev->dev,
3473 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3474 dd->port->command_list,
3475 dd->port->command_list_dma);
3476 out1:
3477 /* Free the memory allocated for the for structure. */
3478 kfree(dd->port);
3479
3480 return rv;
3481 }
3482
3483 /*
3484 * Called to deinitialize an interface.
3485 *
3486 * @dd Pointer to the driver data structure.
3487 *
3488 * return value
3489 * 0
3490 */
3491 static int mtip_hw_exit(struct driver_data *dd)
3492 {
3493 /*
3494 * Send standby immediate (E0h) to the drive so that it
3495 * saves its state.
3496 */
3497 if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
3498
3499 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags))
3500 if (mtip_standby_immediate(dd->port))
3501 dev_warn(&dd->pdev->dev,
3502 "STANDBY IMMEDIATE failed\n");
3503
3504 /* de-initialize the port. */
3505 mtip_deinit_port(dd->port);
3506
3507 /* Disable interrupts on the HBA. */
3508 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3509 dd->mmio + HOST_CTL);
3510 }
3511
3512 del_timer_sync(&dd->port->cmd_timer);
3513
3514 /* Release the IRQ. */
3515 irq_set_affinity_hint(dd->pdev->irq, NULL);
3516 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3517
3518 /* Free the command/command header memory. */
3519 dmam_free_coherent(&dd->pdev->dev,
3520 HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4),
3521 dd->port->command_list,
3522 dd->port->command_list_dma);
3523 /* Free the memory allocated for the for structure. */
3524 kfree(dd->port);
3525
3526 return 0;
3527 }
3528
3529 /*
3530 * Issue a Standby Immediate command to the device.
3531 *
3532 * This function is called by the Block Layer just before the
3533 * system powers off during a shutdown.
3534 *
3535 * @dd Pointer to the driver data structure.
3536 *
3537 * return value
3538 * 0
3539 */
3540 static int mtip_hw_shutdown(struct driver_data *dd)
3541 {
3542 /*
3543 * Send standby immediate (E0h) to the drive so that it
3544 * saves its state.
3545 */
3546 mtip_standby_immediate(dd->port);
3547
3548 return 0;
3549 }
3550
3551 /*
3552 * Suspend function
3553 *
3554 * This function is called by the Block Layer just before the
3555 * system hibernates.
3556 *
3557 * @dd Pointer to the driver data structure.
3558 *
3559 * return value
3560 * 0 Suspend was successful
3561 * -EFAULT Suspend was not successful
3562 */
3563 static int mtip_hw_suspend(struct driver_data *dd)
3564 {
3565 /*
3566 * Send standby immediate (E0h) to the drive
3567 * so that it saves its state.
3568 */
3569 if (mtip_standby_immediate(dd->port) != 0) {
3570 dev_err(&dd->pdev->dev,
3571 "Failed standby-immediate command\n");
3572 return -EFAULT;
3573 }
3574
3575 /* Disable interrupts on the HBA.*/
3576 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3577 dd->mmio + HOST_CTL);
3578 mtip_deinit_port(dd->port);
3579
3580 return 0;
3581 }
3582
3583 /*
3584 * Resume function
3585 *
3586 * This function is called by the Block Layer as the
3587 * system resumes.
3588 *
3589 * @dd Pointer to the driver data structure.
3590 *
3591 * return value
3592 * 0 Resume was successful
3593 * -EFAULT Resume was not successful
3594 */
3595 static int mtip_hw_resume(struct driver_data *dd)
3596 {
3597 /* Perform any needed hardware setup steps */
3598 hba_setup(dd);
3599
3600 /* Reset the HBA */
3601 if (mtip_hba_reset(dd) != 0) {
3602 dev_err(&dd->pdev->dev,
3603 "Unable to reset the HBA\n");
3604 return -EFAULT;
3605 }
3606
3607 /*
3608 * Enable the port, DMA engine, and FIS reception specific
3609 * h/w in controller.
3610 */
3611 mtip_init_port(dd->port);
3612 mtip_start_port(dd->port);
3613
3614 /* Enable interrupts on the HBA.*/
3615 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3616 dd->mmio + HOST_CTL);
3617
3618 return 0;
3619 }
3620
3621 /*
3622 * Helper function for reusing disk name
3623 * upon hot insertion.
3624 */
3625 static int rssd_disk_name_format(char *prefix,
3626 int index,
3627 char *buf,
3628 int buflen)
3629 {
3630 const int base = 'z' - 'a' + 1;
3631 char *begin = buf + strlen(prefix);
3632 char *end = buf + buflen;
3633 char *p;
3634 int unit;
3635
3636 p = end - 1;
3637 *p = '\0';
3638 unit = base;
3639 do {
3640 if (p == begin)
3641 return -EINVAL;
3642 *--p = 'a' + (index % unit);
3643 index = (index / unit) - 1;
3644 } while (index >= 0);
3645
3646 memmove(begin, p, end - p);
3647 memcpy(buf, prefix, strlen(prefix));
3648
3649 return 0;
3650 }
3651
3652 /*
3653 * Block layer IOCTL handler.
3654 *
3655 * @dev Pointer to the block_device structure.
3656 * @mode ignored
3657 * @cmd IOCTL command passed from the user application.
3658 * @arg Argument passed from the user application.
3659 *
3660 * return value
3661 * 0 IOCTL completed successfully.
3662 * -ENOTTY IOCTL not supported or invalid driver data
3663 * structure pointer.
3664 */
3665 static int mtip_block_ioctl(struct block_device *dev,
3666 fmode_t mode,
3667 unsigned cmd,
3668 unsigned long arg)
3669 {
3670 struct driver_data *dd = dev->bd_disk->private_data;
3671
3672 if (!capable(CAP_SYS_ADMIN))
3673 return -EACCES;
3674
3675 if (!dd)
3676 return -ENOTTY;
3677
3678 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3679 return -ENOTTY;
3680
3681 switch (cmd) {
3682 case BLKFLSBUF:
3683 return -ENOTTY;
3684 default:
3685 return mtip_hw_ioctl(dd, cmd, arg);
3686 }
3687 }
3688
3689 #ifdef CONFIG_COMPAT
3690 /*
3691 * Block layer compat IOCTL handler.
3692 *
3693 * @dev Pointer to the block_device structure.
3694 * @mode ignored
3695 * @cmd IOCTL command passed from the user application.
3696 * @arg Argument passed from the user application.
3697 *
3698 * return value
3699 * 0 IOCTL completed successfully.
3700 * -ENOTTY IOCTL not supported or invalid driver data
3701 * structure pointer.
3702 */
3703 static int mtip_block_compat_ioctl(struct block_device *dev,
3704 fmode_t mode,
3705 unsigned cmd,
3706 unsigned long arg)
3707 {
3708 struct driver_data *dd = dev->bd_disk->private_data;
3709
3710 if (!capable(CAP_SYS_ADMIN))
3711 return -EACCES;
3712
3713 if (!dd)
3714 return -ENOTTY;
3715
3716 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
3717 return -ENOTTY;
3718
3719 switch (cmd) {
3720 case BLKFLSBUF:
3721 return -ENOTTY;
3722 case HDIO_DRIVE_TASKFILE: {
3723 struct mtip_compat_ide_task_request_s __user *compat_req_task;
3724 ide_task_request_t req_task;
3725 int compat_tasksize, outtotal, ret;
3726
3727 compat_tasksize =
3728 sizeof(struct mtip_compat_ide_task_request_s);
3729
3730 compat_req_task =
3731 (struct mtip_compat_ide_task_request_s __user *) arg;
3732
3733 if (copy_from_user(&req_task, (void __user *) arg,
3734 compat_tasksize - (2 * sizeof(compat_long_t))))
3735 return -EFAULT;
3736
3737 if (get_user(req_task.out_size, &compat_req_task->out_size))
3738 return -EFAULT;
3739
3740 if (get_user(req_task.in_size, &compat_req_task->in_size))
3741 return -EFAULT;
3742
3743 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3744
3745 ret = exec_drive_taskfile(dd, (void __user *) arg,
3746 &req_task, outtotal);
3747
3748 if (copy_to_user((void __user *) arg, &req_task,
3749 compat_tasksize -
3750 (2 * sizeof(compat_long_t))))
3751 return -EFAULT;
3752
3753 if (put_user(req_task.out_size, &compat_req_task->out_size))
3754 return -EFAULT;
3755
3756 if (put_user(req_task.in_size, &compat_req_task->in_size))
3757 return -EFAULT;
3758
3759 return ret;
3760 }
3761 default:
3762 return mtip_hw_ioctl(dd, cmd, arg);
3763 }
3764 }
3765 #endif
3766
3767 /*
3768 * Obtain the geometry of the device.
3769 *
3770 * You may think that this function is obsolete, but some applications,
3771 * fdisk for example still used CHS values. This function describes the
3772 * device as having 224 heads and 56 sectors per cylinder. These values are
3773 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3774 * partition is described in terms of a start and end cylinder this means
3775 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3776 * affects performance.
3777 *
3778 * @dev Pointer to the block_device strucutre.
3779 * @geo Pointer to a hd_geometry structure.
3780 *
3781 * return value
3782 * 0 Operation completed successfully.
3783 * -ENOTTY An error occurred while reading the drive capacity.
3784 */
3785 static int mtip_block_getgeo(struct block_device *dev,
3786 struct hd_geometry *geo)
3787 {
3788 struct driver_data *dd = dev->bd_disk->private_data;
3789 sector_t capacity;
3790
3791 if (!dd)
3792 return -ENOTTY;
3793
3794 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3795 dev_warn(&dd->pdev->dev,
3796 "Could not get drive capacity.\n");
3797 return -ENOTTY;
3798 }
3799
3800 geo->heads = 224;
3801 geo->sectors = 56;
3802 sector_div(capacity, (geo->heads * geo->sectors));
3803 geo->cylinders = capacity;
3804 return 0;
3805 }
3806
3807 /*
3808 * Block device operation function.
3809 *
3810 * This structure contains pointers to the functions required by the block
3811 * layer.
3812 */
3813 static const struct block_device_operations mtip_block_ops = {
3814 .ioctl = mtip_block_ioctl,
3815 #ifdef CONFIG_COMPAT
3816 .compat_ioctl = mtip_block_compat_ioctl,
3817 #endif
3818 .getgeo = mtip_block_getgeo,
3819 .owner = THIS_MODULE
3820 };
3821
3822 /*
3823 * Block layer make request function.
3824 *
3825 * This function is called by the kernel to process a BIO for
3826 * the P320 device.
3827 *
3828 * @queue Pointer to the request queue. Unused other than to obtain
3829 * the driver data structure.
3830 * @bio Pointer to the BIO.
3831 *
3832 */
3833 static void mtip_make_request(struct request_queue *queue, struct bio *bio)
3834 {
3835 struct driver_data *dd = queue->queuedata;
3836 struct scatterlist *sg;
3837 struct bio_vec *bvec;
3838 int nents = 0;
3839 int tag = 0;
3840
3841 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3842 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3843 &dd->dd_flag))) {
3844 bio_endio(bio, -ENXIO);
3845 return;
3846 }
3847 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
3848 bio_endio(bio, -ENODATA);
3849 return;
3850 }
3851 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3852 &dd->dd_flag) &&
3853 bio_data_dir(bio))) {
3854 bio_endio(bio, -ENODATA);
3855 return;
3856 }
3857 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) {
3858 bio_endio(bio, -ENODATA);
3859 return;
3860 }
3861 }
3862
3863 if (unlikely(bio->bi_rw & REQ_DISCARD)) {
3864 bio_endio(bio, mtip_send_trim(dd, bio->bi_sector,
3865 bio_sectors(bio)));
3866 return;
3867 }
3868
3869 if (unlikely(!bio_has_data(bio))) {
3870 blk_queue_flush(queue, 0);
3871 bio_endio(bio, 0);
3872 return;
3873 }
3874
3875 sg = mtip_hw_get_scatterlist(dd, &tag);
3876 if (likely(sg != NULL)) {
3877 blk_queue_bounce(queue, &bio);
3878
3879 if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) {
3880 dev_warn(&dd->pdev->dev,
3881 "Maximum number of SGL entries exceeded\n");
3882 bio_io_error(bio);
3883 mtip_hw_release_scatterlist(dd, tag);
3884 return;
3885 }
3886
3887 /* Create the scatter list for this bio. */
3888 bio_for_each_segment(bvec, bio, nents) {
3889 sg_set_page(&sg[nents],
3890 bvec->bv_page,
3891 bvec->bv_len,
3892 bvec->bv_offset);
3893 }
3894
3895 /* Issue the read/write. */
3896 mtip_hw_submit_io(dd,
3897 bio->bi_sector,
3898 bio_sectors(bio),
3899 nents,
3900 tag,
3901 bio_endio,
3902 bio,
3903 bio_data_dir(bio));
3904 } else
3905 bio_io_error(bio);
3906 }
3907
3908 /*
3909 * Block layer initialization function.
3910 *
3911 * This function is called once by the PCI layer for each P320
3912 * device that is connected to the system.
3913 *
3914 * @dd Pointer to the driver data structure.
3915 *
3916 * return value
3917 * 0 on success else an error code.
3918 */
3919 static int mtip_block_initialize(struct driver_data *dd)
3920 {
3921 int rv = 0, wait_for_rebuild = 0;
3922 sector_t capacity;
3923 unsigned int index = 0;
3924 struct kobject *kobj;
3925 unsigned char thd_name[16];
3926
3927 if (dd->disk)
3928 goto skip_create_disk; /* hw init done, before rebuild */
3929
3930 /* Initialize the protocol layer. */
3931 wait_for_rebuild = mtip_hw_init(dd);
3932 if (wait_for_rebuild < 0) {
3933 dev_err(&dd->pdev->dev,
3934 "Protocol layer initialization failed\n");
3935 rv = -EINVAL;
3936 goto protocol_init_error;
3937 }
3938
3939 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
3940 if (dd->disk == NULL) {
3941 dev_err(&dd->pdev->dev,
3942 "Unable to allocate gendisk structure\n");
3943 rv = -EINVAL;
3944 goto alloc_disk_error;
3945 }
3946
3947 /* Generate the disk name, implemented same as in sd.c */
3948 do {
3949 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3950 goto ida_get_error;
3951
3952 spin_lock(&rssd_index_lock);
3953 rv = ida_get_new(&rssd_index_ida, &index);
3954 spin_unlock(&rssd_index_lock);
3955 } while (rv == -EAGAIN);
3956
3957 if (rv)
3958 goto ida_get_error;
3959
3960 rv = rssd_disk_name_format("rssd",
3961 index,
3962 dd->disk->disk_name,
3963 DISK_NAME_LEN);
3964 if (rv)
3965 goto disk_index_error;
3966
3967 dd->disk->driverfs_dev = &dd->pdev->dev;
3968 dd->disk->major = dd->major;
3969 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
3970 dd->disk->fops = &mtip_block_ops;
3971 dd->disk->private_data = dd;
3972 dd->index = index;
3973
3974 /*
3975 * if rebuild pending, start the service thread, and delay the block
3976 * queue creation and add_disk()
3977 */
3978 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3979 goto start_service_thread;
3980
3981 skip_create_disk:
3982 /* Allocate the request queue. */
3983 dd->queue = blk_alloc_queue_node(GFP_KERNEL, dd->numa_node);
3984 if (dd->queue == NULL) {
3985 dev_err(&dd->pdev->dev,
3986 "Unable to allocate request queue\n");
3987 rv = -ENOMEM;
3988 goto block_queue_alloc_init_error;
3989 }
3990
3991 /* Attach our request function to the request queue. */
3992 blk_queue_make_request(dd->queue, mtip_make_request);
3993
3994 dd->disk->queue = dd->queue;
3995 dd->queue->queuedata = dd;
3996
3997 /* Set device limits. */
3998 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
3999 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
4000 blk_queue_physical_block_size(dd->queue, 4096);
4001 blk_queue_max_hw_sectors(dd->queue, 0xffff);
4002 blk_queue_max_segment_size(dd->queue, 0x400000);
4003 blk_queue_io_min(dd->queue, 4096);
4004
4005 /*
4006 * write back cache is not supported in the device. FUA depends on
4007 * write back cache support, hence setting flush support to zero.
4008 */
4009 blk_queue_flush(dd->queue, 0);
4010
4011 /* Signal trim support */
4012 if (dd->trim_supp == true) {
4013 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
4014 dd->queue->limits.discard_granularity = 4096;
4015 blk_queue_max_discard_sectors(dd->queue,
4016 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
4017 dd->queue->limits.discard_zeroes_data = 0;
4018 }
4019
4020 /* Set the capacity of the device in 512 byte sectors. */
4021 if (!(mtip_hw_get_capacity(dd, &capacity))) {
4022 dev_warn(&dd->pdev->dev,
4023 "Could not read drive capacity\n");
4024 rv = -EIO;
4025 goto read_capacity_error;
4026 }
4027 set_capacity(dd->disk, capacity);
4028
4029 /* Enable the block device and add it to /dev */
4030 add_disk(dd->disk);
4031
4032 /*
4033 * Now that the disk is active, initialize any sysfs attributes
4034 * managed by the protocol layer.
4035 */
4036 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4037 if (kobj) {
4038 mtip_hw_sysfs_init(dd, kobj);
4039 kobject_put(kobj);
4040 }
4041 mtip_hw_debugfs_init(dd);
4042
4043 if (dd->mtip_svc_handler) {
4044 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4045 return rv; /* service thread created for handling rebuild */
4046 }
4047
4048 start_service_thread:
4049 sprintf(thd_name, "mtip_svc_thd_%02d", index);
4050 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
4051 dd, dd->numa_node, thd_name);
4052
4053 if (IS_ERR(dd->mtip_svc_handler)) {
4054 dev_err(&dd->pdev->dev, "service thread failed to start\n");
4055 dd->mtip_svc_handler = NULL;
4056 rv = -EFAULT;
4057 goto kthread_run_error;
4058 }
4059 wake_up_process(dd->mtip_svc_handler);
4060 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4061 rv = wait_for_rebuild;
4062
4063 return rv;
4064
4065 kthread_run_error:
4066 mtip_hw_debugfs_exit(dd);
4067
4068 /* Delete our gendisk. This also removes the device from /dev */
4069 del_gendisk(dd->disk);
4070
4071 read_capacity_error:
4072 blk_cleanup_queue(dd->queue);
4073
4074 block_queue_alloc_init_error:
4075 disk_index_error:
4076 spin_lock(&rssd_index_lock);
4077 ida_remove(&rssd_index_ida, index);
4078 spin_unlock(&rssd_index_lock);
4079
4080 ida_get_error:
4081 put_disk(dd->disk);
4082
4083 alloc_disk_error:
4084 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
4085
4086 protocol_init_error:
4087 return rv;
4088 }
4089
4090 /*
4091 * Block layer deinitialization function.
4092 *
4093 * Called by the PCI layer as each P320 device is removed.
4094 *
4095 * @dd Pointer to the driver data structure.
4096 *
4097 * return value
4098 * 0
4099 */
4100 static int mtip_block_remove(struct driver_data *dd)
4101 {
4102 struct kobject *kobj;
4103
4104 if (dd->mtip_svc_handler) {
4105 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4106 wake_up_interruptible(&dd->port->svc_wait);
4107 kthread_stop(dd->mtip_svc_handler);
4108 }
4109
4110 /* Clean up the sysfs attributes, if created */
4111 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4112 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4113 if (kobj) {
4114 mtip_hw_sysfs_exit(dd, kobj);
4115 kobject_put(kobj);
4116 }
4117 }
4118 mtip_hw_debugfs_exit(dd);
4119
4120 /*
4121 * Delete our gendisk structure. This also removes the device
4122 * from /dev
4123 */
4124 if (dd->disk) {
4125 if (dd->disk->queue)
4126 del_gendisk(dd->disk);
4127 else
4128 put_disk(dd->disk);
4129 }
4130
4131 spin_lock(&rssd_index_lock);
4132 ida_remove(&rssd_index_ida, dd->index);
4133 spin_unlock(&rssd_index_lock);
4134
4135 blk_cleanup_queue(dd->queue);
4136 dd->disk = NULL;
4137 dd->queue = NULL;
4138
4139 /* De-initialize the protocol layer. */
4140 mtip_hw_exit(dd);
4141
4142 return 0;
4143 }
4144
4145 /*
4146 * Function called by the PCI layer when just before the
4147 * machine shuts down.
4148 *
4149 * If a protocol layer shutdown function is present it will be called
4150 * by this function.
4151 *
4152 * @dd Pointer to the driver data structure.
4153 *
4154 * return value
4155 * 0
4156 */
4157 static int mtip_block_shutdown(struct driver_data *dd)
4158 {
4159 dev_info(&dd->pdev->dev,
4160 "Shutting down %s ...\n", dd->disk->disk_name);
4161
4162 /* Delete our gendisk structure, and cleanup the blk queue. */
4163 if (dd->disk) {
4164 if (dd->disk->queue)
4165 del_gendisk(dd->disk);
4166 else
4167 put_disk(dd->disk);
4168 }
4169
4170
4171 spin_lock(&rssd_index_lock);
4172 ida_remove(&rssd_index_ida, dd->index);
4173 spin_unlock(&rssd_index_lock);
4174
4175 blk_cleanup_queue(dd->queue);
4176 dd->disk = NULL;
4177 dd->queue = NULL;
4178
4179 mtip_hw_shutdown(dd);
4180 return 0;
4181 }
4182
4183 static int mtip_block_suspend(struct driver_data *dd)
4184 {
4185 dev_info(&dd->pdev->dev,
4186 "Suspending %s ...\n", dd->disk->disk_name);
4187 mtip_hw_suspend(dd);
4188 return 0;
4189 }
4190
4191 static int mtip_block_resume(struct driver_data *dd)
4192 {
4193 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4194 dd->disk->disk_name);
4195 mtip_hw_resume(dd);
4196 return 0;
4197 }
4198
4199 static void drop_cpu(int cpu)
4200 {
4201 cpu_use[cpu]--;
4202 }
4203
4204 static int get_least_used_cpu_on_node(int node)
4205 {
4206 int cpu, least_used_cpu, least_cnt;
4207 const struct cpumask *node_mask;
4208
4209 node_mask = cpumask_of_node(node);
4210 least_used_cpu = cpumask_first(node_mask);
4211 least_cnt = cpu_use[least_used_cpu];
4212 cpu = least_used_cpu;
4213
4214 for_each_cpu(cpu, node_mask) {
4215 if (cpu_use[cpu] < least_cnt) {
4216 least_used_cpu = cpu;
4217 least_cnt = cpu_use[cpu];
4218 }
4219 }
4220 cpu_use[least_used_cpu]++;
4221 return least_used_cpu;
4222 }
4223
4224 /* Helper for selecting a node in round robin mode */
4225 static inline int mtip_get_next_rr_node(void)
4226 {
4227 static int next_node = -1;
4228
4229 if (next_node == -1) {
4230 next_node = first_online_node;
4231 return next_node;
4232 }
4233
4234 next_node = next_online_node(next_node);
4235 if (next_node == MAX_NUMNODES)
4236 next_node = first_online_node;
4237 return next_node;
4238 }
4239
4240 static DEFINE_HANDLER(0);
4241 static DEFINE_HANDLER(1);
4242 static DEFINE_HANDLER(2);
4243 static DEFINE_HANDLER(3);
4244 static DEFINE_HANDLER(4);
4245 static DEFINE_HANDLER(5);
4246 static DEFINE_HANDLER(6);
4247 static DEFINE_HANDLER(7);
4248
4249 /*
4250 * Called for each supported PCI device detected.
4251 *
4252 * This function allocates the private data structure, enables the
4253 * PCI device and then calls the block layer initialization function.
4254 *
4255 * return value
4256 * 0 on success else an error code.
4257 */
4258 static int mtip_pci_probe(struct pci_dev *pdev,
4259 const struct pci_device_id *ent)
4260 {
4261 int rv = 0;
4262 struct driver_data *dd = NULL;
4263 char cpu_list[256];
4264 const struct cpumask *node_mask;
4265 int cpu, i = 0, j = 0;
4266 int my_node = NUMA_NO_NODE;
4267 unsigned long flags;
4268
4269 /* Allocate memory for this devices private data. */
4270 my_node = pcibus_to_node(pdev->bus);
4271 if (my_node != NUMA_NO_NODE) {
4272 if (!node_online(my_node))
4273 my_node = mtip_get_next_rr_node();
4274 } else {
4275 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4276 my_node = mtip_get_next_rr_node();
4277 }
4278 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4279 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
4280 cpu_to_node(smp_processor_id()), smp_processor_id());
4281
4282 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
4283 if (dd == NULL) {
4284 dev_err(&pdev->dev,
4285 "Unable to allocate memory for driver data\n");
4286 return -ENOMEM;
4287 }
4288
4289 /* Attach the private data to this PCI device. */
4290 pci_set_drvdata(pdev, dd);
4291
4292 rv = pcim_enable_device(pdev);
4293 if (rv < 0) {
4294 dev_err(&pdev->dev, "Unable to enable device\n");
4295 goto iomap_err;
4296 }
4297
4298 /* Map BAR5 to memory. */
4299 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4300 if (rv < 0) {
4301 dev_err(&pdev->dev, "Unable to map regions\n");
4302 goto iomap_err;
4303 }
4304
4305 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4306 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4307
4308 if (rv) {
4309 rv = pci_set_consistent_dma_mask(pdev,
4310 DMA_BIT_MASK(32));
4311 if (rv) {
4312 dev_warn(&pdev->dev,
4313 "64-bit DMA enable failed\n");
4314 goto setmask_err;
4315 }
4316 }
4317 }
4318
4319 /* Copy the info we may need later into the private data structure. */
4320 dd->major = mtip_major;
4321 dd->instance = instance;
4322 dd->pdev = pdev;
4323 dd->numa_node = my_node;
4324
4325 INIT_LIST_HEAD(&dd->online_list);
4326 INIT_LIST_HEAD(&dd->remove_list);
4327
4328 memset(dd->workq_name, 0, 32);
4329 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4330
4331 dd->isr_workq = create_workqueue(dd->workq_name);
4332 if (!dd->isr_workq) {
4333 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
4334 rv = -ENOMEM;
4335 goto block_initialize_err;
4336 }
4337
4338 memset(cpu_list, 0, sizeof(cpu_list));
4339
4340 node_mask = cpumask_of_node(dd->numa_node);
4341 if (!cpumask_empty(node_mask)) {
4342 for_each_cpu(cpu, node_mask)
4343 {
4344 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4345 j = strlen(cpu_list);
4346 }
4347
4348 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4349 dd->numa_node,
4350 topology_physical_package_id(cpumask_first(node_mask)),
4351 nr_cpus_node(dd->numa_node),
4352 cpu_list);
4353 } else
4354 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4355
4356 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4357 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4358 cpu_to_node(dd->isr_binding), dd->isr_binding);
4359
4360 /* first worker context always runs in ISR */
4361 dd->work[0].cpu_binding = dd->isr_binding;
4362 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4363 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4364 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4365 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4366 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4367 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4368 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4369
4370 /* Log the bindings */
4371 for_each_present_cpu(cpu) {
4372 memset(cpu_list, 0, sizeof(cpu_list));
4373 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4374 if (dd->work[i].cpu_binding == cpu) {
4375 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4376 j = strlen(cpu_list);
4377 }
4378 }
4379 if (j)
4380 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4381 }
4382
4383 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4384 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4385 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4386 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4387 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4388 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4389 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4390 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4391
4392 pci_set_master(pdev);
4393 rv = pci_enable_msi(pdev);
4394 if (rv) {
4395 dev_warn(&pdev->dev,
4396 "Unable to enable MSI interrupt.\n");
4397 goto block_initialize_err;
4398 }
4399
4400 /* Initialize the block layer. */
4401 rv = mtip_block_initialize(dd);
4402 if (rv < 0) {
4403 dev_err(&pdev->dev,
4404 "Unable to initialize block layer\n");
4405 goto block_initialize_err;
4406 }
4407
4408 /*
4409 * Increment the instance count so that each device has a unique
4410 * instance number.
4411 */
4412 instance++;
4413 if (rv != MTIP_FTL_REBUILD_MAGIC)
4414 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
4415 else
4416 rv = 0; /* device in rebuild state, return 0 from probe */
4417
4418 /* Add to online list even if in ftl rebuild */
4419 spin_lock_irqsave(&dev_lock, flags);
4420 list_add(&dd->online_list, &online_list);
4421 spin_unlock_irqrestore(&dev_lock, flags);
4422
4423 goto done;
4424
4425 block_initialize_err:
4426 pci_disable_msi(pdev);
4427 if (dd->isr_workq) {
4428 flush_workqueue(dd->isr_workq);
4429 destroy_workqueue(dd->isr_workq);
4430 drop_cpu(dd->work[0].cpu_binding);
4431 drop_cpu(dd->work[1].cpu_binding);
4432 drop_cpu(dd->work[2].cpu_binding);
4433 }
4434 setmask_err:
4435 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4436
4437 iomap_err:
4438 kfree(dd);
4439 pci_set_drvdata(pdev, NULL);
4440 return rv;
4441 done:
4442 return rv;
4443 }
4444
4445 /*
4446 * Called for each probed device when the device is removed or the
4447 * driver is unloaded.
4448 *
4449 * return value
4450 * None
4451 */
4452 static void mtip_pci_remove(struct pci_dev *pdev)
4453 {
4454 struct driver_data *dd = pci_get_drvdata(pdev);
4455 int counter = 0;
4456 unsigned long flags;
4457
4458 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4459
4460 spin_lock_irqsave(&dev_lock, flags);
4461 list_del_init(&dd->online_list);
4462 list_add(&dd->remove_list, &removing_list);
4463 spin_unlock_irqrestore(&dev_lock, flags);
4464
4465 if (mtip_check_surprise_removal(pdev)) {
4466 while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
4467 counter++;
4468 msleep(20);
4469 if (counter == 10) {
4470 /* Cleanup the outstanding commands */
4471 mtip_command_cleanup(dd);
4472 break;
4473 }
4474 }
4475 }
4476
4477 /* Clean up the block layer. */
4478 mtip_block_remove(dd);
4479
4480 if (dd->isr_workq) {
4481 flush_workqueue(dd->isr_workq);
4482 destroy_workqueue(dd->isr_workq);
4483 drop_cpu(dd->work[0].cpu_binding);
4484 drop_cpu(dd->work[1].cpu_binding);
4485 drop_cpu(dd->work[2].cpu_binding);
4486 }
4487
4488 pci_disable_msi(pdev);
4489
4490 spin_lock_irqsave(&dev_lock, flags);
4491 list_del_init(&dd->remove_list);
4492 spin_unlock_irqrestore(&dev_lock, flags);
4493
4494 kfree(dd);
4495 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4496 }
4497
4498 /*
4499 * Called for each probed device when the device is suspended.
4500 *
4501 * return value
4502 * 0 Success
4503 * <0 Error
4504 */
4505 static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4506 {
4507 int rv = 0;
4508 struct driver_data *dd = pci_get_drvdata(pdev);
4509
4510 if (!dd) {
4511 dev_err(&pdev->dev,
4512 "Driver private datastructure is NULL\n");
4513 return -EFAULT;
4514 }
4515
4516 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4517
4518 /* Disable ports & interrupts then send standby immediate */
4519 rv = mtip_block_suspend(dd);
4520 if (rv < 0) {
4521 dev_err(&pdev->dev,
4522 "Failed to suspend controller\n");
4523 return rv;
4524 }
4525
4526 /*
4527 * Save the pci config space to pdev structure &
4528 * disable the device
4529 */
4530 pci_save_state(pdev);
4531 pci_disable_device(pdev);
4532
4533 /* Move to Low power state*/
4534 pci_set_power_state(pdev, PCI_D3hot);
4535
4536 return rv;
4537 }
4538
4539 /*
4540 * Called for each probed device when the device is resumed.
4541 *
4542 * return value
4543 * 0 Success
4544 * <0 Error
4545 */
4546 static int mtip_pci_resume(struct pci_dev *pdev)
4547 {
4548 int rv = 0;
4549 struct driver_data *dd;
4550
4551 dd = pci_get_drvdata(pdev);
4552 if (!dd) {
4553 dev_err(&pdev->dev,
4554 "Driver private datastructure is NULL\n");
4555 return -EFAULT;
4556 }
4557
4558 /* Move the device to active State */
4559 pci_set_power_state(pdev, PCI_D0);
4560
4561 /* Restore PCI configuration space */
4562 pci_restore_state(pdev);
4563
4564 /* Enable the PCI device*/
4565 rv = pcim_enable_device(pdev);
4566 if (rv < 0) {
4567 dev_err(&pdev->dev,
4568 "Failed to enable card during resume\n");
4569 goto err;
4570 }
4571 pci_set_master(pdev);
4572
4573 /*
4574 * Calls hbaReset, initPort, & startPort function
4575 * then enables interrupts
4576 */
4577 rv = mtip_block_resume(dd);
4578 if (rv < 0)
4579 dev_err(&pdev->dev, "Unable to resume\n");
4580
4581 err:
4582 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
4583
4584 return rv;
4585 }
4586
4587 /*
4588 * Shutdown routine
4589 *
4590 * return value
4591 * None
4592 */
4593 static void mtip_pci_shutdown(struct pci_dev *pdev)
4594 {
4595 struct driver_data *dd = pci_get_drvdata(pdev);
4596 if (dd)
4597 mtip_block_shutdown(dd);
4598 }
4599
4600 /* Table of device ids supported by this driver. */
4601 static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = {
4602 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4603 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4604 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4605 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4606 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4607 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4608 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
4609 { 0 }
4610 };
4611
4612 /* Structure that describes the PCI driver functions. */
4613 static struct pci_driver mtip_pci_driver = {
4614 .name = MTIP_DRV_NAME,
4615 .id_table = mtip_pci_tbl,
4616 .probe = mtip_pci_probe,
4617 .remove = mtip_pci_remove,
4618 .suspend = mtip_pci_suspend,
4619 .resume = mtip_pci_resume,
4620 .shutdown = mtip_pci_shutdown,
4621 };
4622
4623 MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4624
4625 /*
4626 * Module initialization function.
4627 *
4628 * Called once when the module is loaded. This function allocates a major
4629 * block device number to the Cyclone devices and registers the PCI layer
4630 * of the driver.
4631 *
4632 * Return value
4633 * 0 on success else error code.
4634 */
4635 static int __init mtip_init(void)
4636 {
4637 int error;
4638
4639 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4640
4641 spin_lock_init(&dev_lock);
4642
4643 INIT_LIST_HEAD(&online_list);
4644 INIT_LIST_HEAD(&removing_list);
4645
4646 /* Allocate a major block device number to use with this driver. */
4647 error = register_blkdev(0, MTIP_DRV_NAME);
4648 if (error <= 0) {
4649 pr_err("Unable to register block device (%d)\n",
4650 error);
4651 return -EBUSY;
4652 }
4653 mtip_major = error;
4654
4655 dfs_parent = debugfs_create_dir("rssd", NULL);
4656 if (IS_ERR_OR_NULL(dfs_parent)) {
4657 pr_warn("Error creating debugfs parent\n");
4658 dfs_parent = NULL;
4659 }
4660 if (dfs_parent) {
4661 dfs_device_status = debugfs_create_file("device_status",
4662 S_IRUGO, dfs_parent, NULL,
4663 &mtip_device_status_fops);
4664 if (IS_ERR_OR_NULL(dfs_device_status)) {
4665 pr_err("Error creating device_status node\n");
4666 dfs_device_status = NULL;
4667 }
4668 }
4669
4670 /* Register our PCI operations. */
4671 error = pci_register_driver(&mtip_pci_driver);
4672 if (error) {
4673 debugfs_remove(dfs_parent);
4674 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4675 }
4676
4677 return error;
4678 }
4679
4680 /*
4681 * Module de-initialization function.
4682 *
4683 * Called once when the module is unloaded. This function deallocates
4684 * the major block device number allocated by mtip_init() and
4685 * unregisters the PCI layer of the driver.
4686 *
4687 * Return value
4688 * none
4689 */
4690 static void __exit mtip_exit(void)
4691 {
4692 debugfs_remove_recursive(dfs_parent);
4693
4694 /* Release the allocated major block device number. */
4695 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4696
4697 /* Unregister the PCI driver. */
4698 pci_unregister_driver(&mtip_pci_driver);
4699 }
4700
4701 MODULE_AUTHOR("Micron Technology, Inc");
4702 MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4703 MODULE_LICENSE("GPL");
4704 MODULE_VERSION(MTIP_DRV_VERSION);
4705
4706 module_init(mtip_init);
4707 module_exit(mtip_exit);
kernel source for telekom puls (alcatel/mediatek)