rbd: require stable pages if message data CRCs are enabled
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / cciss.c
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/pci-aspm.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <linux/bitmap.h>
45 #include <linux/io.h>
46 #include <asm/uaccess.h>
47
48 #include <linux/dma-mapping.h>
49 #include <linux/blkdev.h>
50 #include <linux/genhd.h>
51 #include <linux/completion.h>
52 #include <scsi/scsi.h>
53 #include <scsi/sg.h>
54 #include <scsi/scsi_ioctl.h>
55 #include <linux/cdrom.h>
56 #include <linux/scatterlist.h>
57 #include <linux/kthread.h>
58
59 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
60 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
62
63 /* Embedded module documentation macros - see modules.h */
64 MODULE_AUTHOR("Hewlett-Packard Company");
65 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
66 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67 MODULE_VERSION("3.6.26");
68 MODULE_LICENSE("GPL");
69 static int cciss_tape_cmds = 6;
70 module_param(cciss_tape_cmds, int, 0644);
71 MODULE_PARM_DESC(cciss_tape_cmds,
72 "number of commands to allocate for tape devices (default: 6)");
73 static int cciss_simple_mode;
74 module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(cciss_simple_mode,
76 "Use 'simple mode' rather than 'performant mode'");
77
78 static int cciss_allow_hpsa;
79 module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
80 MODULE_PARM_DESC(cciss_allow_hpsa,
81 "Prevent cciss driver from accessing hardware known to be "
82 " supported by the hpsa driver");
83
84 static DEFINE_MUTEX(cciss_mutex);
85 static struct proc_dir_entry *proc_cciss;
86
87 #include "cciss_cmd.h"
88 #include "cciss.h"
89 #include <linux/cciss_ioctl.h>
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id cciss_pci_device_id[] = {
93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
113 {0,}
114 };
115
116 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
118 /* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122 static struct board_type products[] = {
123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
133 {0x3223103C, "Smart Array P800", &SA5_access},
134 {0x3234103C, "Smart Array P400", &SA5_access},
135 {0x3235103C, "Smart Array P400i", &SA5_access},
136 {0x3211103C, "Smart Array E200i", &SA5_access},
137 {0x3212103C, "Smart Array E200", &SA5_access},
138 {0x3213103C, "Smart Array E200i", &SA5_access},
139 {0x3214103C, "Smart Array E200i", &SA5_access},
140 {0x3215103C, "Smart Array E200i", &SA5_access},
141 {0x3237103C, "Smart Array E500", &SA5_access},
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 };
146
147 /* How long to wait (in milliseconds) for board to go into simple mode */
148 #define MAX_CONFIG_WAIT 30000
149 #define MAX_IOCTL_CONFIG_WAIT 1000
150
151 /*define how many times we will try a command because of bus resets */
152 #define MAX_CMD_RETRIES 3
153
154 #define MAX_CTLR 32
155
156 /* Originally cciss driver only supports 8 major numbers */
157 #define MAX_CTLR_ORIG 8
158
159 static ctlr_info_t *hba[MAX_CTLR];
160
161 static struct task_struct *cciss_scan_thread;
162 static DEFINE_MUTEX(scan_mutex);
163 static LIST_HEAD(scan_q);
164
165 static void do_cciss_request(struct request_queue *q);
166 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
167 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
168 static int cciss_open(struct block_device *bdev, fmode_t mode);
169 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
170 static void cciss_release(struct gendisk *disk, fmode_t mode);
171 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
172 unsigned int cmd, unsigned long arg);
173 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
174
175 static int cciss_revalidate(struct gendisk *disk);
176 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
177 static int deregister_disk(ctlr_info_t *h, int drv_index,
178 int clear_all, int via_ioctl);
179
180 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
181 sector_t *total_size, unsigned int *block_size);
182 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
183 sector_t *total_size, unsigned int *block_size);
184 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
185 sector_t total_size,
186 unsigned int block_size, InquiryData_struct *inq_buff,
187 drive_info_struct *drv);
188 static void cciss_interrupt_mode(ctlr_info_t *);
189 static int cciss_enter_simple_mode(struct ctlr_info *h);
190 static void start_io(ctlr_info_t *h);
191 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
192 __u8 page_code, unsigned char scsi3addr[],
193 int cmd_type);
194 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
195 int attempt_retry);
196 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
197
198 static int add_to_scan_list(struct ctlr_info *h);
199 static int scan_thread(void *data);
200 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
201 static void cciss_hba_release(struct device *dev);
202 static void cciss_device_release(struct device *dev);
203 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
204 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
205 static inline u32 next_command(ctlr_info_t *h);
206 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
207 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
208 u64 *cfg_offset);
209 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
210 unsigned long *memory_bar);
211 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
212 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
213
214 /* performant mode helper functions */
215 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
216 int *bucket_map);
217 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
218
219 #ifdef CONFIG_PROC_FS
220 static void cciss_procinit(ctlr_info_t *h);
221 #else
222 static void cciss_procinit(ctlr_info_t *h)
223 {
224 }
225 #endif /* CONFIG_PROC_FS */
226
227 #ifdef CONFIG_COMPAT
228 static int cciss_compat_ioctl(struct block_device *, fmode_t,
229 unsigned, unsigned long);
230 #endif
231
232 static const struct block_device_operations cciss_fops = {
233 .owner = THIS_MODULE,
234 .open = cciss_unlocked_open,
235 .release = cciss_release,
236 .ioctl = cciss_ioctl,
237 .getgeo = cciss_getgeo,
238 #ifdef CONFIG_COMPAT
239 .compat_ioctl = cciss_compat_ioctl,
240 #endif
241 .revalidate_disk = cciss_revalidate,
242 };
243
244 /* set_performant_mode: Modify the tag for cciss performant
245 * set bit 0 for pull model, bits 3-1 for block fetch
246 * register number
247 */
248 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
249 {
250 if (likely(h->transMethod & CFGTBL_Trans_Performant))
251 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
252 }
253
254 /*
255 * Enqueuing and dequeuing functions for cmdlists.
256 */
257 static inline void addQ(struct list_head *list, CommandList_struct *c)
258 {
259 list_add_tail(&c->list, list);
260 }
261
262 static inline void removeQ(CommandList_struct *c)
263 {
264 /*
265 * After kexec/dump some commands might still
266 * be in flight, which the firmware will try
267 * to complete. Resetting the firmware doesn't work
268 * with old fw revisions, so we have to mark
269 * them off as 'stale' to prevent the driver from
270 * falling over.
271 */
272 if (WARN_ON(list_empty(&c->list))) {
273 c->cmd_type = CMD_MSG_STALE;
274 return;
275 }
276
277 list_del_init(&c->list);
278 }
279
280 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
281 CommandList_struct *c)
282 {
283 unsigned long flags;
284 set_performant_mode(h, c);
285 spin_lock_irqsave(&h->lock, flags);
286 addQ(&h->reqQ, c);
287 h->Qdepth++;
288 if (h->Qdepth > h->maxQsinceinit)
289 h->maxQsinceinit = h->Qdepth;
290 start_io(h);
291 spin_unlock_irqrestore(&h->lock, flags);
292 }
293
294 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
295 int nr_cmds)
296 {
297 int i;
298
299 if (!cmd_sg_list)
300 return;
301 for (i = 0; i < nr_cmds; i++) {
302 kfree(cmd_sg_list[i]);
303 cmd_sg_list[i] = NULL;
304 }
305 kfree(cmd_sg_list);
306 }
307
308 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
309 ctlr_info_t *h, int chainsize, int nr_cmds)
310 {
311 int j;
312 SGDescriptor_struct **cmd_sg_list;
313
314 if (chainsize <= 0)
315 return NULL;
316
317 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
318 if (!cmd_sg_list)
319 return NULL;
320
321 /* Build up chain blocks for each command */
322 for (j = 0; j < nr_cmds; j++) {
323 /* Need a block of chainsized s/g elements. */
324 cmd_sg_list[j] = kmalloc((chainsize *
325 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
326 if (!cmd_sg_list[j]) {
327 dev_err(&h->pdev->dev, "Cannot get memory "
328 "for s/g chains.\n");
329 goto clean;
330 }
331 }
332 return cmd_sg_list;
333 clean:
334 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
335 return NULL;
336 }
337
338 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
339 {
340 SGDescriptor_struct *chain_sg;
341 u64bit temp64;
342
343 if (c->Header.SGTotal <= h->max_cmd_sgentries)
344 return;
345
346 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
347 temp64.val32.lower = chain_sg->Addr.lower;
348 temp64.val32.upper = chain_sg->Addr.upper;
349 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
350 }
351
352 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
353 SGDescriptor_struct *chain_block, int len)
354 {
355 SGDescriptor_struct *chain_sg;
356 u64bit temp64;
357
358 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
359 chain_sg->Ext = CCISS_SG_CHAIN;
360 chain_sg->Len = len;
361 temp64.val = pci_map_single(h->pdev, chain_block, len,
362 PCI_DMA_TODEVICE);
363 chain_sg->Addr.lower = temp64.val32.lower;
364 chain_sg->Addr.upper = temp64.val32.upper;
365 }
366
367 #include "cciss_scsi.c" /* For SCSI tape support */
368
369 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
370 "UNKNOWN"
371 };
372 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
373
374 #ifdef CONFIG_PROC_FS
375
376 /*
377 * Report information about this controller.
378 */
379 #define ENG_GIG 1000000000
380 #define ENG_GIG_FACTOR (ENG_GIG/512)
381 #define ENGAGE_SCSI "engage scsi"
382
383 static void cciss_seq_show_header(struct seq_file *seq)
384 {
385 ctlr_info_t *h = seq->private;
386
387 seq_printf(seq, "%s: HP %s Controller\n"
388 "Board ID: 0x%08lx\n"
389 "Firmware Version: %c%c%c%c\n"
390 "IRQ: %d\n"
391 "Logical drives: %d\n"
392 "Current Q depth: %d\n"
393 "Current # commands on controller: %d\n"
394 "Max Q depth since init: %d\n"
395 "Max # commands on controller since init: %d\n"
396 "Max SG entries since init: %d\n",
397 h->devname,
398 h->product_name,
399 (unsigned long)h->board_id,
400 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
401 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
402 h->num_luns,
403 h->Qdepth, h->commands_outstanding,
404 h->maxQsinceinit, h->max_outstanding, h->maxSG);
405
406 #ifdef CONFIG_CISS_SCSI_TAPE
407 cciss_seq_tape_report(seq, h);
408 #endif /* CONFIG_CISS_SCSI_TAPE */
409 }
410
411 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
412 {
413 ctlr_info_t *h = seq->private;
414 unsigned long flags;
415
416 /* prevent displaying bogus info during configuration
417 * or deconfiguration of a logical volume
418 */
419 spin_lock_irqsave(&h->lock, flags);
420 if (h->busy_configuring) {
421 spin_unlock_irqrestore(&h->lock, flags);
422 return ERR_PTR(-EBUSY);
423 }
424 h->busy_configuring = 1;
425 spin_unlock_irqrestore(&h->lock, flags);
426
427 if (*pos == 0)
428 cciss_seq_show_header(seq);
429
430 return pos;
431 }
432
433 static int cciss_seq_show(struct seq_file *seq, void *v)
434 {
435 sector_t vol_sz, vol_sz_frac;
436 ctlr_info_t *h = seq->private;
437 unsigned ctlr = h->ctlr;
438 loff_t *pos = v;
439 drive_info_struct *drv = h->drv[*pos];
440
441 if (*pos > h->highest_lun)
442 return 0;
443
444 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
445 return 0;
446
447 if (drv->heads == 0)
448 return 0;
449
450 vol_sz = drv->nr_blocks;
451 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
452 vol_sz_frac *= 100;
453 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
454
455 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
456 drv->raid_level = RAID_UNKNOWN;
457 seq_printf(seq, "cciss/c%dd%d:"
458 "\t%4u.%02uGB\tRAID %s\n",
459 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
460 raid_label[drv->raid_level]);
461 return 0;
462 }
463
464 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
465 {
466 ctlr_info_t *h = seq->private;
467
468 if (*pos > h->highest_lun)
469 return NULL;
470 *pos += 1;
471
472 return pos;
473 }
474
475 static void cciss_seq_stop(struct seq_file *seq, void *v)
476 {
477 ctlr_info_t *h = seq->private;
478
479 /* Only reset h->busy_configuring if we succeeded in setting
480 * it during cciss_seq_start. */
481 if (v == ERR_PTR(-EBUSY))
482 return;
483
484 h->busy_configuring = 0;
485 }
486
487 static const struct seq_operations cciss_seq_ops = {
488 .start = cciss_seq_start,
489 .show = cciss_seq_show,
490 .next = cciss_seq_next,
491 .stop = cciss_seq_stop,
492 };
493
494 static int cciss_seq_open(struct inode *inode, struct file *file)
495 {
496 int ret = seq_open(file, &cciss_seq_ops);
497 struct seq_file *seq = file->private_data;
498
499 if (!ret)
500 seq->private = PDE_DATA(inode);
501
502 return ret;
503 }
504
505 static ssize_t
506 cciss_proc_write(struct file *file, const char __user *buf,
507 size_t length, loff_t *ppos)
508 {
509 int err;
510 char *buffer;
511
512 #ifndef CONFIG_CISS_SCSI_TAPE
513 return -EINVAL;
514 #endif
515
516 if (!buf || length > PAGE_SIZE - 1)
517 return -EINVAL;
518
519 buffer = (char *)__get_free_page(GFP_KERNEL);
520 if (!buffer)
521 return -ENOMEM;
522
523 err = -EFAULT;
524 if (copy_from_user(buffer, buf, length))
525 goto out;
526 buffer[length] = '\0';
527
528 #ifdef CONFIG_CISS_SCSI_TAPE
529 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
530 struct seq_file *seq = file->private_data;
531 ctlr_info_t *h = seq->private;
532
533 err = cciss_engage_scsi(h);
534 if (err == 0)
535 err = length;
536 } else
537 #endif /* CONFIG_CISS_SCSI_TAPE */
538 err = -EINVAL;
539 /* might be nice to have "disengage" too, but it's not
540 safely possible. (only 1 module use count, lock issues.) */
541
542 out:
543 free_page((unsigned long)buffer);
544 return err;
545 }
546
547 static const struct file_operations cciss_proc_fops = {
548 .owner = THIS_MODULE,
549 .open = cciss_seq_open,
550 .read = seq_read,
551 .llseek = seq_lseek,
552 .release = seq_release,
553 .write = cciss_proc_write,
554 };
555
556 static void cciss_procinit(ctlr_info_t *h)
557 {
558 struct proc_dir_entry *pde;
559
560 if (proc_cciss == NULL)
561 proc_cciss = proc_mkdir("driver/cciss", NULL);
562 if (!proc_cciss)
563 return;
564 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
565 S_IROTH, proc_cciss,
566 &cciss_proc_fops, h);
567 }
568 #endif /* CONFIG_PROC_FS */
569
570 #define MAX_PRODUCT_NAME_LEN 19
571
572 #define to_hba(n) container_of(n, struct ctlr_info, dev)
573 #define to_drv(n) container_of(n, drive_info_struct, dev)
574
575 /* List of controllers which cannot be hard reset on kexec with reset_devices */
576 static u32 unresettable_controller[] = {
577 0x324a103C, /* Smart Array P712m */
578 0x324b103C, /* SmartArray P711m */
579 0x3223103C, /* Smart Array P800 */
580 0x3234103C, /* Smart Array P400 */
581 0x3235103C, /* Smart Array P400i */
582 0x3211103C, /* Smart Array E200i */
583 0x3212103C, /* Smart Array E200 */
584 0x3213103C, /* Smart Array E200i */
585 0x3214103C, /* Smart Array E200i */
586 0x3215103C, /* Smart Array E200i */
587 0x3237103C, /* Smart Array E500 */
588 0x323D103C, /* Smart Array P700m */
589 0x409C0E11, /* Smart Array 6400 */
590 0x409D0E11, /* Smart Array 6400 EM */
591 };
592
593 /* List of controllers which cannot even be soft reset */
594 static u32 soft_unresettable_controller[] = {
595 0x409C0E11, /* Smart Array 6400 */
596 0x409D0E11, /* Smart Array 6400 EM */
597 };
598
599 static int ctlr_is_hard_resettable(u32 board_id)
600 {
601 int i;
602
603 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
604 if (unresettable_controller[i] == board_id)
605 return 0;
606 return 1;
607 }
608
609 static int ctlr_is_soft_resettable(u32 board_id)
610 {
611 int i;
612
613 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
614 if (soft_unresettable_controller[i] == board_id)
615 return 0;
616 return 1;
617 }
618
619 static int ctlr_is_resettable(u32 board_id)
620 {
621 return ctlr_is_hard_resettable(board_id) ||
622 ctlr_is_soft_resettable(board_id);
623 }
624
625 static ssize_t host_show_resettable(struct device *dev,
626 struct device_attribute *attr,
627 char *buf)
628 {
629 struct ctlr_info *h = to_hba(dev);
630
631 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
632 }
633 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
634
635 static ssize_t host_store_rescan(struct device *dev,
636 struct device_attribute *attr,
637 const char *buf, size_t count)
638 {
639 struct ctlr_info *h = to_hba(dev);
640
641 add_to_scan_list(h);
642 wake_up_process(cciss_scan_thread);
643 wait_for_completion_interruptible(&h->scan_wait);
644
645 return count;
646 }
647 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
648
649 static ssize_t host_show_transport_mode(struct device *dev,
650 struct device_attribute *attr,
651 char *buf)
652 {
653 struct ctlr_info *h = to_hba(dev);
654
655 return snprintf(buf, 20, "%s\n",
656 h->transMethod & CFGTBL_Trans_Performant ?
657 "performant" : "simple");
658 }
659 static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
660
661 static ssize_t dev_show_unique_id(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664 {
665 drive_info_struct *drv = to_drv(dev);
666 struct ctlr_info *h = to_hba(drv->dev.parent);
667 __u8 sn[16];
668 unsigned long flags;
669 int ret = 0;
670
671 spin_lock_irqsave(&h->lock, flags);
672 if (h->busy_configuring)
673 ret = -EBUSY;
674 else
675 memcpy(sn, drv->serial_no, sizeof(sn));
676 spin_unlock_irqrestore(&h->lock, flags);
677
678 if (ret)
679 return ret;
680 else
681 return snprintf(buf, 16 * 2 + 2,
682 "%02X%02X%02X%02X%02X%02X%02X%02X"
683 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
684 sn[0], sn[1], sn[2], sn[3],
685 sn[4], sn[5], sn[6], sn[7],
686 sn[8], sn[9], sn[10], sn[11],
687 sn[12], sn[13], sn[14], sn[15]);
688 }
689 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
690
691 static ssize_t dev_show_vendor(struct device *dev,
692 struct device_attribute *attr,
693 char *buf)
694 {
695 drive_info_struct *drv = to_drv(dev);
696 struct ctlr_info *h = to_hba(drv->dev.parent);
697 char vendor[VENDOR_LEN + 1];
698 unsigned long flags;
699 int ret = 0;
700
701 spin_lock_irqsave(&h->lock, flags);
702 if (h->busy_configuring)
703 ret = -EBUSY;
704 else
705 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
706 spin_unlock_irqrestore(&h->lock, flags);
707
708 if (ret)
709 return ret;
710 else
711 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
712 }
713 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
714
715 static ssize_t dev_show_model(struct device *dev,
716 struct device_attribute *attr,
717 char *buf)
718 {
719 drive_info_struct *drv = to_drv(dev);
720 struct ctlr_info *h = to_hba(drv->dev.parent);
721 char model[MODEL_LEN + 1];
722 unsigned long flags;
723 int ret = 0;
724
725 spin_lock_irqsave(&h->lock, flags);
726 if (h->busy_configuring)
727 ret = -EBUSY;
728 else
729 memcpy(model, drv->model, MODEL_LEN + 1);
730 spin_unlock_irqrestore(&h->lock, flags);
731
732 if (ret)
733 return ret;
734 else
735 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
736 }
737 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
738
739 static ssize_t dev_show_rev(struct device *dev,
740 struct device_attribute *attr,
741 char *buf)
742 {
743 drive_info_struct *drv = to_drv(dev);
744 struct ctlr_info *h = to_hba(drv->dev.parent);
745 char rev[REV_LEN + 1];
746 unsigned long flags;
747 int ret = 0;
748
749 spin_lock_irqsave(&h->lock, flags);
750 if (h->busy_configuring)
751 ret = -EBUSY;
752 else
753 memcpy(rev, drv->rev, REV_LEN + 1);
754 spin_unlock_irqrestore(&h->lock, flags);
755
756 if (ret)
757 return ret;
758 else
759 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
760 }
761 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
762
763 static ssize_t cciss_show_lunid(struct device *dev,
764 struct device_attribute *attr, char *buf)
765 {
766 drive_info_struct *drv = to_drv(dev);
767 struct ctlr_info *h = to_hba(drv->dev.parent);
768 unsigned long flags;
769 unsigned char lunid[8];
770
771 spin_lock_irqsave(&h->lock, flags);
772 if (h->busy_configuring) {
773 spin_unlock_irqrestore(&h->lock, flags);
774 return -EBUSY;
775 }
776 if (!drv->heads) {
777 spin_unlock_irqrestore(&h->lock, flags);
778 return -ENOTTY;
779 }
780 memcpy(lunid, drv->LunID, sizeof(lunid));
781 spin_unlock_irqrestore(&h->lock, flags);
782 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
783 lunid[0], lunid[1], lunid[2], lunid[3],
784 lunid[4], lunid[5], lunid[6], lunid[7]);
785 }
786 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
787
788 static ssize_t cciss_show_raid_level(struct device *dev,
789 struct device_attribute *attr, char *buf)
790 {
791 drive_info_struct *drv = to_drv(dev);
792 struct ctlr_info *h = to_hba(drv->dev.parent);
793 int raid;
794 unsigned long flags;
795
796 spin_lock_irqsave(&h->lock, flags);
797 if (h->busy_configuring) {
798 spin_unlock_irqrestore(&h->lock, flags);
799 return -EBUSY;
800 }
801 raid = drv->raid_level;
802 spin_unlock_irqrestore(&h->lock, flags);
803 if (raid < 0 || raid > RAID_UNKNOWN)
804 raid = RAID_UNKNOWN;
805
806 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
807 raid_label[raid]);
808 }
809 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
810
811 static ssize_t cciss_show_usage_count(struct device *dev,
812 struct device_attribute *attr, char *buf)
813 {
814 drive_info_struct *drv = to_drv(dev);
815 struct ctlr_info *h = to_hba(drv->dev.parent);
816 unsigned long flags;
817 int count;
818
819 spin_lock_irqsave(&h->lock, flags);
820 if (h->busy_configuring) {
821 spin_unlock_irqrestore(&h->lock, flags);
822 return -EBUSY;
823 }
824 count = drv->usage_count;
825 spin_unlock_irqrestore(&h->lock, flags);
826 return snprintf(buf, 20, "%d\n", count);
827 }
828 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
829
830 static struct attribute *cciss_host_attrs[] = {
831 &dev_attr_rescan.attr,
832 &dev_attr_resettable.attr,
833 &dev_attr_transport_mode.attr,
834 NULL
835 };
836
837 static struct attribute_group cciss_host_attr_group = {
838 .attrs = cciss_host_attrs,
839 };
840
841 static const struct attribute_group *cciss_host_attr_groups[] = {
842 &cciss_host_attr_group,
843 NULL
844 };
845
846 static struct device_type cciss_host_type = {
847 .name = "cciss_host",
848 .groups = cciss_host_attr_groups,
849 .release = cciss_hba_release,
850 };
851
852 static struct attribute *cciss_dev_attrs[] = {
853 &dev_attr_unique_id.attr,
854 &dev_attr_model.attr,
855 &dev_attr_vendor.attr,
856 &dev_attr_rev.attr,
857 &dev_attr_lunid.attr,
858 &dev_attr_raid_level.attr,
859 &dev_attr_usage_count.attr,
860 NULL
861 };
862
863 static struct attribute_group cciss_dev_attr_group = {
864 .attrs = cciss_dev_attrs,
865 };
866
867 static const struct attribute_group *cciss_dev_attr_groups[] = {
868 &cciss_dev_attr_group,
869 NULL
870 };
871
872 static struct device_type cciss_dev_type = {
873 .name = "cciss_device",
874 .groups = cciss_dev_attr_groups,
875 .release = cciss_device_release,
876 };
877
878 static struct bus_type cciss_bus_type = {
879 .name = "cciss",
880 };
881
882 /*
883 * cciss_hba_release is called when the reference count
884 * of h->dev goes to zero.
885 */
886 static void cciss_hba_release(struct device *dev)
887 {
888 /*
889 * nothing to do, but need this to avoid a warning
890 * about not having a release handler from lib/kref.c.
891 */
892 }
893
894 /*
895 * Initialize sysfs entry for each controller. This sets up and registers
896 * the 'cciss#' directory for each individual controller under
897 * /sys/bus/pci/devices/<dev>/.
898 */
899 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
900 {
901 device_initialize(&h->dev);
902 h->dev.type = &cciss_host_type;
903 h->dev.bus = &cciss_bus_type;
904 dev_set_name(&h->dev, "%s", h->devname);
905 h->dev.parent = &h->pdev->dev;
906
907 return device_add(&h->dev);
908 }
909
910 /*
911 * Remove sysfs entries for an hba.
912 */
913 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
914 {
915 device_del(&h->dev);
916 put_device(&h->dev); /* final put. */
917 }
918
919 /* cciss_device_release is called when the reference count
920 * of h->drv[x]dev goes to zero.
921 */
922 static void cciss_device_release(struct device *dev)
923 {
924 drive_info_struct *drv = to_drv(dev);
925 kfree(drv);
926 }
927
928 /*
929 * Initialize sysfs for each logical drive. This sets up and registers
930 * the 'c#d#' directory for each individual logical drive under
931 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
932 * /sys/block/cciss!c#d# to this entry.
933 */
934 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
935 int drv_index)
936 {
937 struct device *dev;
938
939 if (h->drv[drv_index]->device_initialized)
940 return 0;
941
942 dev = &h->drv[drv_index]->dev;
943 device_initialize(dev);
944 dev->type = &cciss_dev_type;
945 dev->bus = &cciss_bus_type;
946 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
947 dev->parent = &h->dev;
948 h->drv[drv_index]->device_initialized = 1;
949 return device_add(dev);
950 }
951
952 /*
953 * Remove sysfs entries for a logical drive.
954 */
955 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
956 int ctlr_exiting)
957 {
958 struct device *dev = &h->drv[drv_index]->dev;
959
960 /* special case for c*d0, we only destroy it on controller exit */
961 if (drv_index == 0 && !ctlr_exiting)
962 return;
963
964 device_del(dev);
965 put_device(dev); /* the "final" put. */
966 h->drv[drv_index] = NULL;
967 }
968
969 /*
970 * For operations that cannot sleep, a command block is allocated at init,
971 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
972 * which ones are free or in use.
973 */
974 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
975 {
976 CommandList_struct *c;
977 int i;
978 u64bit temp64;
979 dma_addr_t cmd_dma_handle, err_dma_handle;
980
981 do {
982 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
983 if (i == h->nr_cmds)
984 return NULL;
985 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
986 c = h->cmd_pool + i;
987 memset(c, 0, sizeof(CommandList_struct));
988 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
989 c->err_info = h->errinfo_pool + i;
990 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
991 err_dma_handle = h->errinfo_pool_dhandle
992 + i * sizeof(ErrorInfo_struct);
993 h->nr_allocs++;
994
995 c->cmdindex = i;
996
997 INIT_LIST_HEAD(&c->list);
998 c->busaddr = (__u32) cmd_dma_handle;
999 temp64.val = (__u64) err_dma_handle;
1000 c->ErrDesc.Addr.lower = temp64.val32.lower;
1001 c->ErrDesc.Addr.upper = temp64.val32.upper;
1002 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1003
1004 c->ctlr = h->ctlr;
1005 return c;
1006 }
1007
1008 /* allocate a command using pci_alloc_consistent, used for ioctls,
1009 * etc., not for the main i/o path.
1010 */
1011 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1012 {
1013 CommandList_struct *c;
1014 u64bit temp64;
1015 dma_addr_t cmd_dma_handle, err_dma_handle;
1016
1017 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1018 sizeof(CommandList_struct), &cmd_dma_handle);
1019 if (c == NULL)
1020 return NULL;
1021 memset(c, 0, sizeof(CommandList_struct));
1022
1023 c->cmdindex = -1;
1024
1025 c->err_info = (ErrorInfo_struct *)
1026 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1027 &err_dma_handle);
1028
1029 if (c->err_info == NULL) {
1030 pci_free_consistent(h->pdev,
1031 sizeof(CommandList_struct), c, cmd_dma_handle);
1032 return NULL;
1033 }
1034 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1035
1036 INIT_LIST_HEAD(&c->list);
1037 c->busaddr = (__u32) cmd_dma_handle;
1038 temp64.val = (__u64) err_dma_handle;
1039 c->ErrDesc.Addr.lower = temp64.val32.lower;
1040 c->ErrDesc.Addr.upper = temp64.val32.upper;
1041 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1042
1043 c->ctlr = h->ctlr;
1044 return c;
1045 }
1046
1047 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1048 {
1049 int i;
1050
1051 i = c - h->cmd_pool;
1052 clear_bit(i, h->cmd_pool_bits);
1053 h->nr_frees++;
1054 }
1055
1056 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1057 {
1058 u64bit temp64;
1059
1060 temp64.val32.lower = c->ErrDesc.Addr.lower;
1061 temp64.val32.upper = c->ErrDesc.Addr.upper;
1062 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1063 c->err_info, (dma_addr_t) temp64.val);
1064 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1065 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1066 }
1067
1068 static inline ctlr_info_t *get_host(struct gendisk *disk)
1069 {
1070 return disk->queue->queuedata;
1071 }
1072
1073 static inline drive_info_struct *get_drv(struct gendisk *disk)
1074 {
1075 return disk->private_data;
1076 }
1077
1078 /*
1079 * Open. Make sure the device is really there.
1080 */
1081 static int cciss_open(struct block_device *bdev, fmode_t mode)
1082 {
1083 ctlr_info_t *h = get_host(bdev->bd_disk);
1084 drive_info_struct *drv = get_drv(bdev->bd_disk);
1085
1086 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1087 if (drv->busy_configuring)
1088 return -EBUSY;
1089 /*
1090 * Root is allowed to open raw volume zero even if it's not configured
1091 * so array config can still work. Root is also allowed to open any
1092 * volume that has a LUN ID, so it can issue IOCTL to reread the
1093 * disk information. I don't think I really like this
1094 * but I'm already using way to many device nodes to claim another one
1095 * for "raw controller".
1096 */
1097 if (drv->heads == 0) {
1098 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1099 /* if not node 0 make sure it is a partition = 0 */
1100 if (MINOR(bdev->bd_dev) & 0x0f) {
1101 return -ENXIO;
1102 /* if it is, make sure we have a LUN ID */
1103 } else if (memcmp(drv->LunID, CTLR_LUNID,
1104 sizeof(drv->LunID))) {
1105 return -ENXIO;
1106 }
1107 }
1108 if (!capable(CAP_SYS_ADMIN))
1109 return -EPERM;
1110 }
1111 drv->usage_count++;
1112 h->usage_count++;
1113 return 0;
1114 }
1115
1116 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1117 {
1118 int ret;
1119
1120 mutex_lock(&cciss_mutex);
1121 ret = cciss_open(bdev, mode);
1122 mutex_unlock(&cciss_mutex);
1123
1124 return ret;
1125 }
1126
1127 /*
1128 * Close. Sync first.
1129 */
1130 static void cciss_release(struct gendisk *disk, fmode_t mode)
1131 {
1132 ctlr_info_t *h;
1133 drive_info_struct *drv;
1134
1135 mutex_lock(&cciss_mutex);
1136 h = get_host(disk);
1137 drv = get_drv(disk);
1138 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1139 drv->usage_count--;
1140 h->usage_count--;
1141 mutex_unlock(&cciss_mutex);
1142 }
1143
1144 #ifdef CONFIG_COMPAT
1145
1146 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1147 unsigned cmd, unsigned long arg);
1148 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1149 unsigned cmd, unsigned long arg);
1150
1151 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1152 unsigned cmd, unsigned long arg)
1153 {
1154 switch (cmd) {
1155 case CCISS_GETPCIINFO:
1156 case CCISS_GETINTINFO:
1157 case CCISS_SETINTINFO:
1158 case CCISS_GETNODENAME:
1159 case CCISS_SETNODENAME:
1160 case CCISS_GETHEARTBEAT:
1161 case CCISS_GETBUSTYPES:
1162 case CCISS_GETFIRMVER:
1163 case CCISS_GETDRIVVER:
1164 case CCISS_REVALIDVOLS:
1165 case CCISS_DEREGDISK:
1166 case CCISS_REGNEWDISK:
1167 case CCISS_REGNEWD:
1168 case CCISS_RESCANDISK:
1169 case CCISS_GETLUNINFO:
1170 return cciss_ioctl(bdev, mode, cmd, arg);
1171
1172 case CCISS_PASSTHRU32:
1173 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1174 case CCISS_BIG_PASSTHRU32:
1175 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1176
1177 default:
1178 return -ENOIOCTLCMD;
1179 }
1180 }
1181
1182 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1183 unsigned cmd, unsigned long arg)
1184 {
1185 IOCTL32_Command_struct __user *arg32 =
1186 (IOCTL32_Command_struct __user *) arg;
1187 IOCTL_Command_struct arg64;
1188 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1189 int err;
1190 u32 cp;
1191
1192 memset(&arg64, 0, sizeof(arg64));
1193 err = 0;
1194 err |=
1195 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1196 sizeof(arg64.LUN_info));
1197 err |=
1198 copy_from_user(&arg64.Request, &arg32->Request,
1199 sizeof(arg64.Request));
1200 err |=
1201 copy_from_user(&arg64.error_info, &arg32->error_info,
1202 sizeof(arg64.error_info));
1203 err |= get_user(arg64.buf_size, &arg32->buf_size);
1204 err |= get_user(cp, &arg32->buf);
1205 arg64.buf = compat_ptr(cp);
1206 err |= copy_to_user(p, &arg64, sizeof(arg64));
1207
1208 if (err)
1209 return -EFAULT;
1210
1211 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1212 if (err)
1213 return err;
1214 err |=
1215 copy_in_user(&arg32->error_info, &p->error_info,
1216 sizeof(arg32->error_info));
1217 if (err)
1218 return -EFAULT;
1219 return err;
1220 }
1221
1222 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1223 unsigned cmd, unsigned long arg)
1224 {
1225 BIG_IOCTL32_Command_struct __user *arg32 =
1226 (BIG_IOCTL32_Command_struct __user *) arg;
1227 BIG_IOCTL_Command_struct arg64;
1228 BIG_IOCTL_Command_struct __user *p =
1229 compat_alloc_user_space(sizeof(arg64));
1230 int err;
1231 u32 cp;
1232
1233 memset(&arg64, 0, sizeof(arg64));
1234 err = 0;
1235 err |=
1236 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1237 sizeof(arg64.LUN_info));
1238 err |=
1239 copy_from_user(&arg64.Request, &arg32->Request,
1240 sizeof(arg64.Request));
1241 err |=
1242 copy_from_user(&arg64.error_info, &arg32->error_info,
1243 sizeof(arg64.error_info));
1244 err |= get_user(arg64.buf_size, &arg32->buf_size);
1245 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1246 err |= get_user(cp, &arg32->buf);
1247 arg64.buf = compat_ptr(cp);
1248 err |= copy_to_user(p, &arg64, sizeof(arg64));
1249
1250 if (err)
1251 return -EFAULT;
1252
1253 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1254 if (err)
1255 return err;
1256 err |=
1257 copy_in_user(&arg32->error_info, &p->error_info,
1258 sizeof(arg32->error_info));
1259 if (err)
1260 return -EFAULT;
1261 return err;
1262 }
1263 #endif
1264
1265 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1266 {
1267 drive_info_struct *drv = get_drv(bdev->bd_disk);
1268
1269 if (!drv->cylinders)
1270 return -ENXIO;
1271
1272 geo->heads = drv->heads;
1273 geo->sectors = drv->sectors;
1274 geo->cylinders = drv->cylinders;
1275 return 0;
1276 }
1277
1278 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1279 {
1280 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1281 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1282 (void)check_for_unit_attention(h, c);
1283 }
1284
1285 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1286 {
1287 cciss_pci_info_struct pciinfo;
1288
1289 if (!argp)
1290 return -EINVAL;
1291 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1292 pciinfo.bus = h->pdev->bus->number;
1293 pciinfo.dev_fn = h->pdev->devfn;
1294 pciinfo.board_id = h->board_id;
1295 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1296 return -EFAULT;
1297 return 0;
1298 }
1299
1300 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1301 {
1302 cciss_coalint_struct intinfo;
1303 unsigned long flags;
1304
1305 if (!argp)
1306 return -EINVAL;
1307 spin_lock_irqsave(&h->lock, flags);
1308 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1309 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1310 spin_unlock_irqrestore(&h->lock, flags);
1311 if (copy_to_user
1312 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1313 return -EFAULT;
1314 return 0;
1315 }
1316
1317 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1318 {
1319 cciss_coalint_struct intinfo;
1320 unsigned long flags;
1321 int i;
1322
1323 if (!argp)
1324 return -EINVAL;
1325 if (!capable(CAP_SYS_ADMIN))
1326 return -EPERM;
1327 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1328 return -EFAULT;
1329 if ((intinfo.delay == 0) && (intinfo.count == 0))
1330 return -EINVAL;
1331 spin_lock_irqsave(&h->lock, flags);
1332 /* Update the field, and then ring the doorbell */
1333 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1334 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1335 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1336
1337 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1338 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1339 break;
1340 udelay(1000); /* delay and try again */
1341 }
1342 spin_unlock_irqrestore(&h->lock, flags);
1343 if (i >= MAX_IOCTL_CONFIG_WAIT)
1344 return -EAGAIN;
1345 return 0;
1346 }
1347
1348 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1349 {
1350 NodeName_type NodeName;
1351 unsigned long flags;
1352 int i;
1353
1354 if (!argp)
1355 return -EINVAL;
1356 spin_lock_irqsave(&h->lock, flags);
1357 for (i = 0; i < 16; i++)
1358 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1359 spin_unlock_irqrestore(&h->lock, flags);
1360 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1361 return -EFAULT;
1362 return 0;
1363 }
1364
1365 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1366 {
1367 NodeName_type NodeName;
1368 unsigned long flags;
1369 int i;
1370
1371 if (!argp)
1372 return -EINVAL;
1373 if (!capable(CAP_SYS_ADMIN))
1374 return -EPERM;
1375 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1376 return -EFAULT;
1377 spin_lock_irqsave(&h->lock, flags);
1378 /* Update the field, and then ring the doorbell */
1379 for (i = 0; i < 16; i++)
1380 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1381 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1382 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1383 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1384 break;
1385 udelay(1000); /* delay and try again */
1386 }
1387 spin_unlock_irqrestore(&h->lock, flags);
1388 if (i >= MAX_IOCTL_CONFIG_WAIT)
1389 return -EAGAIN;
1390 return 0;
1391 }
1392
1393 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1394 {
1395 Heartbeat_type heartbeat;
1396 unsigned long flags;
1397
1398 if (!argp)
1399 return -EINVAL;
1400 spin_lock_irqsave(&h->lock, flags);
1401 heartbeat = readl(&h->cfgtable->HeartBeat);
1402 spin_unlock_irqrestore(&h->lock, flags);
1403 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1404 return -EFAULT;
1405 return 0;
1406 }
1407
1408 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1409 {
1410 BusTypes_type BusTypes;
1411 unsigned long flags;
1412
1413 if (!argp)
1414 return -EINVAL;
1415 spin_lock_irqsave(&h->lock, flags);
1416 BusTypes = readl(&h->cfgtable->BusTypes);
1417 spin_unlock_irqrestore(&h->lock, flags);
1418 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1419 return -EFAULT;
1420 return 0;
1421 }
1422
1423 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1424 {
1425 FirmwareVer_type firmware;
1426
1427 if (!argp)
1428 return -EINVAL;
1429 memcpy(firmware, h->firm_ver, 4);
1430
1431 if (copy_to_user
1432 (argp, firmware, sizeof(FirmwareVer_type)))
1433 return -EFAULT;
1434 return 0;
1435 }
1436
1437 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1438 {
1439 DriverVer_type DriverVer = DRIVER_VERSION;
1440
1441 if (!argp)
1442 return -EINVAL;
1443 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1444 return -EFAULT;
1445 return 0;
1446 }
1447
1448 static int cciss_getluninfo(ctlr_info_t *h,
1449 struct gendisk *disk, void __user *argp)
1450 {
1451 LogvolInfo_struct luninfo;
1452 drive_info_struct *drv = get_drv(disk);
1453
1454 if (!argp)
1455 return -EINVAL;
1456 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1457 luninfo.num_opens = drv->usage_count;
1458 luninfo.num_parts = 0;
1459 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1460 return -EFAULT;
1461 return 0;
1462 }
1463
1464 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1465 {
1466 IOCTL_Command_struct iocommand;
1467 CommandList_struct *c;
1468 char *buff = NULL;
1469 u64bit temp64;
1470 DECLARE_COMPLETION_ONSTACK(wait);
1471
1472 if (!argp)
1473 return -EINVAL;
1474
1475 if (!capable(CAP_SYS_RAWIO))
1476 return -EPERM;
1477
1478 if (copy_from_user
1479 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1480 return -EFAULT;
1481 if ((iocommand.buf_size < 1) &&
1482 (iocommand.Request.Type.Direction != XFER_NONE)) {
1483 return -EINVAL;
1484 }
1485 if (iocommand.buf_size > 0) {
1486 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1487 if (buff == NULL)
1488 return -EFAULT;
1489 }
1490 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1491 /* Copy the data into the buffer we created */
1492 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1493 kfree(buff);
1494 return -EFAULT;
1495 }
1496 } else {
1497 memset(buff, 0, iocommand.buf_size);
1498 }
1499 c = cmd_special_alloc(h);
1500 if (!c) {
1501 kfree(buff);
1502 return -ENOMEM;
1503 }
1504 /* Fill in the command type */
1505 c->cmd_type = CMD_IOCTL_PEND;
1506 /* Fill in Command Header */
1507 c->Header.ReplyQueue = 0; /* unused in simple mode */
1508 if (iocommand.buf_size > 0) { /* buffer to fill */
1509 c->Header.SGList = 1;
1510 c->Header.SGTotal = 1;
1511 } else { /* no buffers to fill */
1512 c->Header.SGList = 0;
1513 c->Header.SGTotal = 0;
1514 }
1515 c->Header.LUN = iocommand.LUN_info;
1516 /* use the kernel address the cmd block for tag */
1517 c->Header.Tag.lower = c->busaddr;
1518
1519 /* Fill in Request block */
1520 c->Request = iocommand.Request;
1521
1522 /* Fill in the scatter gather information */
1523 if (iocommand.buf_size > 0) {
1524 temp64.val = pci_map_single(h->pdev, buff,
1525 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1526 c->SG[0].Addr.lower = temp64.val32.lower;
1527 c->SG[0].Addr.upper = temp64.val32.upper;
1528 c->SG[0].Len = iocommand.buf_size;
1529 c->SG[0].Ext = 0; /* we are not chaining */
1530 }
1531 c->waiting = &wait;
1532
1533 enqueue_cmd_and_start_io(h, c);
1534 wait_for_completion(&wait);
1535
1536 /* unlock the buffers from DMA */
1537 temp64.val32.lower = c->SG[0].Addr.lower;
1538 temp64.val32.upper = c->SG[0].Addr.upper;
1539 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1540 PCI_DMA_BIDIRECTIONAL);
1541 check_ioctl_unit_attention(h, c);
1542
1543 /* Copy the error information out */
1544 iocommand.error_info = *(c->err_info);
1545 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1546 kfree(buff);
1547 cmd_special_free(h, c);
1548 return -EFAULT;
1549 }
1550
1551 if (iocommand.Request.Type.Direction == XFER_READ) {
1552 /* Copy the data out of the buffer we created */
1553 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1554 kfree(buff);
1555 cmd_special_free(h, c);
1556 return -EFAULT;
1557 }
1558 }
1559 kfree(buff);
1560 cmd_special_free(h, c);
1561 return 0;
1562 }
1563
1564 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1565 {
1566 BIG_IOCTL_Command_struct *ioc;
1567 CommandList_struct *c;
1568 unsigned char **buff = NULL;
1569 int *buff_size = NULL;
1570 u64bit temp64;
1571 BYTE sg_used = 0;
1572 int status = 0;
1573 int i;
1574 DECLARE_COMPLETION_ONSTACK(wait);
1575 __u32 left;
1576 __u32 sz;
1577 BYTE __user *data_ptr;
1578
1579 if (!argp)
1580 return -EINVAL;
1581 if (!capable(CAP_SYS_RAWIO))
1582 return -EPERM;
1583 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1584 if (!ioc) {
1585 status = -ENOMEM;
1586 goto cleanup1;
1587 }
1588 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1589 status = -EFAULT;
1590 goto cleanup1;
1591 }
1592 if ((ioc->buf_size < 1) &&
1593 (ioc->Request.Type.Direction != XFER_NONE)) {
1594 status = -EINVAL;
1595 goto cleanup1;
1596 }
1597 /* Check kmalloc limits using all SGs */
1598 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1599 status = -EINVAL;
1600 goto cleanup1;
1601 }
1602 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1603 status = -EINVAL;
1604 goto cleanup1;
1605 }
1606 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1607 if (!buff) {
1608 status = -ENOMEM;
1609 goto cleanup1;
1610 }
1611 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1612 if (!buff_size) {
1613 status = -ENOMEM;
1614 goto cleanup1;
1615 }
1616 left = ioc->buf_size;
1617 data_ptr = ioc->buf;
1618 while (left) {
1619 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1620 buff_size[sg_used] = sz;
1621 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1622 if (buff[sg_used] == NULL) {
1623 status = -ENOMEM;
1624 goto cleanup1;
1625 }
1626 if (ioc->Request.Type.Direction == XFER_WRITE) {
1627 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1628 status = -EFAULT;
1629 goto cleanup1;
1630 }
1631 } else {
1632 memset(buff[sg_used], 0, sz);
1633 }
1634 left -= sz;
1635 data_ptr += sz;
1636 sg_used++;
1637 }
1638 c = cmd_special_alloc(h);
1639 if (!c) {
1640 status = -ENOMEM;
1641 goto cleanup1;
1642 }
1643 c->cmd_type = CMD_IOCTL_PEND;
1644 c->Header.ReplyQueue = 0;
1645 c->Header.SGList = sg_used;
1646 c->Header.SGTotal = sg_used;
1647 c->Header.LUN = ioc->LUN_info;
1648 c->Header.Tag.lower = c->busaddr;
1649
1650 c->Request = ioc->Request;
1651 for (i = 0; i < sg_used; i++) {
1652 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1653 PCI_DMA_BIDIRECTIONAL);
1654 c->SG[i].Addr.lower = temp64.val32.lower;
1655 c->SG[i].Addr.upper = temp64.val32.upper;
1656 c->SG[i].Len = buff_size[i];
1657 c->SG[i].Ext = 0; /* we are not chaining */
1658 }
1659 c->waiting = &wait;
1660 enqueue_cmd_and_start_io(h, c);
1661 wait_for_completion(&wait);
1662 /* unlock the buffers from DMA */
1663 for (i = 0; i < sg_used; i++) {
1664 temp64.val32.lower = c->SG[i].Addr.lower;
1665 temp64.val32.upper = c->SG[i].Addr.upper;
1666 pci_unmap_single(h->pdev,
1667 (dma_addr_t) temp64.val, buff_size[i],
1668 PCI_DMA_BIDIRECTIONAL);
1669 }
1670 check_ioctl_unit_attention(h, c);
1671 /* Copy the error information out */
1672 ioc->error_info = *(c->err_info);
1673 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1674 cmd_special_free(h, c);
1675 status = -EFAULT;
1676 goto cleanup1;
1677 }
1678 if (ioc->Request.Type.Direction == XFER_READ) {
1679 /* Copy the data out of the buffer we created */
1680 BYTE __user *ptr = ioc->buf;
1681 for (i = 0; i < sg_used; i++) {
1682 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1683 cmd_special_free(h, c);
1684 status = -EFAULT;
1685 goto cleanup1;
1686 }
1687 ptr += buff_size[i];
1688 }
1689 }
1690 cmd_special_free(h, c);
1691 status = 0;
1692 cleanup1:
1693 if (buff) {
1694 for (i = 0; i < sg_used; i++)
1695 kfree(buff[i]);
1696 kfree(buff);
1697 }
1698 kfree(buff_size);
1699 kfree(ioc);
1700 return status;
1701 }
1702
1703 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1704 unsigned int cmd, unsigned long arg)
1705 {
1706 struct gendisk *disk = bdev->bd_disk;
1707 ctlr_info_t *h = get_host(disk);
1708 void __user *argp = (void __user *)arg;
1709
1710 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1711 cmd, arg);
1712 switch (cmd) {
1713 case CCISS_GETPCIINFO:
1714 return cciss_getpciinfo(h, argp);
1715 case CCISS_GETINTINFO:
1716 return cciss_getintinfo(h, argp);
1717 case CCISS_SETINTINFO:
1718 return cciss_setintinfo(h, argp);
1719 case CCISS_GETNODENAME:
1720 return cciss_getnodename(h, argp);
1721 case CCISS_SETNODENAME:
1722 return cciss_setnodename(h, argp);
1723 case CCISS_GETHEARTBEAT:
1724 return cciss_getheartbeat(h, argp);
1725 case CCISS_GETBUSTYPES:
1726 return cciss_getbustypes(h, argp);
1727 case CCISS_GETFIRMVER:
1728 return cciss_getfirmver(h, argp);
1729 case CCISS_GETDRIVVER:
1730 return cciss_getdrivver(h, argp);
1731 case CCISS_DEREGDISK:
1732 case CCISS_REGNEWD:
1733 case CCISS_REVALIDVOLS:
1734 return rebuild_lun_table(h, 0, 1);
1735 case CCISS_GETLUNINFO:
1736 return cciss_getluninfo(h, disk, argp);
1737 case CCISS_PASSTHRU:
1738 return cciss_passthru(h, argp);
1739 case CCISS_BIG_PASSTHRU:
1740 return cciss_bigpassthru(h, argp);
1741
1742 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1743 /* very meaningful for cciss. SG_IO is the main one people want. */
1744
1745 case SG_GET_VERSION_NUM:
1746 case SG_SET_TIMEOUT:
1747 case SG_GET_TIMEOUT:
1748 case SG_GET_RESERVED_SIZE:
1749 case SG_SET_RESERVED_SIZE:
1750 case SG_EMULATED_HOST:
1751 case SG_IO:
1752 case SCSI_IOCTL_SEND_COMMAND:
1753 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1754
1755 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1756 /* they aren't a good fit for cciss, as CD-ROMs are */
1757 /* not supported, and we don't have any bus/target/lun */
1758 /* which we present to the kernel. */
1759
1760 case CDROM_SEND_PACKET:
1761 case CDROMCLOSETRAY:
1762 case CDROMEJECT:
1763 case SCSI_IOCTL_GET_IDLUN:
1764 case SCSI_IOCTL_GET_BUS_NUMBER:
1765 default:
1766 return -ENOTTY;
1767 }
1768 }
1769
1770 static void cciss_check_queues(ctlr_info_t *h)
1771 {
1772 int start_queue = h->next_to_run;
1773 int i;
1774
1775 /* check to see if we have maxed out the number of commands that can
1776 * be placed on the queue. If so then exit. We do this check here
1777 * in case the interrupt we serviced was from an ioctl and did not
1778 * free any new commands.
1779 */
1780 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1781 return;
1782
1783 /* We have room on the queue for more commands. Now we need to queue
1784 * them up. We will also keep track of the next queue to run so
1785 * that every queue gets a chance to be started first.
1786 */
1787 for (i = 0; i < h->highest_lun + 1; i++) {
1788 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1789 /* make sure the disk has been added and the drive is real
1790 * because this can be called from the middle of init_one.
1791 */
1792 if (!h->drv[curr_queue])
1793 continue;
1794 if (!(h->drv[curr_queue]->queue) ||
1795 !(h->drv[curr_queue]->heads))
1796 continue;
1797 blk_start_queue(h->gendisk[curr_queue]->queue);
1798
1799 /* check to see if we have maxed out the number of commands
1800 * that can be placed on the queue.
1801 */
1802 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1803 if (curr_queue == start_queue) {
1804 h->next_to_run =
1805 (start_queue + 1) % (h->highest_lun + 1);
1806 break;
1807 } else {
1808 h->next_to_run = curr_queue;
1809 break;
1810 }
1811 }
1812 }
1813 }
1814
1815 static void cciss_softirq_done(struct request *rq)
1816 {
1817 CommandList_struct *c = rq->completion_data;
1818 ctlr_info_t *h = hba[c->ctlr];
1819 SGDescriptor_struct *curr_sg = c->SG;
1820 u64bit temp64;
1821 unsigned long flags;
1822 int i, ddir;
1823 int sg_index = 0;
1824
1825 if (c->Request.Type.Direction == XFER_READ)
1826 ddir = PCI_DMA_FROMDEVICE;
1827 else
1828 ddir = PCI_DMA_TODEVICE;
1829
1830 /* command did not need to be retried */
1831 /* unmap the DMA mapping for all the scatter gather elements */
1832 for (i = 0; i < c->Header.SGList; i++) {
1833 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1834 cciss_unmap_sg_chain_block(h, c);
1835 /* Point to the next block */
1836 curr_sg = h->cmd_sg_list[c->cmdindex];
1837 sg_index = 0;
1838 }
1839 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1840 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1841 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1842 ddir);
1843 ++sg_index;
1844 }
1845
1846 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1847
1848 /* set the residual count for pc requests */
1849 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1850 rq->resid_len = c->err_info->ResidualCnt;
1851
1852 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1853
1854 spin_lock_irqsave(&h->lock, flags);
1855 cmd_free(h, c);
1856 cciss_check_queues(h);
1857 spin_unlock_irqrestore(&h->lock, flags);
1858 }
1859
1860 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1861 unsigned char scsi3addr[], uint32_t log_unit)
1862 {
1863 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1864 sizeof(h->drv[log_unit]->LunID));
1865 }
1866
1867 /* This function gets the SCSI vendor, model, and revision of a logical drive
1868 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1869 * they cannot be read.
1870 */
1871 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1872 char *vendor, char *model, char *rev)
1873 {
1874 int rc;
1875 InquiryData_struct *inq_buf;
1876 unsigned char scsi3addr[8];
1877
1878 *vendor = '\0';
1879 *model = '\0';
1880 *rev = '\0';
1881
1882 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1883 if (!inq_buf)
1884 return;
1885
1886 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1887 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1888 scsi3addr, TYPE_CMD);
1889 if (rc == IO_OK) {
1890 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1891 vendor[VENDOR_LEN] = '\0';
1892 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1893 model[MODEL_LEN] = '\0';
1894 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1895 rev[REV_LEN] = '\0';
1896 }
1897
1898 kfree(inq_buf);
1899 return;
1900 }
1901
1902 /* This function gets the serial number of a logical drive via
1903 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1904 * number cannot be had, for whatever reason, 16 bytes of 0xff
1905 * are returned instead.
1906 */
1907 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1908 unsigned char *serial_no, int buflen)
1909 {
1910 #define PAGE_83_INQ_BYTES 64
1911 int rc;
1912 unsigned char *buf;
1913 unsigned char scsi3addr[8];
1914
1915 if (buflen > 16)
1916 buflen = 16;
1917 memset(serial_no, 0xff, buflen);
1918 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1919 if (!buf)
1920 return;
1921 memset(serial_no, 0, buflen);
1922 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1923 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1924 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1925 if (rc == IO_OK)
1926 memcpy(serial_no, &buf[8], buflen);
1927 kfree(buf);
1928 return;
1929 }
1930
1931 /*
1932 * cciss_add_disk sets up the block device queue for a logical drive
1933 */
1934 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1935 int drv_index)
1936 {
1937 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1938 if (!disk->queue)
1939 goto init_queue_failure;
1940 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1941 disk->major = h->major;
1942 disk->first_minor = drv_index << NWD_SHIFT;
1943 disk->fops = &cciss_fops;
1944 if (cciss_create_ld_sysfs_entry(h, drv_index))
1945 goto cleanup_queue;
1946 disk->private_data = h->drv[drv_index];
1947 disk->driverfs_dev = &h->drv[drv_index]->dev;
1948
1949 /* Set up queue information */
1950 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1951
1952 /* This is a hardware imposed limit. */
1953 blk_queue_max_segments(disk->queue, h->maxsgentries);
1954
1955 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1956
1957 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1958
1959 disk->queue->queuedata = h;
1960
1961 blk_queue_logical_block_size(disk->queue,
1962 h->drv[drv_index]->block_size);
1963
1964 /* Make sure all queue data is written out before */
1965 /* setting h->drv[drv_index]->queue, as setting this */
1966 /* allows the interrupt handler to start the queue */
1967 wmb();
1968 h->drv[drv_index]->queue = disk->queue;
1969 add_disk(disk);
1970 return 0;
1971
1972 cleanup_queue:
1973 blk_cleanup_queue(disk->queue);
1974 disk->queue = NULL;
1975 init_queue_failure:
1976 return -1;
1977 }
1978
1979 /* This function will check the usage_count of the drive to be updated/added.
1980 * If the usage_count is zero and it is a heretofore unknown drive, or,
1981 * the drive's capacity, geometry, or serial number has changed,
1982 * then the drive information will be updated and the disk will be
1983 * re-registered with the kernel. If these conditions don't hold,
1984 * then it will be left alone for the next reboot. The exception to this
1985 * is disk 0 which will always be left registered with the kernel since it
1986 * is also the controller node. Any changes to disk 0 will show up on
1987 * the next reboot.
1988 */
1989 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1990 int first_time, int via_ioctl)
1991 {
1992 struct gendisk *disk;
1993 InquiryData_struct *inq_buff = NULL;
1994 unsigned int block_size;
1995 sector_t total_size;
1996 unsigned long flags = 0;
1997 int ret = 0;
1998 drive_info_struct *drvinfo;
1999
2000 /* Get information about the disk and modify the driver structure */
2001 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2002 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
2003 if (inq_buff == NULL || drvinfo == NULL)
2004 goto mem_msg;
2005
2006 /* testing to see if 16-byte CDBs are already being used */
2007 if (h->cciss_read == CCISS_READ_16) {
2008 cciss_read_capacity_16(h, drv_index,
2009 &total_size, &block_size);
2010
2011 } else {
2012 cciss_read_capacity(h, drv_index, &total_size, &block_size);
2013 /* if read_capacity returns all F's this volume is >2TB */
2014 /* in size so we switch to 16-byte CDB's for all */
2015 /* read/write ops */
2016 if (total_size == 0xFFFFFFFFULL) {
2017 cciss_read_capacity_16(h, drv_index,
2018 &total_size, &block_size);
2019 h->cciss_read = CCISS_READ_16;
2020 h->cciss_write = CCISS_WRITE_16;
2021 } else {
2022 h->cciss_read = CCISS_READ_10;
2023 h->cciss_write = CCISS_WRITE_10;
2024 }
2025 }
2026
2027 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2028 inq_buff, drvinfo);
2029 drvinfo->block_size = block_size;
2030 drvinfo->nr_blocks = total_size + 1;
2031
2032 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2033 drvinfo->model, drvinfo->rev);
2034 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2035 sizeof(drvinfo->serial_no));
2036 /* Save the lunid in case we deregister the disk, below. */
2037 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2038 sizeof(drvinfo->LunID));
2039
2040 /* Is it the same disk we already know, and nothing's changed? */
2041 if (h->drv[drv_index]->raid_level != -1 &&
2042 ((memcmp(drvinfo->serial_no,
2043 h->drv[drv_index]->serial_no, 16) == 0) &&
2044 drvinfo->block_size == h->drv[drv_index]->block_size &&
2045 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2046 drvinfo->heads == h->drv[drv_index]->heads &&
2047 drvinfo->sectors == h->drv[drv_index]->sectors &&
2048 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2049 /* The disk is unchanged, nothing to update */
2050 goto freeret;
2051
2052 /* If we get here it's not the same disk, or something's changed,
2053 * so we need to * deregister it, and re-register it, if it's not
2054 * in use.
2055 * If the disk already exists then deregister it before proceeding
2056 * (unless it's the first disk (for the controller node).
2057 */
2058 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2059 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2060 spin_lock_irqsave(&h->lock, flags);
2061 h->drv[drv_index]->busy_configuring = 1;
2062 spin_unlock_irqrestore(&h->lock, flags);
2063
2064 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2065 * which keeps the interrupt handler from starting
2066 * the queue.
2067 */
2068 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2069 }
2070
2071 /* If the disk is in use return */
2072 if (ret)
2073 goto freeret;
2074
2075 /* Save the new information from cciss_geometry_inquiry
2076 * and serial number inquiry. If the disk was deregistered
2077 * above, then h->drv[drv_index] will be NULL.
2078 */
2079 if (h->drv[drv_index] == NULL) {
2080 drvinfo->device_initialized = 0;
2081 h->drv[drv_index] = drvinfo;
2082 drvinfo = NULL; /* so it won't be freed below. */
2083 } else {
2084 /* special case for cxd0 */
2085 h->drv[drv_index]->block_size = drvinfo->block_size;
2086 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2087 h->drv[drv_index]->heads = drvinfo->heads;
2088 h->drv[drv_index]->sectors = drvinfo->sectors;
2089 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2090 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2091 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2092 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2093 VENDOR_LEN + 1);
2094 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2095 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2096 }
2097
2098 ++h->num_luns;
2099 disk = h->gendisk[drv_index];
2100 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2101
2102 /* If it's not disk 0 (drv_index != 0)
2103 * or if it was disk 0, but there was previously
2104 * no actual corresponding configured logical drive
2105 * (raid_leve == -1) then we want to update the
2106 * logical drive's information.
2107 */
2108 if (drv_index || first_time) {
2109 if (cciss_add_disk(h, disk, drv_index) != 0) {
2110 cciss_free_gendisk(h, drv_index);
2111 cciss_free_drive_info(h, drv_index);
2112 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2113 drv_index);
2114 --h->num_luns;
2115 }
2116 }
2117
2118 freeret:
2119 kfree(inq_buff);
2120 kfree(drvinfo);
2121 return;
2122 mem_msg:
2123 dev_err(&h->pdev->dev, "out of memory\n");
2124 goto freeret;
2125 }
2126
2127 /* This function will find the first index of the controllers drive array
2128 * that has a null drv pointer and allocate the drive info struct and
2129 * will return that index This is where new drives will be added.
2130 * If the index to be returned is greater than the highest_lun index for
2131 * the controller then highest_lun is set * to this new index.
2132 * If there are no available indexes or if tha allocation fails, then -1
2133 * is returned. * "controller_node" is used to know if this is a real
2134 * logical drive, or just the controller node, which determines if this
2135 * counts towards highest_lun.
2136 */
2137 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2138 {
2139 int i;
2140 drive_info_struct *drv;
2141
2142 /* Search for an empty slot for our drive info */
2143 for (i = 0; i < CISS_MAX_LUN; i++) {
2144
2145 /* if not cxd0 case, and it's occupied, skip it. */
2146 if (h->drv[i] && i != 0)
2147 continue;
2148 /*
2149 * If it's cxd0 case, and drv is alloc'ed already, and a
2150 * disk is configured there, skip it.
2151 */
2152 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2153 continue;
2154
2155 /*
2156 * We've found an empty slot. Update highest_lun
2157 * provided this isn't just the fake cxd0 controller node.
2158 */
2159 if (i > h->highest_lun && !controller_node)
2160 h->highest_lun = i;
2161
2162 /* If adding a real disk at cxd0, and it's already alloc'ed */
2163 if (i == 0 && h->drv[i] != NULL)
2164 return i;
2165
2166 /*
2167 * Found an empty slot, not already alloc'ed. Allocate it.
2168 * Mark it with raid_level == -1, so we know it's new later on.
2169 */
2170 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2171 if (!drv)
2172 return -1;
2173 drv->raid_level = -1; /* so we know it's new */
2174 h->drv[i] = drv;
2175 return i;
2176 }
2177 return -1;
2178 }
2179
2180 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2181 {
2182 kfree(h->drv[drv_index]);
2183 h->drv[drv_index] = NULL;
2184 }
2185
2186 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2187 {
2188 put_disk(h->gendisk[drv_index]);
2189 h->gendisk[drv_index] = NULL;
2190 }
2191
2192 /* cciss_add_gendisk finds a free hba[]->drv structure
2193 * and allocates a gendisk if needed, and sets the lunid
2194 * in the drvinfo structure. It returns the index into
2195 * the ->drv[] array, or -1 if none are free.
2196 * is_controller_node indicates whether highest_lun should
2197 * count this disk, or if it's only being added to provide
2198 * a means to talk to the controller in case no logical
2199 * drives have yet been configured.
2200 */
2201 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2202 int controller_node)
2203 {
2204 int drv_index;
2205
2206 drv_index = cciss_alloc_drive_info(h, controller_node);
2207 if (drv_index == -1)
2208 return -1;
2209
2210 /*Check if the gendisk needs to be allocated */
2211 if (!h->gendisk[drv_index]) {
2212 h->gendisk[drv_index] =
2213 alloc_disk(1 << NWD_SHIFT);
2214 if (!h->gendisk[drv_index]) {
2215 dev_err(&h->pdev->dev,
2216 "could not allocate a new disk %d\n",
2217 drv_index);
2218 goto err_free_drive_info;
2219 }
2220 }
2221 memcpy(h->drv[drv_index]->LunID, lunid,
2222 sizeof(h->drv[drv_index]->LunID));
2223 if (cciss_create_ld_sysfs_entry(h, drv_index))
2224 goto err_free_disk;
2225 /* Don't need to mark this busy because nobody */
2226 /* else knows about this disk yet to contend */
2227 /* for access to it. */
2228 h->drv[drv_index]->busy_configuring = 0;
2229 wmb();
2230 return drv_index;
2231
2232 err_free_disk:
2233 cciss_free_gendisk(h, drv_index);
2234 err_free_drive_info:
2235 cciss_free_drive_info(h, drv_index);
2236 return -1;
2237 }
2238
2239 /* This is for the special case of a controller which
2240 * has no logical drives. In this case, we still need
2241 * to register a disk so the controller can be accessed
2242 * by the Array Config Utility.
2243 */
2244 static void cciss_add_controller_node(ctlr_info_t *h)
2245 {
2246 struct gendisk *disk;
2247 int drv_index;
2248
2249 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2250 return;
2251
2252 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2253 if (drv_index == -1)
2254 goto error;
2255 h->drv[drv_index]->block_size = 512;
2256 h->drv[drv_index]->nr_blocks = 0;
2257 h->drv[drv_index]->heads = 0;
2258 h->drv[drv_index]->sectors = 0;
2259 h->drv[drv_index]->cylinders = 0;
2260 h->drv[drv_index]->raid_level = -1;
2261 memset(h->drv[drv_index]->serial_no, 0, 16);
2262 disk = h->gendisk[drv_index];
2263 if (cciss_add_disk(h, disk, drv_index) == 0)
2264 return;
2265 cciss_free_gendisk(h, drv_index);
2266 cciss_free_drive_info(h, drv_index);
2267 error:
2268 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2269 return;
2270 }
2271
2272 /* This function will add and remove logical drives from the Logical
2273 * drive array of the controller and maintain persistency of ordering
2274 * so that mount points are preserved until the next reboot. This allows
2275 * for the removal of logical drives in the middle of the drive array
2276 * without a re-ordering of those drives.
2277 * INPUT
2278 * h = The controller to perform the operations on
2279 */
2280 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2281 int via_ioctl)
2282 {
2283 int num_luns;
2284 ReportLunData_struct *ld_buff = NULL;
2285 int return_code;
2286 int listlength = 0;
2287 int i;
2288 int drv_found;
2289 int drv_index = 0;
2290 unsigned char lunid[8] = CTLR_LUNID;
2291 unsigned long flags;
2292
2293 if (!capable(CAP_SYS_RAWIO))
2294 return -EPERM;
2295
2296 /* Set busy_configuring flag for this operation */
2297 spin_lock_irqsave(&h->lock, flags);
2298 if (h->busy_configuring) {
2299 spin_unlock_irqrestore(&h->lock, flags);
2300 return -EBUSY;
2301 }
2302 h->busy_configuring = 1;
2303 spin_unlock_irqrestore(&h->lock, flags);
2304
2305 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2306 if (ld_buff == NULL)
2307 goto mem_msg;
2308
2309 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2310 sizeof(ReportLunData_struct),
2311 0, CTLR_LUNID, TYPE_CMD);
2312
2313 if (return_code == IO_OK)
2314 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2315 else { /* reading number of logical volumes failed */
2316 dev_warn(&h->pdev->dev,
2317 "report logical volume command failed\n");
2318 listlength = 0;
2319 goto freeret;
2320 }
2321
2322 num_luns = listlength / 8; /* 8 bytes per entry */
2323 if (num_luns > CISS_MAX_LUN) {
2324 num_luns = CISS_MAX_LUN;
2325 dev_warn(&h->pdev->dev, "more luns configured"
2326 " on controller than can be handled by"
2327 " this driver.\n");
2328 }
2329
2330 if (num_luns == 0)
2331 cciss_add_controller_node(h);
2332
2333 /* Compare controller drive array to driver's drive array
2334 * to see if any drives are missing on the controller due
2335 * to action of Array Config Utility (user deletes drive)
2336 * and deregister logical drives which have disappeared.
2337 */
2338 for (i = 0; i <= h->highest_lun; i++) {
2339 int j;
2340 drv_found = 0;
2341
2342 /* skip holes in the array from already deleted drives */
2343 if (h->drv[i] == NULL)
2344 continue;
2345
2346 for (j = 0; j < num_luns; j++) {
2347 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2348 if (memcmp(h->drv[i]->LunID, lunid,
2349 sizeof(lunid)) == 0) {
2350 drv_found = 1;
2351 break;
2352 }
2353 }
2354 if (!drv_found) {
2355 /* Deregister it from the OS, it's gone. */
2356 spin_lock_irqsave(&h->lock, flags);
2357 h->drv[i]->busy_configuring = 1;
2358 spin_unlock_irqrestore(&h->lock, flags);
2359 return_code = deregister_disk(h, i, 1, via_ioctl);
2360 if (h->drv[i] != NULL)
2361 h->drv[i]->busy_configuring = 0;
2362 }
2363 }
2364
2365 /* Compare controller drive array to driver's drive array.
2366 * Check for updates in the drive information and any new drives
2367 * on the controller due to ACU adding logical drives, or changing
2368 * a logical drive's size, etc. Reregister any new/changed drives
2369 */
2370 for (i = 0; i < num_luns; i++) {
2371 int j;
2372
2373 drv_found = 0;
2374
2375 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2376 /* Find if the LUN is already in the drive array
2377 * of the driver. If so then update its info
2378 * if not in use. If it does not exist then find
2379 * the first free index and add it.
2380 */
2381 for (j = 0; j <= h->highest_lun; j++) {
2382 if (h->drv[j] != NULL &&
2383 memcmp(h->drv[j]->LunID, lunid,
2384 sizeof(h->drv[j]->LunID)) == 0) {
2385 drv_index = j;
2386 drv_found = 1;
2387 break;
2388 }
2389 }
2390
2391 /* check if the drive was found already in the array */
2392 if (!drv_found) {
2393 drv_index = cciss_add_gendisk(h, lunid, 0);
2394 if (drv_index == -1)
2395 goto freeret;
2396 }
2397 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2398 } /* end for */
2399
2400 freeret:
2401 kfree(ld_buff);
2402 h->busy_configuring = 0;
2403 /* We return -1 here to tell the ACU that we have registered/updated
2404 * all of the drives that we can and to keep it from calling us
2405 * additional times.
2406 */
2407 return -1;
2408 mem_msg:
2409 dev_err(&h->pdev->dev, "out of memory\n");
2410 h->busy_configuring = 0;
2411 goto freeret;
2412 }
2413
2414 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2415 {
2416 /* zero out the disk size info */
2417 drive_info->nr_blocks = 0;
2418 drive_info->block_size = 0;
2419 drive_info->heads = 0;
2420 drive_info->sectors = 0;
2421 drive_info->cylinders = 0;
2422 drive_info->raid_level = -1;
2423 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2424 memset(drive_info->model, 0, sizeof(drive_info->model));
2425 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2426 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2427 /*
2428 * don't clear the LUNID though, we need to remember which
2429 * one this one is.
2430 */
2431 }
2432
2433 /* This function will deregister the disk and it's queue from the
2434 * kernel. It must be called with the controller lock held and the
2435 * drv structures busy_configuring flag set. It's parameters are:
2436 *
2437 * disk = This is the disk to be deregistered
2438 * drv = This is the drive_info_struct associated with the disk to be
2439 * deregistered. It contains information about the disk used
2440 * by the driver.
2441 * clear_all = This flag determines whether or not the disk information
2442 * is going to be completely cleared out and the highest_lun
2443 * reset. Sometimes we want to clear out information about
2444 * the disk in preparation for re-adding it. In this case
2445 * the highest_lun should be left unchanged and the LunID
2446 * should not be cleared.
2447 * via_ioctl
2448 * This indicates whether we've reached this path via ioctl.
2449 * This affects the maximum usage count allowed for c0d0 to be messed with.
2450 * If this path is reached via ioctl(), then the max_usage_count will
2451 * be 1, as the process calling ioctl() has got to have the device open.
2452 * If we get here via sysfs, then the max usage count will be zero.
2453 */
2454 static int deregister_disk(ctlr_info_t *h, int drv_index,
2455 int clear_all, int via_ioctl)
2456 {
2457 int i;
2458 struct gendisk *disk;
2459 drive_info_struct *drv;
2460 int recalculate_highest_lun;
2461
2462 if (!capable(CAP_SYS_RAWIO))
2463 return -EPERM;
2464
2465 drv = h->drv[drv_index];
2466 disk = h->gendisk[drv_index];
2467
2468 /* make sure logical volume is NOT is use */
2469 if (clear_all || (h->gendisk[0] == disk)) {
2470 if (drv->usage_count > via_ioctl)
2471 return -EBUSY;
2472 } else if (drv->usage_count > 0)
2473 return -EBUSY;
2474
2475 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2476
2477 /* invalidate the devices and deregister the disk. If it is disk
2478 * zero do not deregister it but just zero out it's values. This
2479 * allows us to delete disk zero but keep the controller registered.
2480 */
2481 if (h->gendisk[0] != disk) {
2482 struct request_queue *q = disk->queue;
2483 if (disk->flags & GENHD_FL_UP) {
2484 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2485 del_gendisk(disk);
2486 }
2487 if (q)
2488 blk_cleanup_queue(q);
2489 /* If clear_all is set then we are deleting the logical
2490 * drive, not just refreshing its info. For drives
2491 * other than disk 0 we will call put_disk. We do not
2492 * do this for disk 0 as we need it to be able to
2493 * configure the controller.
2494 */
2495 if (clear_all){
2496 /* This isn't pretty, but we need to find the
2497 * disk in our array and NULL our the pointer.
2498 * This is so that we will call alloc_disk if
2499 * this index is used again later.
2500 */
2501 for (i=0; i < CISS_MAX_LUN; i++){
2502 if (h->gendisk[i] == disk) {
2503 h->gendisk[i] = NULL;
2504 break;
2505 }
2506 }
2507 put_disk(disk);
2508 }
2509 } else {
2510 set_capacity(disk, 0);
2511 cciss_clear_drive_info(drv);
2512 }
2513
2514 --h->num_luns;
2515
2516 /* if it was the last disk, find the new hightest lun */
2517 if (clear_all && recalculate_highest_lun) {
2518 int newhighest = -1;
2519 for (i = 0; i <= h->highest_lun; i++) {
2520 /* if the disk has size > 0, it is available */
2521 if (h->drv[i] && h->drv[i]->heads)
2522 newhighest = i;
2523 }
2524 h->highest_lun = newhighest;
2525 }
2526 return 0;
2527 }
2528
2529 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2530 size_t size, __u8 page_code, unsigned char *scsi3addr,
2531 int cmd_type)
2532 {
2533 u64bit buff_dma_handle;
2534 int status = IO_OK;
2535
2536 c->cmd_type = CMD_IOCTL_PEND;
2537 c->Header.ReplyQueue = 0;
2538 if (buff != NULL) {
2539 c->Header.SGList = 1;
2540 c->Header.SGTotal = 1;
2541 } else {
2542 c->Header.SGList = 0;
2543 c->Header.SGTotal = 0;
2544 }
2545 c->Header.Tag.lower = c->busaddr;
2546 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2547
2548 c->Request.Type.Type = cmd_type;
2549 if (cmd_type == TYPE_CMD) {
2550 switch (cmd) {
2551 case CISS_INQUIRY:
2552 /* are we trying to read a vital product page */
2553 if (page_code != 0) {
2554 c->Request.CDB[1] = 0x01;
2555 c->Request.CDB[2] = page_code;
2556 }
2557 c->Request.CDBLen = 6;
2558 c->Request.Type.Attribute = ATTR_SIMPLE;
2559 c->Request.Type.Direction = XFER_READ;
2560 c->Request.Timeout = 0;
2561 c->Request.CDB[0] = CISS_INQUIRY;
2562 c->Request.CDB[4] = size & 0xFF;
2563 break;
2564 case CISS_REPORT_LOG:
2565 case CISS_REPORT_PHYS:
2566 /* Talking to controller so It's a physical command
2567 mode = 00 target = 0. Nothing to write.
2568 */
2569 c->Request.CDBLen = 12;
2570 c->Request.Type.Attribute = ATTR_SIMPLE;
2571 c->Request.Type.Direction = XFER_READ;
2572 c->Request.Timeout = 0;
2573 c->Request.CDB[0] = cmd;
2574 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2575 c->Request.CDB[7] = (size >> 16) & 0xFF;
2576 c->Request.CDB[8] = (size >> 8) & 0xFF;
2577 c->Request.CDB[9] = size & 0xFF;
2578 break;
2579
2580 case CCISS_READ_CAPACITY:
2581 c->Request.CDBLen = 10;
2582 c->Request.Type.Attribute = ATTR_SIMPLE;
2583 c->Request.Type.Direction = XFER_READ;
2584 c->Request.Timeout = 0;
2585 c->Request.CDB[0] = cmd;
2586 break;
2587 case CCISS_READ_CAPACITY_16:
2588 c->Request.CDBLen = 16;
2589 c->Request.Type.Attribute = ATTR_SIMPLE;
2590 c->Request.Type.Direction = XFER_READ;
2591 c->Request.Timeout = 0;
2592 c->Request.CDB[0] = cmd;
2593 c->Request.CDB[1] = 0x10;
2594 c->Request.CDB[10] = (size >> 24) & 0xFF;
2595 c->Request.CDB[11] = (size >> 16) & 0xFF;
2596 c->Request.CDB[12] = (size >> 8) & 0xFF;
2597 c->Request.CDB[13] = size & 0xFF;
2598 c->Request.Timeout = 0;
2599 c->Request.CDB[0] = cmd;
2600 break;
2601 case CCISS_CACHE_FLUSH:
2602 c->Request.CDBLen = 12;
2603 c->Request.Type.Attribute = ATTR_SIMPLE;
2604 c->Request.Type.Direction = XFER_WRITE;
2605 c->Request.Timeout = 0;
2606 c->Request.CDB[0] = BMIC_WRITE;
2607 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2608 c->Request.CDB[7] = (size >> 8) & 0xFF;
2609 c->Request.CDB[8] = size & 0xFF;
2610 break;
2611 case TEST_UNIT_READY:
2612 c->Request.CDBLen = 6;
2613 c->Request.Type.Attribute = ATTR_SIMPLE;
2614 c->Request.Type.Direction = XFER_NONE;
2615 c->Request.Timeout = 0;
2616 break;
2617 default:
2618 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2619 return IO_ERROR;
2620 }
2621 } else if (cmd_type == TYPE_MSG) {
2622 switch (cmd) {
2623 case CCISS_ABORT_MSG:
2624 c->Request.CDBLen = 12;
2625 c->Request.Type.Attribute = ATTR_SIMPLE;
2626 c->Request.Type.Direction = XFER_WRITE;
2627 c->Request.Timeout = 0;
2628 c->Request.CDB[0] = cmd; /* abort */
2629 c->Request.CDB[1] = 0; /* abort a command */
2630 /* buff contains the tag of the command to abort */
2631 memcpy(&c->Request.CDB[4], buff, 8);
2632 break;
2633 case CCISS_RESET_MSG:
2634 c->Request.CDBLen = 16;
2635 c->Request.Type.Attribute = ATTR_SIMPLE;
2636 c->Request.Type.Direction = XFER_NONE;
2637 c->Request.Timeout = 0;
2638 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2639 c->Request.CDB[0] = cmd; /* reset */
2640 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2641 break;
2642 case CCISS_NOOP_MSG:
2643 c->Request.CDBLen = 1;
2644 c->Request.Type.Attribute = ATTR_SIMPLE;
2645 c->Request.Type.Direction = XFER_WRITE;
2646 c->Request.Timeout = 0;
2647 c->Request.CDB[0] = cmd;
2648 break;
2649 default:
2650 dev_warn(&h->pdev->dev,
2651 "unknown message type %d\n", cmd);
2652 return IO_ERROR;
2653 }
2654 } else {
2655 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2656 return IO_ERROR;
2657 }
2658 /* Fill in the scatter gather information */
2659 if (size > 0) {
2660 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2661 buff, size,
2662 PCI_DMA_BIDIRECTIONAL);
2663 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2664 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2665 c->SG[0].Len = size;
2666 c->SG[0].Ext = 0; /* we are not chaining */
2667 }
2668 return status;
2669 }
2670
2671 static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2672 u8 reset_type)
2673 {
2674 CommandList_struct *c;
2675 int return_status;
2676
2677 c = cmd_alloc(h);
2678 if (!c)
2679 return -ENOMEM;
2680 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2681 CTLR_LUNID, TYPE_MSG);
2682 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2683 if (return_status != IO_OK) {
2684 cmd_special_free(h, c);
2685 return return_status;
2686 }
2687 c->waiting = NULL;
2688 enqueue_cmd_and_start_io(h, c);
2689 /* Don't wait for completion, the reset won't complete. Don't free
2690 * the command either. This is the last command we will send before
2691 * re-initializing everything, so it doesn't matter and won't leak.
2692 */
2693 return 0;
2694 }
2695
2696 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2697 {
2698 switch (c->err_info->ScsiStatus) {
2699 case SAM_STAT_GOOD:
2700 return IO_OK;
2701 case SAM_STAT_CHECK_CONDITION:
2702 switch (0xf & c->err_info->SenseInfo[2]) {
2703 case 0: return IO_OK; /* no sense */
2704 case 1: return IO_OK; /* recovered error */
2705 default:
2706 if (check_for_unit_attention(h, c))
2707 return IO_NEEDS_RETRY;
2708 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2709 "check condition, sense key = 0x%02x\n",
2710 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2711 }
2712 break;
2713 default:
2714 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2715 "scsi status = 0x%02x\n",
2716 c->Request.CDB[0], c->err_info->ScsiStatus);
2717 break;
2718 }
2719 return IO_ERROR;
2720 }
2721
2722 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2723 {
2724 int return_status = IO_OK;
2725
2726 if (c->err_info->CommandStatus == CMD_SUCCESS)
2727 return IO_OK;
2728
2729 switch (c->err_info->CommandStatus) {
2730 case CMD_TARGET_STATUS:
2731 return_status = check_target_status(h, c);
2732 break;
2733 case CMD_DATA_UNDERRUN:
2734 case CMD_DATA_OVERRUN:
2735 /* expected for inquiry and report lun commands */
2736 break;
2737 case CMD_INVALID:
2738 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2739 "reported invalid\n", c->Request.CDB[0]);
2740 return_status = IO_ERROR;
2741 break;
2742 case CMD_PROTOCOL_ERR:
2743 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2744 "protocol error\n", c->Request.CDB[0]);
2745 return_status = IO_ERROR;
2746 break;
2747 case CMD_HARDWARE_ERR:
2748 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2749 " hardware error\n", c->Request.CDB[0]);
2750 return_status = IO_ERROR;
2751 break;
2752 case CMD_CONNECTION_LOST:
2753 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2754 "connection lost\n", c->Request.CDB[0]);
2755 return_status = IO_ERROR;
2756 break;
2757 case CMD_ABORTED:
2758 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2759 "aborted\n", c->Request.CDB[0]);
2760 return_status = IO_ERROR;
2761 break;
2762 case CMD_ABORT_FAILED:
2763 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2764 "abort failed\n", c->Request.CDB[0]);
2765 return_status = IO_ERROR;
2766 break;
2767 case CMD_UNSOLICITED_ABORT:
2768 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2769 c->Request.CDB[0]);
2770 return_status = IO_NEEDS_RETRY;
2771 break;
2772 case CMD_UNABORTABLE:
2773 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2774 return_status = IO_ERROR;
2775 break;
2776 default:
2777 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2778 "unknown status %x\n", c->Request.CDB[0],
2779 c->err_info->CommandStatus);
2780 return_status = IO_ERROR;
2781 }
2782 return return_status;
2783 }
2784
2785 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2786 int attempt_retry)
2787 {
2788 DECLARE_COMPLETION_ONSTACK(wait);
2789 u64bit buff_dma_handle;
2790 int return_status = IO_OK;
2791
2792 resend_cmd2:
2793 c->waiting = &wait;
2794 enqueue_cmd_and_start_io(h, c);
2795
2796 wait_for_completion(&wait);
2797
2798 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2799 goto command_done;
2800
2801 return_status = process_sendcmd_error(h, c);
2802
2803 if (return_status == IO_NEEDS_RETRY &&
2804 c->retry_count < MAX_CMD_RETRIES) {
2805 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2806 c->Request.CDB[0]);
2807 c->retry_count++;
2808 /* erase the old error information */
2809 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2810 return_status = IO_OK;
2811 INIT_COMPLETION(wait);
2812 goto resend_cmd2;
2813 }
2814
2815 command_done:
2816 /* unlock the buffers from DMA */
2817 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2818 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2819 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2820 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2821 return return_status;
2822 }
2823
2824 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2825 __u8 page_code, unsigned char scsi3addr[],
2826 int cmd_type)
2827 {
2828 CommandList_struct *c;
2829 int return_status;
2830
2831 c = cmd_special_alloc(h);
2832 if (!c)
2833 return -ENOMEM;
2834 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2835 scsi3addr, cmd_type);
2836 if (return_status == IO_OK)
2837 return_status = sendcmd_withirq_core(h, c, 1);
2838
2839 cmd_special_free(h, c);
2840 return return_status;
2841 }
2842
2843 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2844 sector_t total_size,
2845 unsigned int block_size,
2846 InquiryData_struct *inq_buff,
2847 drive_info_struct *drv)
2848 {
2849 int return_code;
2850 unsigned long t;
2851 unsigned char scsi3addr[8];
2852
2853 memset(inq_buff, 0, sizeof(InquiryData_struct));
2854 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2855 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2856 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2857 if (return_code == IO_OK) {
2858 if (inq_buff->data_byte[8] == 0xFF) {
2859 dev_warn(&h->pdev->dev,
2860 "reading geometry failed, volume "
2861 "does not support reading geometry\n");
2862 drv->heads = 255;
2863 drv->sectors = 32; /* Sectors per track */
2864 drv->cylinders = total_size + 1;
2865 drv->raid_level = RAID_UNKNOWN;
2866 } else {
2867 drv->heads = inq_buff->data_byte[6];
2868 drv->sectors = inq_buff->data_byte[7];
2869 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2870 drv->cylinders += inq_buff->data_byte[5];
2871 drv->raid_level = inq_buff->data_byte[8];
2872 }
2873 drv->block_size = block_size;
2874 drv->nr_blocks = total_size + 1;
2875 t = drv->heads * drv->sectors;
2876 if (t > 1) {
2877 sector_t real_size = total_size + 1;
2878 unsigned long rem = sector_div(real_size, t);
2879 if (rem)
2880 real_size++;
2881 drv->cylinders = real_size;
2882 }
2883 } else { /* Get geometry failed */
2884 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2885 }
2886 }
2887
2888 static void
2889 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2890 unsigned int *block_size)
2891 {
2892 ReadCapdata_struct *buf;
2893 int return_code;
2894 unsigned char scsi3addr[8];
2895
2896 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2897 if (!buf) {
2898 dev_warn(&h->pdev->dev, "out of memory\n");
2899 return;
2900 }
2901
2902 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2903 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2904 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2905 if (return_code == IO_OK) {
2906 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2907 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2908 } else { /* read capacity command failed */
2909 dev_warn(&h->pdev->dev, "read capacity failed\n");
2910 *total_size = 0;
2911 *block_size = BLOCK_SIZE;
2912 }
2913 kfree(buf);
2914 }
2915
2916 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2917 sector_t *total_size, unsigned int *block_size)
2918 {
2919 ReadCapdata_struct_16 *buf;
2920 int return_code;
2921 unsigned char scsi3addr[8];
2922
2923 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2924 if (!buf) {
2925 dev_warn(&h->pdev->dev, "out of memory\n");
2926 return;
2927 }
2928
2929 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2930 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2931 buf, sizeof(ReadCapdata_struct_16),
2932 0, scsi3addr, TYPE_CMD);
2933 if (return_code == IO_OK) {
2934 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2935 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2936 } else { /* read capacity command failed */
2937 dev_warn(&h->pdev->dev, "read capacity failed\n");
2938 *total_size = 0;
2939 *block_size = BLOCK_SIZE;
2940 }
2941 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2942 (unsigned long long)*total_size+1, *block_size);
2943 kfree(buf);
2944 }
2945
2946 static int cciss_revalidate(struct gendisk *disk)
2947 {
2948 ctlr_info_t *h = get_host(disk);
2949 drive_info_struct *drv = get_drv(disk);
2950 int logvol;
2951 int FOUND = 0;
2952 unsigned int block_size;
2953 sector_t total_size;
2954 InquiryData_struct *inq_buff = NULL;
2955
2956 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2957 if (!h->drv[logvol])
2958 continue;
2959 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2960 sizeof(drv->LunID)) == 0) {
2961 FOUND = 1;
2962 break;
2963 }
2964 }
2965
2966 if (!FOUND)
2967 return 1;
2968
2969 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2970 if (inq_buff == NULL) {
2971 dev_warn(&h->pdev->dev, "out of memory\n");
2972 return 1;
2973 }
2974 if (h->cciss_read == CCISS_READ_10) {
2975 cciss_read_capacity(h, logvol,
2976 &total_size, &block_size);
2977 } else {
2978 cciss_read_capacity_16(h, logvol,
2979 &total_size, &block_size);
2980 }
2981 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2982 inq_buff, drv);
2983
2984 blk_queue_logical_block_size(drv->queue, drv->block_size);
2985 set_capacity(disk, drv->nr_blocks);
2986
2987 kfree(inq_buff);
2988 return 0;
2989 }
2990
2991 /*
2992 * Map (physical) PCI mem into (virtual) kernel space
2993 */
2994 static void __iomem *remap_pci_mem(ulong base, ulong size)
2995 {
2996 ulong page_base = ((ulong) base) & PAGE_MASK;
2997 ulong page_offs = ((ulong) base) - page_base;
2998 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2999
3000 return page_remapped ? (page_remapped + page_offs) : NULL;
3001 }
3002
3003 /*
3004 * Takes jobs of the Q and sends them to the hardware, then puts it on
3005 * the Q to wait for completion.
3006 */
3007 static void start_io(ctlr_info_t *h)
3008 {
3009 CommandList_struct *c;
3010
3011 while (!list_empty(&h->reqQ)) {
3012 c = list_entry(h->reqQ.next, CommandList_struct, list);
3013 /* can't do anything if fifo is full */
3014 if ((h->access.fifo_full(h))) {
3015 dev_warn(&h->pdev->dev, "fifo full\n");
3016 break;
3017 }
3018
3019 /* Get the first entry from the Request Q */
3020 removeQ(c);
3021 h->Qdepth--;
3022
3023 /* Tell the controller execute command */
3024 h->access.submit_command(h, c);
3025
3026 /* Put job onto the completed Q */
3027 addQ(&h->cmpQ, c);
3028 }
3029 }
3030
3031 /* Assumes that h->lock is held. */
3032 /* Zeros out the error record and then resends the command back */
3033 /* to the controller */
3034 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3035 {
3036 /* erase the old error information */
3037 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3038
3039 /* add it to software queue and then send it to the controller */
3040 addQ(&h->reqQ, c);
3041 h->Qdepth++;
3042 if (h->Qdepth > h->maxQsinceinit)
3043 h->maxQsinceinit = h->Qdepth;
3044
3045 start_io(h);
3046 }
3047
3048 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3049 unsigned int msg_byte, unsigned int host_byte,
3050 unsigned int driver_byte)
3051 {
3052 /* inverse of macros in scsi.h */
3053 return (scsi_status_byte & 0xff) |
3054 ((msg_byte & 0xff) << 8) |
3055 ((host_byte & 0xff) << 16) |
3056 ((driver_byte & 0xff) << 24);
3057 }
3058
3059 static inline int evaluate_target_status(ctlr_info_t *h,
3060 CommandList_struct *cmd, int *retry_cmd)
3061 {
3062 unsigned char sense_key;
3063 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3064 int error_value;
3065
3066 *retry_cmd = 0;
3067 /* If we get in here, it means we got "target status", that is, scsi status */
3068 status_byte = cmd->err_info->ScsiStatus;
3069 driver_byte = DRIVER_OK;
3070 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3071
3072 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3073 host_byte = DID_PASSTHROUGH;
3074 else
3075 host_byte = DID_OK;
3076
3077 error_value = make_status_bytes(status_byte, msg_byte,
3078 host_byte, driver_byte);
3079
3080 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3081 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3082 dev_warn(&h->pdev->dev, "cmd %p "
3083 "has SCSI Status 0x%x\n",
3084 cmd, cmd->err_info->ScsiStatus);
3085 return error_value;
3086 }
3087
3088 /* check the sense key */
3089 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3090 /* no status or recovered error */
3091 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3092 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3093 error_value = 0;
3094
3095 if (check_for_unit_attention(h, cmd)) {
3096 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3097 return 0;
3098 }
3099
3100 /* Not SG_IO or similar? */
3101 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3102 if (error_value != 0)
3103 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3104 " sense key = 0x%x\n", cmd, sense_key);
3105 return error_value;
3106 }
3107
3108 /* SG_IO or similar, copy sense data back */
3109 if (cmd->rq->sense) {
3110 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3111 cmd->rq->sense_len = cmd->err_info->SenseLen;
3112 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3113 cmd->rq->sense_len);
3114 } else
3115 cmd->rq->sense_len = 0;
3116
3117 return error_value;
3118 }
3119
3120 /* checks the status of the job and calls complete buffers to mark all
3121 * buffers for the completed job. Note that this function does not need
3122 * to hold the hba/queue lock.
3123 */
3124 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3125 int timeout)
3126 {
3127 int retry_cmd = 0;
3128 struct request *rq = cmd->rq;
3129
3130 rq->errors = 0;
3131
3132 if (timeout)
3133 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3134
3135 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3136 goto after_error_processing;
3137
3138 switch (cmd->err_info->CommandStatus) {
3139 case CMD_TARGET_STATUS:
3140 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3141 break;
3142 case CMD_DATA_UNDERRUN:
3143 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3144 dev_warn(&h->pdev->dev, "cmd %p has"
3145 " completed with data underrun "
3146 "reported\n", cmd);
3147 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3148 }
3149 break;
3150 case CMD_DATA_OVERRUN:
3151 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3152 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3153 " completed with data overrun "
3154 "reported\n", cmd);
3155 break;
3156 case CMD_INVALID:
3157 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3158 "reported invalid\n", cmd);
3159 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3160 cmd->err_info->CommandStatus, DRIVER_OK,
3161 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3162 DID_PASSTHROUGH : DID_ERROR);
3163 break;
3164 case CMD_PROTOCOL_ERR:
3165 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3166 "protocol error\n", cmd);
3167 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3168 cmd->err_info->CommandStatus, DRIVER_OK,
3169 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3170 DID_PASSTHROUGH : DID_ERROR);
3171 break;
3172 case CMD_HARDWARE_ERR:
3173 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3174 " hardware error\n", cmd);
3175 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3176 cmd->err_info->CommandStatus, DRIVER_OK,
3177 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3178 DID_PASSTHROUGH : DID_ERROR);
3179 break;
3180 case CMD_CONNECTION_LOST:
3181 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3182 "connection lost\n", cmd);
3183 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3184 cmd->err_info->CommandStatus, DRIVER_OK,
3185 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3186 DID_PASSTHROUGH : DID_ERROR);
3187 break;
3188 case CMD_ABORTED:
3189 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3190 "aborted\n", cmd);
3191 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3192 cmd->err_info->CommandStatus, DRIVER_OK,
3193 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3194 DID_PASSTHROUGH : DID_ABORT);
3195 break;
3196 case CMD_ABORT_FAILED:
3197 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3198 "abort failed\n", cmd);
3199 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3200 cmd->err_info->CommandStatus, DRIVER_OK,
3201 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3202 DID_PASSTHROUGH : DID_ERROR);
3203 break;
3204 case CMD_UNSOLICITED_ABORT:
3205 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3206 "abort %p\n", h->ctlr, cmd);
3207 if (cmd->retry_count < MAX_CMD_RETRIES) {
3208 retry_cmd = 1;
3209 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3210 cmd->retry_count++;
3211 } else
3212 dev_warn(&h->pdev->dev,
3213 "%p retried too many times\n", cmd);
3214 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3215 cmd->err_info->CommandStatus, DRIVER_OK,
3216 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3217 DID_PASSTHROUGH : DID_ABORT);
3218 break;
3219 case CMD_TIMEOUT:
3220 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3221 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3222 cmd->err_info->CommandStatus, DRIVER_OK,
3223 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3224 DID_PASSTHROUGH : DID_ERROR);
3225 break;
3226 case CMD_UNABORTABLE:
3227 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3228 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3229 cmd->err_info->CommandStatus, DRIVER_OK,
3230 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3231 DID_PASSTHROUGH : DID_ERROR);
3232 break;
3233 default:
3234 dev_warn(&h->pdev->dev, "cmd %p returned "
3235 "unknown status %x\n", cmd,
3236 cmd->err_info->CommandStatus);
3237 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3238 cmd->err_info->CommandStatus, DRIVER_OK,
3239 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3240 DID_PASSTHROUGH : DID_ERROR);
3241 }
3242
3243 after_error_processing:
3244
3245 /* We need to return this command */
3246 if (retry_cmd) {
3247 resend_cciss_cmd(h, cmd);
3248 return;
3249 }
3250 cmd->rq->completion_data = cmd;
3251 blk_complete_request(cmd->rq);
3252 }
3253
3254 static inline u32 cciss_tag_contains_index(u32 tag)
3255 {
3256 #define DIRECT_LOOKUP_BIT 0x10
3257 return tag & DIRECT_LOOKUP_BIT;
3258 }
3259
3260 static inline u32 cciss_tag_to_index(u32 tag)
3261 {
3262 #define DIRECT_LOOKUP_SHIFT 5
3263 return tag >> DIRECT_LOOKUP_SHIFT;
3264 }
3265
3266 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3267 {
3268 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3269 #define CCISS_SIMPLE_ERROR_BITS 0x03
3270 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3271 return tag & ~CCISS_PERF_ERROR_BITS;
3272 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3273 }
3274
3275 static inline void cciss_mark_tag_indexed(u32 *tag)
3276 {
3277 *tag |= DIRECT_LOOKUP_BIT;
3278 }
3279
3280 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3281 {
3282 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3283 }
3284
3285 /*
3286 * Get a request and submit it to the controller.
3287 */
3288 static void do_cciss_request(struct request_queue *q)
3289 {
3290 ctlr_info_t *h = q->queuedata;
3291 CommandList_struct *c;
3292 sector_t start_blk;
3293 int seg;
3294 struct request *creq;
3295 u64bit temp64;
3296 struct scatterlist *tmp_sg;
3297 SGDescriptor_struct *curr_sg;
3298 drive_info_struct *drv;
3299 int i, dir;
3300 int sg_index = 0;
3301 int chained = 0;
3302
3303 queue:
3304 creq = blk_peek_request(q);
3305 if (!creq)
3306 goto startio;
3307
3308 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3309
3310 c = cmd_alloc(h);
3311 if (!c)
3312 goto full;
3313
3314 blk_start_request(creq);
3315
3316 tmp_sg = h->scatter_list[c->cmdindex];
3317 spin_unlock_irq(q->queue_lock);
3318
3319 c->cmd_type = CMD_RWREQ;
3320 c->rq = creq;
3321
3322 /* fill in the request */
3323 drv = creq->rq_disk->private_data;
3324 c->Header.ReplyQueue = 0; /* unused in simple mode */
3325 /* got command from pool, so use the command block index instead */
3326 /* for direct lookups. */
3327 /* The first 2 bits are reserved for controller error reporting. */
3328 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3329 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3330 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3331 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3332 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3333 c->Request.Type.Attribute = ATTR_SIMPLE;
3334 c->Request.Type.Direction =
3335 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3336 c->Request.Timeout = 0; /* Don't time out */
3337 c->Request.CDB[0] =
3338 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3339 start_blk = blk_rq_pos(creq);
3340 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3341 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3342 sg_init_table(tmp_sg, h->maxsgentries);
3343 seg = blk_rq_map_sg(q, creq, tmp_sg);
3344
3345 /* get the DMA records for the setup */
3346 if (c->Request.Type.Direction == XFER_READ)
3347 dir = PCI_DMA_FROMDEVICE;
3348 else
3349 dir = PCI_DMA_TODEVICE;
3350
3351 curr_sg = c->SG;
3352 sg_index = 0;
3353 chained = 0;
3354
3355 for (i = 0; i < seg; i++) {
3356 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3357 !chained && ((seg - i) > 1)) {
3358 /* Point to next chain block. */
3359 curr_sg = h->cmd_sg_list[c->cmdindex];
3360 sg_index = 0;
3361 chained = 1;
3362 }
3363 curr_sg[sg_index].Len = tmp_sg[i].length;
3364 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3365 tmp_sg[i].offset,
3366 tmp_sg[i].length, dir);
3367 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3368 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3369 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3370 ++sg_index;
3371 }
3372 if (chained)
3373 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3374 (seg - (h->max_cmd_sgentries - 1)) *
3375 sizeof(SGDescriptor_struct));
3376
3377 /* track how many SG entries we are using */
3378 if (seg > h->maxSG)
3379 h->maxSG = seg;
3380
3381 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3382 "chained[%d]\n",
3383 blk_rq_sectors(creq), seg, chained);
3384
3385 c->Header.SGTotal = seg + chained;
3386 if (seg <= h->max_cmd_sgentries)
3387 c->Header.SGList = c->Header.SGTotal;
3388 else
3389 c->Header.SGList = h->max_cmd_sgentries;
3390 set_performant_mode(h, c);
3391
3392 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3393 if(h->cciss_read == CCISS_READ_10) {
3394 c->Request.CDB[1] = 0;
3395 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3396 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3397 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3398 c->Request.CDB[5] = start_blk & 0xff;
3399 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3400 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3401 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3402 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3403 } else {
3404 u32 upper32 = upper_32_bits(start_blk);
3405
3406 c->Request.CDBLen = 16;
3407 c->Request.CDB[1]= 0;
3408 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3409 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3410 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3411 c->Request.CDB[5]= upper32 & 0xff;
3412 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3413 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3414 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3415 c->Request.CDB[9]= start_blk & 0xff;
3416 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3417 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3418 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3419 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3420 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3421 }
3422 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3423 c->Request.CDBLen = creq->cmd_len;
3424 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3425 } else {
3426 dev_warn(&h->pdev->dev, "bad request type %d\n",
3427 creq->cmd_type);
3428 BUG();
3429 }
3430
3431 spin_lock_irq(q->queue_lock);
3432
3433 addQ(&h->reqQ, c);
3434 h->Qdepth++;
3435 if (h->Qdepth > h->maxQsinceinit)
3436 h->maxQsinceinit = h->Qdepth;
3437
3438 goto queue;
3439 full:
3440 blk_stop_queue(q);
3441 startio:
3442 /* We will already have the driver lock here so not need
3443 * to lock it.
3444 */
3445 start_io(h);
3446 }
3447
3448 static inline unsigned long get_next_completion(ctlr_info_t *h)
3449 {
3450 return h->access.command_completed(h);
3451 }
3452
3453 static inline int interrupt_pending(ctlr_info_t *h)
3454 {
3455 return h->access.intr_pending(h);
3456 }
3457
3458 static inline long interrupt_not_for_us(ctlr_info_t *h)
3459 {
3460 return ((h->access.intr_pending(h) == 0) ||
3461 (h->interrupts_enabled == 0));
3462 }
3463
3464 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3465 u32 raw_tag)
3466 {
3467 if (unlikely(tag_index >= h->nr_cmds)) {
3468 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3469 return 1;
3470 }
3471 return 0;
3472 }
3473
3474 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3475 u32 raw_tag)
3476 {
3477 removeQ(c);
3478 if (likely(c->cmd_type == CMD_RWREQ))
3479 complete_command(h, c, 0);
3480 else if (c->cmd_type == CMD_IOCTL_PEND)
3481 complete(c->waiting);
3482 #ifdef CONFIG_CISS_SCSI_TAPE
3483 else if (c->cmd_type == CMD_SCSI)
3484 complete_scsi_command(c, 0, raw_tag);
3485 #endif
3486 }
3487
3488 static inline u32 next_command(ctlr_info_t *h)
3489 {
3490 u32 a;
3491
3492 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3493 return h->access.command_completed(h);
3494
3495 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3496 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3497 (h->reply_pool_head)++;
3498 h->commands_outstanding--;
3499 } else {
3500 a = FIFO_EMPTY;
3501 }
3502 /* Check for wraparound */
3503 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3504 h->reply_pool_head = h->reply_pool;
3505 h->reply_pool_wraparound ^= 1;
3506 }
3507 return a;
3508 }
3509
3510 /* process completion of an indexed ("direct lookup") command */
3511 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3512 {
3513 u32 tag_index;
3514 CommandList_struct *c;
3515
3516 tag_index = cciss_tag_to_index(raw_tag);
3517 if (bad_tag(h, tag_index, raw_tag))
3518 return next_command(h);
3519 c = h->cmd_pool + tag_index;
3520 finish_cmd(h, c, raw_tag);
3521 return next_command(h);
3522 }
3523
3524 /* process completion of a non-indexed command */
3525 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3526 {
3527 CommandList_struct *c = NULL;
3528 __u32 busaddr_masked, tag_masked;
3529
3530 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3531 list_for_each_entry(c, &h->cmpQ, list) {
3532 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3533 if (busaddr_masked == tag_masked) {
3534 finish_cmd(h, c, raw_tag);
3535 return next_command(h);
3536 }
3537 }
3538 bad_tag(h, h->nr_cmds + 1, raw_tag);
3539 return next_command(h);
3540 }
3541
3542 /* Some controllers, like p400, will give us one interrupt
3543 * after a soft reset, even if we turned interrupts off.
3544 * Only need to check for this in the cciss_xxx_discard_completions
3545 * functions.
3546 */
3547 static int ignore_bogus_interrupt(ctlr_info_t *h)
3548 {
3549 if (likely(!reset_devices))
3550 return 0;
3551
3552 if (likely(h->interrupts_enabled))
3553 return 0;
3554
3555 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3556 "(known firmware bug.) Ignoring.\n");
3557
3558 return 1;
3559 }
3560
3561 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3562 {
3563 ctlr_info_t *h = dev_id;
3564 unsigned long flags;
3565 u32 raw_tag;
3566
3567 if (ignore_bogus_interrupt(h))
3568 return IRQ_NONE;
3569
3570 if (interrupt_not_for_us(h))
3571 return IRQ_NONE;
3572 spin_lock_irqsave(&h->lock, flags);
3573 while (interrupt_pending(h)) {
3574 raw_tag = get_next_completion(h);
3575 while (raw_tag != FIFO_EMPTY)
3576 raw_tag = next_command(h);
3577 }
3578 spin_unlock_irqrestore(&h->lock, flags);
3579 return IRQ_HANDLED;
3580 }
3581
3582 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3583 {
3584 ctlr_info_t *h = dev_id;
3585 unsigned long flags;
3586 u32 raw_tag;
3587
3588 if (ignore_bogus_interrupt(h))
3589 return IRQ_NONE;
3590
3591 spin_lock_irqsave(&h->lock, flags);
3592 raw_tag = get_next_completion(h);
3593 while (raw_tag != FIFO_EMPTY)
3594 raw_tag = next_command(h);
3595 spin_unlock_irqrestore(&h->lock, flags);
3596 return IRQ_HANDLED;
3597 }
3598
3599 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3600 {
3601 ctlr_info_t *h = dev_id;
3602 unsigned long flags;
3603 u32 raw_tag;
3604
3605 if (interrupt_not_for_us(h))
3606 return IRQ_NONE;
3607 spin_lock_irqsave(&h->lock, flags);
3608 while (interrupt_pending(h)) {
3609 raw_tag = get_next_completion(h);
3610 while (raw_tag != FIFO_EMPTY) {
3611 if (cciss_tag_contains_index(raw_tag))
3612 raw_tag = process_indexed_cmd(h, raw_tag);
3613 else
3614 raw_tag = process_nonindexed_cmd(h, raw_tag);
3615 }
3616 }
3617 spin_unlock_irqrestore(&h->lock, flags);
3618 return IRQ_HANDLED;
3619 }
3620
3621 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3622 * check the interrupt pending register because it is not set.
3623 */
3624 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3625 {
3626 ctlr_info_t *h = dev_id;
3627 unsigned long flags;
3628 u32 raw_tag;
3629
3630 spin_lock_irqsave(&h->lock, flags);
3631 raw_tag = get_next_completion(h);
3632 while (raw_tag != FIFO_EMPTY) {
3633 if (cciss_tag_contains_index(raw_tag))
3634 raw_tag = process_indexed_cmd(h, raw_tag);
3635 else
3636 raw_tag = process_nonindexed_cmd(h, raw_tag);
3637 }
3638 spin_unlock_irqrestore(&h->lock, flags);
3639 return IRQ_HANDLED;
3640 }
3641
3642 /**
3643 * add_to_scan_list() - add controller to rescan queue
3644 * @h: Pointer to the controller.
3645 *
3646 * Adds the controller to the rescan queue if not already on the queue.
3647 *
3648 * returns 1 if added to the queue, 0 if skipped (could be on the
3649 * queue already, or the controller could be initializing or shutting
3650 * down).
3651 **/
3652 static int add_to_scan_list(struct ctlr_info *h)
3653 {
3654 struct ctlr_info *test_h;
3655 int found = 0;
3656 int ret = 0;
3657
3658 if (h->busy_initializing)
3659 return 0;
3660
3661 if (!mutex_trylock(&h->busy_shutting_down))
3662 return 0;
3663
3664 mutex_lock(&scan_mutex);
3665 list_for_each_entry(test_h, &scan_q, scan_list) {
3666 if (test_h == h) {
3667 found = 1;
3668 break;
3669 }
3670 }
3671 if (!found && !h->busy_scanning) {
3672 INIT_COMPLETION(h->scan_wait);
3673 list_add_tail(&h->scan_list, &scan_q);
3674 ret = 1;
3675 }
3676 mutex_unlock(&scan_mutex);
3677 mutex_unlock(&h->busy_shutting_down);
3678
3679 return ret;
3680 }
3681
3682 /**
3683 * remove_from_scan_list() - remove controller from rescan queue
3684 * @h: Pointer to the controller.
3685 *
3686 * Removes the controller from the rescan queue if present. Blocks if
3687 * the controller is currently conducting a rescan. The controller
3688 * can be in one of three states:
3689 * 1. Doesn't need a scan
3690 * 2. On the scan list, but not scanning yet (we remove it)
3691 * 3. Busy scanning (and not on the list). In this case we want to wait for
3692 * the scan to complete to make sure the scanning thread for this
3693 * controller is completely idle.
3694 **/
3695 static void remove_from_scan_list(struct ctlr_info *h)
3696 {
3697 struct ctlr_info *test_h, *tmp_h;
3698
3699 mutex_lock(&scan_mutex);
3700 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3701 if (test_h == h) { /* state 2. */
3702 list_del(&h->scan_list);
3703 complete_all(&h->scan_wait);
3704 mutex_unlock(&scan_mutex);
3705 return;
3706 }
3707 }
3708 if (h->busy_scanning) { /* state 3. */
3709 mutex_unlock(&scan_mutex);
3710 wait_for_completion(&h->scan_wait);
3711 } else { /* state 1, nothing to do. */
3712 mutex_unlock(&scan_mutex);
3713 }
3714 }
3715
3716 /**
3717 * scan_thread() - kernel thread used to rescan controllers
3718 * @data: Ignored.
3719 *
3720 * A kernel thread used scan for drive topology changes on
3721 * controllers. The thread processes only one controller at a time
3722 * using a queue. Controllers are added to the queue using
3723 * add_to_scan_list() and removed from the queue either after done
3724 * processing or using remove_from_scan_list().
3725 *
3726 * returns 0.
3727 **/
3728 static int scan_thread(void *data)
3729 {
3730 struct ctlr_info *h;
3731
3732 while (1) {
3733 set_current_state(TASK_INTERRUPTIBLE);
3734 schedule();
3735 if (kthread_should_stop())
3736 break;
3737
3738 while (1) {
3739 mutex_lock(&scan_mutex);
3740 if (list_empty(&scan_q)) {
3741 mutex_unlock(&scan_mutex);
3742 break;
3743 }
3744
3745 h = list_entry(scan_q.next,
3746 struct ctlr_info,
3747 scan_list);
3748 list_del(&h->scan_list);
3749 h->busy_scanning = 1;
3750 mutex_unlock(&scan_mutex);
3751
3752 rebuild_lun_table(h, 0, 0);
3753 complete_all(&h->scan_wait);
3754 mutex_lock(&scan_mutex);
3755 h->busy_scanning = 0;
3756 mutex_unlock(&scan_mutex);
3757 }
3758 }
3759
3760 return 0;
3761 }
3762
3763 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3764 {
3765 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3766 return 0;
3767
3768 switch (c->err_info->SenseInfo[12]) {
3769 case STATE_CHANGED:
3770 dev_warn(&h->pdev->dev, "a state change "
3771 "detected, command retried\n");
3772 return 1;
3773 break;
3774 case LUN_FAILED:
3775 dev_warn(&h->pdev->dev, "LUN failure "
3776 "detected, action required\n");
3777 return 1;
3778 break;
3779 case REPORT_LUNS_CHANGED:
3780 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3781 /*
3782 * Here, we could call add_to_scan_list and wake up the scan thread,
3783 * except that it's quite likely that we will get more than one
3784 * REPORT_LUNS_CHANGED condition in quick succession, which means
3785 * that those which occur after the first one will likely happen
3786 * *during* the scan_thread's rescan. And the rescan code is not
3787 * robust enough to restart in the middle, undoing what it has already
3788 * done, and it's not clear that it's even possible to do this, since
3789 * part of what it does is notify the block layer, which starts
3790 * doing it's own i/o to read partition tables and so on, and the
3791 * driver doesn't have visibility to know what might need undoing.
3792 * In any event, if possible, it is horribly complicated to get right
3793 * so we just don't do it for now.
3794 *
3795 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3796 */
3797 return 1;
3798 break;
3799 case POWER_OR_RESET:
3800 dev_warn(&h->pdev->dev,
3801 "a power on or device reset detected\n");
3802 return 1;
3803 break;
3804 case UNIT_ATTENTION_CLEARED:
3805 dev_warn(&h->pdev->dev,
3806 "unit attention cleared by another initiator\n");
3807 return 1;
3808 break;
3809 default:
3810 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3811 return 1;
3812 }
3813 }
3814
3815 /*
3816 * We cannot read the structure directly, for portability we must use
3817 * the io functions.
3818 * This is for debug only.
3819 */
3820 static void print_cfg_table(ctlr_info_t *h)
3821 {
3822 int i;
3823 char temp_name[17];
3824 CfgTable_struct *tb = h->cfgtable;
3825
3826 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3827 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3828 for (i = 0; i < 4; i++)
3829 temp_name[i] = readb(&(tb->Signature[i]));
3830 temp_name[4] = '\0';
3831 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3832 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3833 readl(&(tb->SpecValence)));
3834 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3835 readl(&(tb->TransportSupport)));
3836 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3837 readl(&(tb->TransportActive)));
3838 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3839 readl(&(tb->HostWrite.TransportRequest)));
3840 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3841 readl(&(tb->HostWrite.CoalIntDelay)));
3842 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3843 readl(&(tb->HostWrite.CoalIntCount)));
3844 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3845 readl(&(tb->CmdsOutMax)));
3846 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3847 readl(&(tb->BusTypes)));
3848 for (i = 0; i < 16; i++)
3849 temp_name[i] = readb(&(tb->ServerName[i]));
3850 temp_name[16] = '\0';
3851 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3852 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3853 readl(&(tb->HeartBeat)));
3854 }
3855
3856 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3857 {
3858 int i, offset, mem_type, bar_type;
3859 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3860 return 0;
3861 offset = 0;
3862 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3863 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3864 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3865 offset += 4;
3866 else {
3867 mem_type = pci_resource_flags(pdev, i) &
3868 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3869 switch (mem_type) {
3870 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3871 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3872 offset += 4; /* 32 bit */
3873 break;
3874 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3875 offset += 8;
3876 break;
3877 default: /* reserved in PCI 2.2 */
3878 dev_warn(&pdev->dev,
3879 "Base address is invalid\n");
3880 return -1;
3881 break;
3882 }
3883 }
3884 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3885 return i + 1;
3886 }
3887 return -1;
3888 }
3889
3890 /* Fill in bucket_map[], given nsgs (the max number of
3891 * scatter gather elements supported) and bucket[],
3892 * which is an array of 8 integers. The bucket[] array
3893 * contains 8 different DMA transfer sizes (in 16
3894 * byte increments) which the controller uses to fetch
3895 * commands. This function fills in bucket_map[], which
3896 * maps a given number of scatter gather elements to one of
3897 * the 8 DMA transfer sizes. The point of it is to allow the
3898 * controller to only do as much DMA as needed to fetch the
3899 * command, with the DMA transfer size encoded in the lower
3900 * bits of the command address.
3901 */
3902 static void calc_bucket_map(int bucket[], int num_buckets,
3903 int nsgs, int *bucket_map)
3904 {
3905 int i, j, b, size;
3906
3907 /* even a command with 0 SGs requires 4 blocks */
3908 #define MINIMUM_TRANSFER_BLOCKS 4
3909 #define NUM_BUCKETS 8
3910 /* Note, bucket_map must have nsgs+1 entries. */
3911 for (i = 0; i <= nsgs; i++) {
3912 /* Compute size of a command with i SG entries */
3913 size = i + MINIMUM_TRANSFER_BLOCKS;
3914 b = num_buckets; /* Assume the biggest bucket */
3915 /* Find the bucket that is just big enough */
3916 for (j = 0; j < 8; j++) {
3917 if (bucket[j] >= size) {
3918 b = j;
3919 break;
3920 }
3921 }
3922 /* for a command with i SG entries, use bucket b. */
3923 bucket_map[i] = b;
3924 }
3925 }
3926
3927 static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3928 {
3929 int i;
3930
3931 /* under certain very rare conditions, this can take awhile.
3932 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3933 * as we enter this code.) */
3934 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3935 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3936 break;
3937 usleep_range(10000, 20000);
3938 }
3939 }
3940
3941 static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
3942 {
3943 /* This is a bit complicated. There are 8 registers on
3944 * the controller which we write to to tell it 8 different
3945 * sizes of commands which there may be. It's a way of
3946 * reducing the DMA done to fetch each command. Encoded into
3947 * each command's tag are 3 bits which communicate to the controller
3948 * which of the eight sizes that command fits within. The size of
3949 * each command depends on how many scatter gather entries there are.
3950 * Each SG entry requires 16 bytes. The eight registers are programmed
3951 * with the number of 16-byte blocks a command of that size requires.
3952 * The smallest command possible requires 5 such 16 byte blocks.
3953 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3954 * blocks. Note, this only extends to the SG entries contained
3955 * within the command block, and does not extend to chained blocks
3956 * of SG elements. bft[] contains the eight values we write to
3957 * the registers. They are not evenly distributed, but have more
3958 * sizes for small commands, and fewer sizes for larger commands.
3959 */
3960 __u32 trans_offset;
3961 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3962 /*
3963 * 5 = 1 s/g entry or 4k
3964 * 6 = 2 s/g entry or 8k
3965 * 8 = 4 s/g entry or 16k
3966 * 10 = 6 s/g entry or 24k
3967 */
3968 unsigned long register_value;
3969 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3970
3971 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3972
3973 /* Controller spec: zero out this buffer. */
3974 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3975 h->reply_pool_head = h->reply_pool;
3976
3977 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3978 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3979 h->blockFetchTable);
3980 writel(bft[0], &h->transtable->BlockFetch0);
3981 writel(bft[1], &h->transtable->BlockFetch1);
3982 writel(bft[2], &h->transtable->BlockFetch2);
3983 writel(bft[3], &h->transtable->BlockFetch3);
3984 writel(bft[4], &h->transtable->BlockFetch4);
3985 writel(bft[5], &h->transtable->BlockFetch5);
3986 writel(bft[6], &h->transtable->BlockFetch6);
3987 writel(bft[7], &h->transtable->BlockFetch7);
3988
3989 /* size of controller ring buffer */
3990 writel(h->max_commands, &h->transtable->RepQSize);
3991 writel(1, &h->transtable->RepQCount);
3992 writel(0, &h->transtable->RepQCtrAddrLow32);
3993 writel(0, &h->transtable->RepQCtrAddrHigh32);
3994 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3995 writel(0, &h->transtable->RepQAddr0High32);
3996 writel(CFGTBL_Trans_Performant | use_short_tags,
3997 &(h->cfgtable->HostWrite.TransportRequest));
3998
3999 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4000 cciss_wait_for_mode_change_ack(h);
4001 register_value = readl(&(h->cfgtable->TransportActive));
4002 if (!(register_value & CFGTBL_Trans_Performant))
4003 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
4004 " performant mode\n");
4005 }
4006
4007 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4008 {
4009 __u32 trans_support;
4010
4011 if (cciss_simple_mode)
4012 return;
4013
4014 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4015 /* Attempt to put controller into performant mode if supported */
4016 /* Does board support performant mode? */
4017 trans_support = readl(&(h->cfgtable->TransportSupport));
4018 if (!(trans_support & PERFORMANT_MODE))
4019 return;
4020
4021 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4022 /* Performant mode demands commands on a 32 byte boundary
4023 * pci_alloc_consistent aligns on page boundarys already.
4024 * Just need to check if divisible by 32
4025 */
4026 if ((sizeof(CommandList_struct) % 32) != 0) {
4027 dev_warn(&h->pdev->dev, "%s %d %s\n",
4028 "cciss info: command size[",
4029 (int)sizeof(CommandList_struct),
4030 "] not divisible by 32, no performant mode..\n");
4031 return;
4032 }
4033
4034 /* Performant mode ring buffer and supporting data structures */
4035 h->reply_pool = (__u64 *)pci_alloc_consistent(
4036 h->pdev, h->max_commands * sizeof(__u64),
4037 &(h->reply_pool_dhandle));
4038
4039 /* Need a block fetch table for performant mode */
4040 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4041 sizeof(__u32)), GFP_KERNEL);
4042
4043 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4044 goto clean_up;
4045
4046 cciss_enter_performant_mode(h,
4047 trans_support & CFGTBL_Trans_use_short_tags);
4048
4049 /* Change the access methods to the performant access methods */
4050 h->access = SA5_performant_access;
4051 h->transMethod = CFGTBL_Trans_Performant;
4052
4053 return;
4054 clean_up:
4055 kfree(h->blockFetchTable);
4056 if (h->reply_pool)
4057 pci_free_consistent(h->pdev,
4058 h->max_commands * sizeof(__u64),
4059 h->reply_pool,
4060 h->reply_pool_dhandle);
4061 return;
4062
4063 } /* cciss_put_controller_into_performant_mode */
4064
4065 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4066 * controllers that are capable. If not, we use IO-APIC mode.
4067 */
4068
4069 static void cciss_interrupt_mode(ctlr_info_t *h)
4070 {
4071 #ifdef CONFIG_PCI_MSI
4072 int err;
4073 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4074 {0, 2}, {0, 3}
4075 };
4076
4077 /* Some boards advertise MSI but don't really support it */
4078 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4079 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4080 goto default_int_mode;
4081
4082 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4083 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
4084 if (!err) {
4085 h->intr[0] = cciss_msix_entries[0].vector;
4086 h->intr[1] = cciss_msix_entries[1].vector;
4087 h->intr[2] = cciss_msix_entries[2].vector;
4088 h->intr[3] = cciss_msix_entries[3].vector;
4089 h->msix_vector = 1;
4090 return;
4091 }
4092 if (err > 0) {
4093 dev_warn(&h->pdev->dev,
4094 "only %d MSI-X vectors available\n", err);
4095 goto default_int_mode;
4096 } else {
4097 dev_warn(&h->pdev->dev,
4098 "MSI-X init failed %d\n", err);
4099 goto default_int_mode;
4100 }
4101 }
4102 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4103 if (!pci_enable_msi(h->pdev))
4104 h->msi_vector = 1;
4105 else
4106 dev_warn(&h->pdev->dev, "MSI init failed\n");
4107 }
4108 default_int_mode:
4109 #endif /* CONFIG_PCI_MSI */
4110 /* if we get here we're going to use the default interrupt mode */
4111 h->intr[h->intr_mode] = h->pdev->irq;
4112 return;
4113 }
4114
4115 static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4116 {
4117 int i;
4118 u32 subsystem_vendor_id, subsystem_device_id;
4119
4120 subsystem_vendor_id = pdev->subsystem_vendor;
4121 subsystem_device_id = pdev->subsystem_device;
4122 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4123 subsystem_vendor_id;
4124
4125 for (i = 0; i < ARRAY_SIZE(products); i++) {
4126 /* Stand aside for hpsa driver on request */
4127 if (cciss_allow_hpsa)
4128 return -ENODEV;
4129 if (*board_id == products[i].board_id)
4130 return i;
4131 }
4132 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4133 *board_id);
4134 return -ENODEV;
4135 }
4136
4137 static inline bool cciss_board_disabled(ctlr_info_t *h)
4138 {
4139 u16 command;
4140
4141 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4142 return ((command & PCI_COMMAND_MEMORY) == 0);
4143 }
4144
4145 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4146 unsigned long *memory_bar)
4147 {
4148 int i;
4149
4150 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4151 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4152 /* addressing mode bits already removed */
4153 *memory_bar = pci_resource_start(pdev, i);
4154 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4155 *memory_bar);
4156 return 0;
4157 }
4158 dev_warn(&pdev->dev, "no memory BAR found\n");
4159 return -ENODEV;
4160 }
4161
4162 static int cciss_wait_for_board_state(struct pci_dev *pdev,
4163 void __iomem *vaddr, int wait_for_ready)
4164 #define BOARD_READY 1
4165 #define BOARD_NOT_READY 0
4166 {
4167 int i, iterations;
4168 u32 scratchpad;
4169
4170 if (wait_for_ready)
4171 iterations = CCISS_BOARD_READY_ITERATIONS;
4172 else
4173 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4174
4175 for (i = 0; i < iterations; i++) {
4176 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4177 if (wait_for_ready) {
4178 if (scratchpad == CCISS_FIRMWARE_READY)
4179 return 0;
4180 } else {
4181 if (scratchpad != CCISS_FIRMWARE_READY)
4182 return 0;
4183 }
4184 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4185 }
4186 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4187 return -ENODEV;
4188 }
4189
4190 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4191 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4192 u64 *cfg_offset)
4193 {
4194 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4195 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4196 *cfg_base_addr &= (u32) 0x0000ffff;
4197 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4198 if (*cfg_base_addr_index == -1) {
4199 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4200 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4201 return -ENODEV;
4202 }
4203 return 0;
4204 }
4205
4206 static int cciss_find_cfgtables(ctlr_info_t *h)
4207 {
4208 u64 cfg_offset;
4209 u32 cfg_base_addr;
4210 u64 cfg_base_addr_index;
4211 u32 trans_offset;
4212 int rc;
4213
4214 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4215 &cfg_base_addr_index, &cfg_offset);
4216 if (rc)
4217 return rc;
4218 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4219 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4220 if (!h->cfgtable)
4221 return -ENOMEM;
4222 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4223 if (rc)
4224 return rc;
4225 /* Find performant mode table. */
4226 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4227 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4228 cfg_base_addr_index)+cfg_offset+trans_offset,
4229 sizeof(*h->transtable));
4230 if (!h->transtable)
4231 return -ENOMEM;
4232 return 0;
4233 }
4234
4235 static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4236 {
4237 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4238
4239 /* Limit commands in memory limited kdump scenario. */
4240 if (reset_devices && h->max_commands > 32)
4241 h->max_commands = 32;
4242
4243 if (h->max_commands < 16) {
4244 dev_warn(&h->pdev->dev, "Controller reports "
4245 "max supported commands of %d, an obvious lie. "
4246 "Using 16. Ensure that firmware is up to date.\n",
4247 h->max_commands);
4248 h->max_commands = 16;
4249 }
4250 }
4251
4252 /* Interrogate the hardware for some limits:
4253 * max commands, max SG elements without chaining, and with chaining,
4254 * SG chain block size, etc.
4255 */
4256 static void cciss_find_board_params(ctlr_info_t *h)
4257 {
4258 cciss_get_max_perf_mode_cmds(h);
4259 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4260 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4261 /*
4262 * Limit in-command s/g elements to 32 save dma'able memory.
4263 * Howvever spec says if 0, use 31
4264 */
4265 h->max_cmd_sgentries = 31;
4266 if (h->maxsgentries > 512) {
4267 h->max_cmd_sgentries = 32;
4268 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4269 h->maxsgentries--; /* save one for chain pointer */
4270 } else {
4271 h->maxsgentries = 31; /* default to traditional values */
4272 h->chainsize = 0;
4273 }
4274 }
4275
4276 static inline bool CISS_signature_present(ctlr_info_t *h)
4277 {
4278 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4279 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4280 return false;
4281 }
4282 return true;
4283 }
4284
4285 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4286 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4287 {
4288 #ifdef CONFIG_X86
4289 u32 prefetch;
4290
4291 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4292 prefetch |= 0x100;
4293 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4294 #endif
4295 }
4296
4297 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4298 * in a prefetch beyond physical memory.
4299 */
4300 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4301 {
4302 u32 dma_prefetch;
4303 __u32 dma_refetch;
4304
4305 if (h->board_id != 0x3225103C)
4306 return;
4307 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4308 dma_prefetch |= 0x8000;
4309 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4310 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4311 dma_refetch |= 0x1;
4312 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4313 }
4314
4315 static int cciss_pci_init(ctlr_info_t *h)
4316 {
4317 int prod_index, err;
4318
4319 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4320 if (prod_index < 0)
4321 return -ENODEV;
4322 h->product_name = products[prod_index].product_name;
4323 h->access = *(products[prod_index].access);
4324
4325 if (cciss_board_disabled(h)) {
4326 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4327 return -ENODEV;
4328 }
4329
4330 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4331 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4332
4333 err = pci_enable_device(h->pdev);
4334 if (err) {
4335 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4336 return err;
4337 }
4338
4339 err = pci_request_regions(h->pdev, "cciss");
4340 if (err) {
4341 dev_warn(&h->pdev->dev,
4342 "Cannot obtain PCI resources, aborting\n");
4343 return err;
4344 }
4345
4346 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4347 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4348
4349 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4350 * else we use the IO-APIC interrupt assigned to us by system ROM.
4351 */
4352 cciss_interrupt_mode(h);
4353 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4354 if (err)
4355 goto err_out_free_res;
4356 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4357 if (!h->vaddr) {
4358 err = -ENOMEM;
4359 goto err_out_free_res;
4360 }
4361 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4362 if (err)
4363 goto err_out_free_res;
4364 err = cciss_find_cfgtables(h);
4365 if (err)
4366 goto err_out_free_res;
4367 print_cfg_table(h);
4368 cciss_find_board_params(h);
4369
4370 if (!CISS_signature_present(h)) {
4371 err = -ENODEV;
4372 goto err_out_free_res;
4373 }
4374 cciss_enable_scsi_prefetch(h);
4375 cciss_p600_dma_prefetch_quirk(h);
4376 err = cciss_enter_simple_mode(h);
4377 if (err)
4378 goto err_out_free_res;
4379 cciss_put_controller_into_performant_mode(h);
4380 return 0;
4381
4382 err_out_free_res:
4383 /*
4384 * Deliberately omit pci_disable_device(): it does something nasty to
4385 * Smart Array controllers that pci_enable_device does not undo
4386 */
4387 if (h->transtable)
4388 iounmap(h->transtable);
4389 if (h->cfgtable)
4390 iounmap(h->cfgtable);
4391 if (h->vaddr)
4392 iounmap(h->vaddr);
4393 pci_release_regions(h->pdev);
4394 return err;
4395 }
4396
4397 /* Function to find the first free pointer into our hba[] array
4398 * Returns -1 if no free entries are left.
4399 */
4400 static int alloc_cciss_hba(struct pci_dev *pdev)
4401 {
4402 int i;
4403
4404 for (i = 0; i < MAX_CTLR; i++) {
4405 if (!hba[i]) {
4406 ctlr_info_t *h;
4407
4408 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4409 if (!h)
4410 goto Enomem;
4411 hba[i] = h;
4412 return i;
4413 }
4414 }
4415 dev_warn(&pdev->dev, "This driver supports a maximum"
4416 " of %d controllers.\n", MAX_CTLR);
4417 return -1;
4418 Enomem:
4419 dev_warn(&pdev->dev, "out of memory.\n");
4420 return -1;
4421 }
4422
4423 static void free_hba(ctlr_info_t *h)
4424 {
4425 int i;
4426
4427 hba[h->ctlr] = NULL;
4428 for (i = 0; i < h->highest_lun + 1; i++)
4429 if (h->gendisk[i] != NULL)
4430 put_disk(h->gendisk[i]);
4431 kfree(h);
4432 }
4433
4434 /* Send a message CDB to the firmware. */
4435 static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4436 unsigned char type)
4437 {
4438 typedef struct {
4439 CommandListHeader_struct CommandHeader;
4440 RequestBlock_struct Request;
4441 ErrDescriptor_struct ErrorDescriptor;
4442 } Command;
4443 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4444 Command *cmd;
4445 dma_addr_t paddr64;
4446 uint32_t paddr32, tag;
4447 void __iomem *vaddr;
4448 int i, err;
4449
4450 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4451 if (vaddr == NULL)
4452 return -ENOMEM;
4453
4454 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4455 CCISS commands, so they must be allocated from the lower 4GiB of
4456 memory. */
4457 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4458 if (err) {
4459 iounmap(vaddr);
4460 return -ENOMEM;
4461 }
4462
4463 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4464 if (cmd == NULL) {
4465 iounmap(vaddr);
4466 return -ENOMEM;
4467 }
4468
4469 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4470 although there's no guarantee, we assume that the address is at
4471 least 4-byte aligned (most likely, it's page-aligned). */
4472 paddr32 = paddr64;
4473
4474 cmd->CommandHeader.ReplyQueue = 0;
4475 cmd->CommandHeader.SGList = 0;
4476 cmd->CommandHeader.SGTotal = 0;
4477 cmd->CommandHeader.Tag.lower = paddr32;
4478 cmd->CommandHeader.Tag.upper = 0;
4479 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4480
4481 cmd->Request.CDBLen = 16;
4482 cmd->Request.Type.Type = TYPE_MSG;
4483 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4484 cmd->Request.Type.Direction = XFER_NONE;
4485 cmd->Request.Timeout = 0; /* Don't time out */
4486 cmd->Request.CDB[0] = opcode;
4487 cmd->Request.CDB[1] = type;
4488 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4489
4490 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4491 cmd->ErrorDescriptor.Addr.upper = 0;
4492 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4493
4494 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4495
4496 for (i = 0; i < 10; i++) {
4497 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4498 if ((tag & ~3) == paddr32)
4499 break;
4500 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4501 }
4502
4503 iounmap(vaddr);
4504
4505 /* we leak the DMA buffer here ... no choice since the controller could
4506 still complete the command. */
4507 if (i == 10) {
4508 dev_err(&pdev->dev,
4509 "controller message %02x:%02x timed out\n",
4510 opcode, type);
4511 return -ETIMEDOUT;
4512 }
4513
4514 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4515
4516 if (tag & 2) {
4517 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4518 opcode, type);
4519 return -EIO;
4520 }
4521
4522 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4523 opcode, type);
4524 return 0;
4525 }
4526
4527 #define cciss_noop(p) cciss_message(p, 3, 0)
4528
4529 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4530 void * __iomem vaddr, u32 use_doorbell)
4531 {
4532 u16 pmcsr;
4533 int pos;
4534
4535 if (use_doorbell) {
4536 /* For everything after the P600, the PCI power state method
4537 * of resetting the controller doesn't work, so we have this
4538 * other way using the doorbell register.
4539 */
4540 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4541 writel(use_doorbell, vaddr + SA5_DOORBELL);
4542 } else { /* Try to do it the PCI power state way */
4543
4544 /* Quoting from the Open CISS Specification: "The Power
4545 * Management Control/Status Register (CSR) controls the power
4546 * state of the device. The normal operating state is D0,
4547 * CSR=00h. The software off state is D3, CSR=03h. To reset
4548 * the controller, place the interface device in D3 then to D0,
4549 * this causes a secondary PCI reset which will reset the
4550 * controller." */
4551
4552 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4553 if (pos == 0) {
4554 dev_err(&pdev->dev,
4555 "cciss_controller_hard_reset: "
4556 "PCI PM not supported\n");
4557 return -ENODEV;
4558 }
4559 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4560 /* enter the D3hot power management state */
4561 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4562 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4563 pmcsr |= PCI_D3hot;
4564 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4565
4566 msleep(500);
4567
4568 /* enter the D0 power management state */
4569 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4570 pmcsr |= PCI_D0;
4571 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4572
4573 /*
4574 * The P600 requires a small delay when changing states.
4575 * Otherwise we may think the board did not reset and we bail.
4576 * This for kdump only and is particular to the P600.
4577 */
4578 msleep(500);
4579 }
4580 return 0;
4581 }
4582
4583 static void init_driver_version(char *driver_version, int len)
4584 {
4585 memset(driver_version, 0, len);
4586 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4587 }
4588
4589 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
4590 {
4591 char *driver_version;
4592 int i, size = sizeof(cfgtable->driver_version);
4593
4594 driver_version = kmalloc(size, GFP_KERNEL);
4595 if (!driver_version)
4596 return -ENOMEM;
4597
4598 init_driver_version(driver_version, size);
4599 for (i = 0; i < size; i++)
4600 writeb(driver_version[i], &cfgtable->driver_version[i]);
4601 kfree(driver_version);
4602 return 0;
4603 }
4604
4605 static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4606 unsigned char *driver_ver)
4607 {
4608 int i;
4609
4610 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4611 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4612 }
4613
4614 static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
4615 {
4616
4617 char *driver_ver, *old_driver_ver;
4618 int rc, size = sizeof(cfgtable->driver_version);
4619
4620 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4621 if (!old_driver_ver)
4622 return -ENOMEM;
4623 driver_ver = old_driver_ver + size;
4624
4625 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4626 * should have been changed, otherwise we know the reset failed.
4627 */
4628 init_driver_version(old_driver_ver, size);
4629 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4630 rc = !memcmp(driver_ver, old_driver_ver, size);
4631 kfree(old_driver_ver);
4632 return rc;
4633 }
4634
4635 /* This does a hard reset of the controller using PCI power management
4636 * states or using the doorbell register. */
4637 static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4638 {
4639 u64 cfg_offset;
4640 u32 cfg_base_addr;
4641 u64 cfg_base_addr_index;
4642 void __iomem *vaddr;
4643 unsigned long paddr;
4644 u32 misc_fw_support;
4645 int rc;
4646 CfgTable_struct __iomem *cfgtable;
4647 u32 use_doorbell;
4648 u32 board_id;
4649 u16 command_register;
4650
4651 /* For controllers as old a the p600, this is very nearly
4652 * the same thing as
4653 *
4654 * pci_save_state(pci_dev);
4655 * pci_set_power_state(pci_dev, PCI_D3hot);
4656 * pci_set_power_state(pci_dev, PCI_D0);
4657 * pci_restore_state(pci_dev);
4658 *
4659 * For controllers newer than the P600, the pci power state
4660 * method of resetting doesn't work so we have another way
4661 * using the doorbell register.
4662 */
4663
4664 /* Exclude 640x boards. These are two pci devices in one slot
4665 * which share a battery backed cache module. One controls the
4666 * cache, the other accesses the cache through the one that controls
4667 * it. If we reset the one controlling the cache, the other will
4668 * likely not be happy. Just forbid resetting this conjoined mess.
4669 */
4670 cciss_lookup_board_id(pdev, &board_id);
4671 if (!ctlr_is_resettable(board_id)) {
4672 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4673 "due to shared cache module.");
4674 return -ENODEV;
4675 }
4676
4677 /* if controller is soft- but not hard resettable... */
4678 if (!ctlr_is_hard_resettable(board_id))
4679 return -ENOTSUPP; /* try soft reset later. */
4680
4681 /* Save the PCI command register */
4682 pci_read_config_word(pdev, 4, &command_register);
4683 /* Turn the board off. This is so that later pci_restore_state()
4684 * won't turn the board on before the rest of config space is ready.
4685 */
4686 pci_disable_device(pdev);
4687 pci_save_state(pdev);
4688
4689 /* find the first memory BAR, so we can find the cfg table */
4690 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4691 if (rc)
4692 return rc;
4693 vaddr = remap_pci_mem(paddr, 0x250);
4694 if (!vaddr)
4695 return -ENOMEM;
4696
4697 /* find cfgtable in order to check if reset via doorbell is supported */
4698 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4699 &cfg_base_addr_index, &cfg_offset);
4700 if (rc)
4701 goto unmap_vaddr;
4702 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4703 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4704 if (!cfgtable) {
4705 rc = -ENOMEM;
4706 goto unmap_vaddr;
4707 }
4708 rc = write_driver_ver_to_cfgtable(cfgtable);
4709 if (rc)
4710 goto unmap_vaddr;
4711
4712 /* If reset via doorbell register is supported, use that.
4713 * There are two such methods. Favor the newest method.
4714 */
4715 misc_fw_support = readl(&cfgtable->misc_fw_support);
4716 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4717 if (use_doorbell) {
4718 use_doorbell = DOORBELL_CTLR_RESET2;
4719 } else {
4720 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4721 if (use_doorbell) {
4722 dev_warn(&pdev->dev, "Controller claims that "
4723 "'Bit 2 doorbell reset' is "
4724 "supported, but not 'bit 5 doorbell reset'. "
4725 "Firmware update is recommended.\n");
4726 rc = -ENOTSUPP; /* use the soft reset */
4727 goto unmap_cfgtable;
4728 }
4729 }
4730
4731 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4732 if (rc)
4733 goto unmap_cfgtable;
4734 pci_restore_state(pdev);
4735 rc = pci_enable_device(pdev);
4736 if (rc) {
4737 dev_warn(&pdev->dev, "failed to enable device.\n");
4738 goto unmap_cfgtable;
4739 }
4740 pci_write_config_word(pdev, 4, command_register);
4741
4742 /* Some devices (notably the HP Smart Array 5i Controller)
4743 need a little pause here */
4744 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4745
4746 /* Wait for board to become not ready, then ready. */
4747 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4748 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4749 if (rc) {
4750 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4751 " Will try soft reset.\n");
4752 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4753 goto unmap_cfgtable;
4754 }
4755 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4756 if (rc) {
4757 dev_warn(&pdev->dev,
4758 "failed waiting for board to become ready "
4759 "after hard reset\n");
4760 goto unmap_cfgtable;
4761 }
4762
4763 rc = controller_reset_failed(vaddr);
4764 if (rc < 0)
4765 goto unmap_cfgtable;
4766 if (rc) {
4767 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4768 "controller. Will try soft reset.\n");
4769 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4770 } else {
4771 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4772 }
4773
4774 unmap_cfgtable:
4775 iounmap(cfgtable);
4776
4777 unmap_vaddr:
4778 iounmap(vaddr);
4779 return rc;
4780 }
4781
4782 static int cciss_init_reset_devices(struct pci_dev *pdev)
4783 {
4784 int rc, i;
4785
4786 if (!reset_devices)
4787 return 0;
4788
4789 /* Reset the controller with a PCI power-cycle or via doorbell */
4790 rc = cciss_kdump_hard_reset_controller(pdev);
4791
4792 /* -ENOTSUPP here means we cannot reset the controller
4793 * but it's already (and still) up and running in
4794 * "performant mode". Or, it might be 640x, which can't reset
4795 * due to concerns about shared bbwc between 6402/6404 pair.
4796 */
4797 if (rc == -ENOTSUPP)
4798 return rc; /* just try to do the kdump anyhow. */
4799 if (rc)
4800 return -ENODEV;
4801
4802 /* Now try to get the controller to respond to a no-op */
4803 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4804 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4805 if (cciss_noop(pdev) == 0)
4806 break;
4807 else
4808 dev_warn(&pdev->dev, "no-op failed%s\n",
4809 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4810 "; re-trying" : ""));
4811 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4812 }
4813 return 0;
4814 }
4815
4816 static int cciss_allocate_cmd_pool(ctlr_info_t *h)
4817 {
4818 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4819 sizeof(unsigned long), GFP_KERNEL);
4820 h->cmd_pool = pci_alloc_consistent(h->pdev,
4821 h->nr_cmds * sizeof(CommandList_struct),
4822 &(h->cmd_pool_dhandle));
4823 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4824 h->nr_cmds * sizeof(ErrorInfo_struct),
4825 &(h->errinfo_pool_dhandle));
4826 if ((h->cmd_pool_bits == NULL)
4827 || (h->cmd_pool == NULL)
4828 || (h->errinfo_pool == NULL)) {
4829 dev_err(&h->pdev->dev, "out of memory");
4830 return -ENOMEM;
4831 }
4832 return 0;
4833 }
4834
4835 static int cciss_allocate_scatterlists(ctlr_info_t *h)
4836 {
4837 int i;
4838
4839 /* zero it, so that on free we need not know how many were alloc'ed */
4840 h->scatter_list = kzalloc(h->max_commands *
4841 sizeof(struct scatterlist *), GFP_KERNEL);
4842 if (!h->scatter_list)
4843 return -ENOMEM;
4844
4845 for (i = 0; i < h->nr_cmds; i++) {
4846 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4847 h->maxsgentries, GFP_KERNEL);
4848 if (h->scatter_list[i] == NULL) {
4849 dev_err(&h->pdev->dev, "could not allocate "
4850 "s/g lists\n");
4851 return -ENOMEM;
4852 }
4853 }
4854 return 0;
4855 }
4856
4857 static void cciss_free_scatterlists(ctlr_info_t *h)
4858 {
4859 int i;
4860
4861 if (h->scatter_list) {
4862 for (i = 0; i < h->nr_cmds; i++)
4863 kfree(h->scatter_list[i]);
4864 kfree(h->scatter_list);
4865 }
4866 }
4867
4868 static void cciss_free_cmd_pool(ctlr_info_t *h)
4869 {
4870 kfree(h->cmd_pool_bits);
4871 if (h->cmd_pool)
4872 pci_free_consistent(h->pdev,
4873 h->nr_cmds * sizeof(CommandList_struct),
4874 h->cmd_pool, h->cmd_pool_dhandle);
4875 if (h->errinfo_pool)
4876 pci_free_consistent(h->pdev,
4877 h->nr_cmds * sizeof(ErrorInfo_struct),
4878 h->errinfo_pool, h->errinfo_pool_dhandle);
4879 }
4880
4881 static int cciss_request_irq(ctlr_info_t *h,
4882 irqreturn_t (*msixhandler)(int, void *),
4883 irqreturn_t (*intxhandler)(int, void *))
4884 {
4885 if (h->msix_vector || h->msi_vector) {
4886 if (!request_irq(h->intr[h->intr_mode], msixhandler,
4887 0, h->devname, h))
4888 return 0;
4889 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4890 " for %s\n", h->intr[h->intr_mode],
4891 h->devname);
4892 return -1;
4893 }
4894
4895 if (!request_irq(h->intr[h->intr_mode], intxhandler,
4896 IRQF_SHARED, h->devname, h))
4897 return 0;
4898 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4899 h->intr[h->intr_mode], h->devname);
4900 return -1;
4901 }
4902
4903 static int cciss_kdump_soft_reset(ctlr_info_t *h)
4904 {
4905 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4906 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4907 return -EIO;
4908 }
4909
4910 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4911 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4912 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4913 return -1;
4914 }
4915
4916 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4917 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4918 dev_warn(&h->pdev->dev, "Board failed to become ready "
4919 "after soft reset.\n");
4920 return -1;
4921 }
4922
4923 return 0;
4924 }
4925
4926 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4927 {
4928 int ctlr = h->ctlr;
4929
4930 free_irq(h->intr[h->intr_mode], h);
4931 #ifdef CONFIG_PCI_MSI
4932 if (h->msix_vector)
4933 pci_disable_msix(h->pdev);
4934 else if (h->msi_vector)
4935 pci_disable_msi(h->pdev);
4936 #endif /* CONFIG_PCI_MSI */
4937 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4938 cciss_free_scatterlists(h);
4939 cciss_free_cmd_pool(h);
4940 kfree(h->blockFetchTable);
4941 if (h->reply_pool)
4942 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4943 h->reply_pool, h->reply_pool_dhandle);
4944 if (h->transtable)
4945 iounmap(h->transtable);
4946 if (h->cfgtable)
4947 iounmap(h->cfgtable);
4948 if (h->vaddr)
4949 iounmap(h->vaddr);
4950 unregister_blkdev(h->major, h->devname);
4951 cciss_destroy_hba_sysfs_entry(h);
4952 pci_release_regions(h->pdev);
4953 kfree(h);
4954 hba[ctlr] = NULL;
4955 }
4956
4957 /*
4958 * This is it. Find all the controllers and register them. I really hate
4959 * stealing all these major device numbers.
4960 * returns the number of block devices registered.
4961 */
4962 static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4963 {
4964 int i;
4965 int j = 0;
4966 int rc;
4967 int try_soft_reset = 0;
4968 int dac, return_code;
4969 InquiryData_struct *inq_buff;
4970 ctlr_info_t *h;
4971 unsigned long flags;
4972
4973 /*
4974 * By default the cciss driver is used for all older HP Smart Array
4975 * controllers. There are module paramaters that allow a user to
4976 * override this behavior and instead use the hpsa SCSI driver. If
4977 * this is the case cciss may be loaded first from the kdump initrd
4978 * image and cause a kernel panic. So if reset_devices is true and
4979 * cciss_allow_hpsa is set just bail.
4980 */
4981 if ((reset_devices) && (cciss_allow_hpsa == 1))
4982 return -ENODEV;
4983 rc = cciss_init_reset_devices(pdev);
4984 if (rc) {
4985 if (rc != -ENOTSUPP)
4986 return rc;
4987 /* If the reset fails in a particular way (it has no way to do
4988 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4989 * a soft reset once we get the controller configured up to the
4990 * point that it can accept a command.
4991 */
4992 try_soft_reset = 1;
4993 rc = 0;
4994 }
4995
4996 reinit_after_soft_reset:
4997
4998 i = alloc_cciss_hba(pdev);
4999 if (i < 0)
5000 return -1;
5001
5002 h = hba[i];
5003 h->pdev = pdev;
5004 h->busy_initializing = 1;
5005 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
5006 INIT_LIST_HEAD(&h->cmpQ);
5007 INIT_LIST_HEAD(&h->reqQ);
5008 mutex_init(&h->busy_shutting_down);
5009
5010 if (cciss_pci_init(h) != 0)
5011 goto clean_no_release_regions;
5012
5013 sprintf(h->devname, "cciss%d", i);
5014 h->ctlr = i;
5015
5016 if (cciss_tape_cmds < 2)
5017 cciss_tape_cmds = 2;
5018 if (cciss_tape_cmds > 16)
5019 cciss_tape_cmds = 16;
5020
5021 init_completion(&h->scan_wait);
5022
5023 if (cciss_create_hba_sysfs_entry(h))
5024 goto clean0;
5025
5026 /* configure PCI DMA stuff */
5027 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5028 dac = 1;
5029 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5030 dac = 0;
5031 else {
5032 dev_err(&h->pdev->dev, "no suitable DMA available\n");
5033 goto clean1;
5034 }
5035
5036 /*
5037 * register with the major number, or get a dynamic major number
5038 * by passing 0 as argument. This is done for greater than
5039 * 8 controller support.
5040 */
5041 if (i < MAX_CTLR_ORIG)
5042 h->major = COMPAQ_CISS_MAJOR + i;
5043 rc = register_blkdev(h->major, h->devname);
5044 if (rc == -EBUSY || rc == -EINVAL) {
5045 dev_err(&h->pdev->dev,
5046 "Unable to get major number %d for %s "
5047 "on hba %d\n", h->major, h->devname, i);
5048 goto clean1;
5049 } else {
5050 if (i >= MAX_CTLR_ORIG)
5051 h->major = rc;
5052 }
5053
5054 /* make sure the board interrupts are off */
5055 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5056 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5057 if (rc)
5058 goto clean2;
5059
5060 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5061 h->devname, pdev->device, pci_name(pdev),
5062 h->intr[h->intr_mode], dac ? "" : " not");
5063
5064 if (cciss_allocate_cmd_pool(h))
5065 goto clean4;
5066
5067 if (cciss_allocate_scatterlists(h))
5068 goto clean4;
5069
5070 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5071 h->chainsize, h->nr_cmds);
5072 if (!h->cmd_sg_list && h->chainsize > 0)
5073 goto clean4;
5074
5075 spin_lock_init(&h->lock);
5076
5077 /* Initialize the pdev driver private data.
5078 have it point to h. */
5079 pci_set_drvdata(pdev, h);
5080 /* command and error info recs zeroed out before
5081 they are used */
5082 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5083
5084 h->num_luns = 0;
5085 h->highest_lun = -1;
5086 for (j = 0; j < CISS_MAX_LUN; j++) {
5087 h->drv[j] = NULL;
5088 h->gendisk[j] = NULL;
5089 }
5090
5091 /* At this point, the controller is ready to take commands.
5092 * Now, if reset_devices and the hard reset didn't work, try
5093 * the soft reset and see if that works.
5094 */
5095 if (try_soft_reset) {
5096
5097 /* This is kind of gross. We may or may not get a completion
5098 * from the soft reset command, and if we do, then the value
5099 * from the fifo may or may not be valid. So, we wait 10 secs
5100 * after the reset throwing away any completions we get during
5101 * that time. Unregister the interrupt handler and register
5102 * fake ones to scoop up any residual completions.
5103 */
5104 spin_lock_irqsave(&h->lock, flags);
5105 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5106 spin_unlock_irqrestore(&h->lock, flags);
5107 free_irq(h->intr[h->intr_mode], h);
5108 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5109 cciss_intx_discard_completions);
5110 if (rc) {
5111 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5112 "soft reset.\n");
5113 goto clean4;
5114 }
5115
5116 rc = cciss_kdump_soft_reset(h);
5117 if (rc) {
5118 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5119 goto clean4;
5120 }
5121
5122 dev_info(&h->pdev->dev, "Board READY.\n");
5123 dev_info(&h->pdev->dev,
5124 "Waiting for stale completions to drain.\n");
5125 h->access.set_intr_mask(h, CCISS_INTR_ON);
5126 msleep(10000);
5127 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5128
5129 rc = controller_reset_failed(h->cfgtable);
5130 if (rc)
5131 dev_info(&h->pdev->dev,
5132 "Soft reset appears to have failed.\n");
5133
5134 /* since the controller's reset, we have to go back and re-init
5135 * everything. Easiest to just forget what we've done and do it
5136 * all over again.
5137 */
5138 cciss_undo_allocations_after_kdump_soft_reset(h);
5139 try_soft_reset = 0;
5140 if (rc)
5141 /* don't go to clean4, we already unallocated */
5142 return -ENODEV;
5143
5144 goto reinit_after_soft_reset;
5145 }
5146
5147 cciss_scsi_setup(h);
5148
5149 /* Turn the interrupts on so we can service requests */
5150 h->access.set_intr_mask(h, CCISS_INTR_ON);
5151
5152 /* Get the firmware version */
5153 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5154 if (inq_buff == NULL) {
5155 dev_err(&h->pdev->dev, "out of memory\n");
5156 goto clean4;
5157 }
5158
5159 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5160 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5161 if (return_code == IO_OK) {
5162 h->firm_ver[0] = inq_buff->data_byte[32];
5163 h->firm_ver[1] = inq_buff->data_byte[33];
5164 h->firm_ver[2] = inq_buff->data_byte[34];
5165 h->firm_ver[3] = inq_buff->data_byte[35];
5166 } else { /* send command failed */
5167 dev_warn(&h->pdev->dev, "unable to determine firmware"
5168 " version of controller\n");
5169 }
5170 kfree(inq_buff);
5171
5172 cciss_procinit(h);
5173
5174 h->cciss_max_sectors = 8192;
5175
5176 rebuild_lun_table(h, 1, 0);
5177 cciss_engage_scsi(h);
5178 h->busy_initializing = 0;
5179 return 1;
5180
5181 clean4:
5182 cciss_free_cmd_pool(h);
5183 cciss_free_scatterlists(h);
5184 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5185 free_irq(h->intr[h->intr_mode], h);
5186 clean2:
5187 unregister_blkdev(h->major, h->devname);
5188 clean1:
5189 cciss_destroy_hba_sysfs_entry(h);
5190 clean0:
5191 pci_release_regions(pdev);
5192 clean_no_release_regions:
5193 h->busy_initializing = 0;
5194
5195 /*
5196 * Deliberately omit pci_disable_device(): it does something nasty to
5197 * Smart Array controllers that pci_enable_device does not undo
5198 */
5199 pci_set_drvdata(pdev, NULL);
5200 free_hba(h);
5201 return -1;
5202 }
5203
5204 static void cciss_shutdown(struct pci_dev *pdev)
5205 {
5206 ctlr_info_t *h;
5207 char *flush_buf;
5208 int return_code;
5209
5210 h = pci_get_drvdata(pdev);
5211 flush_buf = kzalloc(4, GFP_KERNEL);
5212 if (!flush_buf) {
5213 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5214 return;
5215 }
5216 /* write all data in the battery backed cache to disk */
5217 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5218 4, 0, CTLR_LUNID, TYPE_CMD);
5219 kfree(flush_buf);
5220 if (return_code != IO_OK)
5221 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5222 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5223 free_irq(h->intr[h->intr_mode], h);
5224 }
5225
5226 static int cciss_enter_simple_mode(struct ctlr_info *h)
5227 {
5228 u32 trans_support;
5229
5230 trans_support = readl(&(h->cfgtable->TransportSupport));
5231 if (!(trans_support & SIMPLE_MODE))
5232 return -ENOTSUPP;
5233
5234 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5235 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5236 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5237 cciss_wait_for_mode_change_ack(h);
5238 print_cfg_table(h);
5239 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5240 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5241 return -ENODEV;
5242 }
5243 h->transMethod = CFGTBL_Trans_Simple;
5244 return 0;
5245 }
5246
5247
5248 static void cciss_remove_one(struct pci_dev *pdev)
5249 {
5250 ctlr_info_t *h;
5251 int i, j;
5252
5253 if (pci_get_drvdata(pdev) == NULL) {
5254 dev_err(&pdev->dev, "Unable to remove device\n");
5255 return;
5256 }
5257
5258 h = pci_get_drvdata(pdev);
5259 i = h->ctlr;
5260 if (hba[i] == NULL) {
5261 dev_err(&pdev->dev, "device appears to already be removed\n");
5262 return;
5263 }
5264
5265 mutex_lock(&h->busy_shutting_down);
5266
5267 remove_from_scan_list(h);
5268 remove_proc_entry(h->devname, proc_cciss);
5269 unregister_blkdev(h->major, h->devname);
5270
5271 /* remove it from the disk list */
5272 for (j = 0; j < CISS_MAX_LUN; j++) {
5273 struct gendisk *disk = h->gendisk[j];
5274 if (disk) {
5275 struct request_queue *q = disk->queue;
5276
5277 if (disk->flags & GENHD_FL_UP) {
5278 cciss_destroy_ld_sysfs_entry(h, j, 1);
5279 del_gendisk(disk);
5280 }
5281 if (q)
5282 blk_cleanup_queue(q);
5283 }
5284 }
5285
5286 #ifdef CONFIG_CISS_SCSI_TAPE
5287 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
5288 #endif
5289
5290 cciss_shutdown(pdev);
5291
5292 #ifdef CONFIG_PCI_MSI
5293 if (h->msix_vector)
5294 pci_disable_msix(h->pdev);
5295 else if (h->msi_vector)
5296 pci_disable_msi(h->pdev);
5297 #endif /* CONFIG_PCI_MSI */
5298
5299 iounmap(h->transtable);
5300 iounmap(h->cfgtable);
5301 iounmap(h->vaddr);
5302
5303 cciss_free_cmd_pool(h);
5304 /* Free up sg elements */
5305 for (j = 0; j < h->nr_cmds; j++)
5306 kfree(h->scatter_list[j]);
5307 kfree(h->scatter_list);
5308 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5309 kfree(h->blockFetchTable);
5310 if (h->reply_pool)
5311 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5312 h->reply_pool, h->reply_pool_dhandle);
5313 /*
5314 * Deliberately omit pci_disable_device(): it does something nasty to
5315 * Smart Array controllers that pci_enable_device does not undo
5316 */
5317 pci_release_regions(pdev);
5318 pci_set_drvdata(pdev, NULL);
5319 cciss_destroy_hba_sysfs_entry(h);
5320 mutex_unlock(&h->busy_shutting_down);
5321 free_hba(h);
5322 }
5323
5324 static struct pci_driver cciss_pci_driver = {
5325 .name = "cciss",
5326 .probe = cciss_init_one,
5327 .remove = cciss_remove_one,
5328 .id_table = cciss_pci_device_id, /* id_table */
5329 .shutdown = cciss_shutdown,
5330 };
5331
5332 /*
5333 * This is it. Register the PCI driver information for the cards we control
5334 * the OS will call our registered routines when it finds one of our cards.
5335 */
5336 static int __init cciss_init(void)
5337 {
5338 int err;
5339
5340 /*
5341 * The hardware requires that commands are aligned on a 64-bit
5342 * boundary. Given that we use pci_alloc_consistent() to allocate an
5343 * array of them, the size must be a multiple of 8 bytes.
5344 */
5345 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5346 printk(KERN_INFO DRIVER_NAME "\n");
5347
5348 err = bus_register(&cciss_bus_type);
5349 if (err)
5350 return err;
5351
5352 /* Start the scan thread */
5353 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5354 if (IS_ERR(cciss_scan_thread)) {
5355 err = PTR_ERR(cciss_scan_thread);
5356 goto err_bus_unregister;
5357 }
5358
5359 /* Register for our PCI devices */
5360 err = pci_register_driver(&cciss_pci_driver);
5361 if (err)
5362 goto err_thread_stop;
5363
5364 return err;
5365
5366 err_thread_stop:
5367 kthread_stop(cciss_scan_thread);
5368 err_bus_unregister:
5369 bus_unregister(&cciss_bus_type);
5370
5371 return err;
5372 }
5373
5374 static void __exit cciss_cleanup(void)
5375 {
5376 int i;
5377
5378 pci_unregister_driver(&cciss_pci_driver);
5379 /* double check that all controller entrys have been removed */
5380 for (i = 0; i < MAX_CTLR; i++) {
5381 if (hba[i] != NULL) {
5382 dev_warn(&hba[i]->pdev->dev,
5383 "had to remove controller\n");
5384 cciss_remove_one(hba[i]->pdev);
5385 }
5386 }
5387 kthread_stop(cciss_scan_thread);
5388 if (proc_cciss)
5389 remove_proc_entry("driver/cciss", NULL);
5390 bus_unregister(&cciss_bus_type);
5391 }
5392
5393 module_init(cciss_init);
5394 module_exit(cciss_cleanup);