Fix common misspellings
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / DAC960.c
1 /*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17 */
18
19
20 #define DAC960_DriverVersion "2.5.49"
21 #define DAC960_DriverDate "21 Aug 2007"
22
23
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/miscdevice.h>
27 #include <linux/blkdev.h>
28 #include <linux/bio.h>
29 #include <linux/completion.h>
30 #include <linux/delay.h>
31 #include <linux/genhd.h>
32 #include <linux/hdreg.h>
33 #include <linux/blkpg.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/slab.h>
39 #include <linux/mutex.h>
40 #include <linux/proc_fs.h>
41 #include <linux/seq_file.h>
42 #include <linux/reboot.h>
43 #include <linux/spinlock.h>
44 #include <linux/timer.h>
45 #include <linux/pci.h>
46 #include <linux/init.h>
47 #include <linux/jiffies.h>
48 #include <linux/random.h>
49 #include <linux/scatterlist.h>
50 #include <asm/io.h>
51 #include <asm/uaccess.h>
52 #include "DAC960.h"
53
54 #define DAC960_GAM_MINOR 252
55
56
57 static DEFINE_MUTEX(DAC960_mutex);
58 static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59 static int DAC960_ControllerCount;
60 static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62 static long disk_size(DAC960_Controller_T *p, int drive_nr)
63 {
64 if (p->FirmwareType == DAC960_V1_Controller) {
65 if (drive_nr >= p->LogicalDriveCount)
66 return 0;
67 return p->V1.LogicalDriveInformation[drive_nr].
68 LogicalDriveSize;
69 } else {
70 DAC960_V2_LogicalDeviceInfo_T *i =
71 p->V2.LogicalDeviceInformation[drive_nr];
72 if (i == NULL)
73 return 0;
74 return i->ConfigurableDeviceSize;
75 }
76 }
77
78 static int DAC960_open(struct block_device *bdev, fmode_t mode)
79 {
80 struct gendisk *disk = bdev->bd_disk;
81 DAC960_Controller_T *p = disk->queue->queuedata;
82 int drive_nr = (long)disk->private_data;
83 int ret = -ENXIO;
84
85 mutex_lock(&DAC960_mutex);
86 if (p->FirmwareType == DAC960_V1_Controller) {
87 if (p->V1.LogicalDriveInformation[drive_nr].
88 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
89 goto out;
90 } else {
91 DAC960_V2_LogicalDeviceInfo_T *i =
92 p->V2.LogicalDeviceInformation[drive_nr];
93 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
94 goto out;
95 }
96
97 check_disk_change(bdev);
98
99 if (!get_capacity(p->disks[drive_nr]))
100 goto out;
101 ret = 0;
102 out:
103 mutex_unlock(&DAC960_mutex);
104 return ret;
105 }
106
107 static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
108 {
109 struct gendisk *disk = bdev->bd_disk;
110 DAC960_Controller_T *p = disk->queue->queuedata;
111 int drive_nr = (long)disk->private_data;
112
113 if (p->FirmwareType == DAC960_V1_Controller) {
114 geo->heads = p->V1.GeometryTranslationHeads;
115 geo->sectors = p->V1.GeometryTranslationSectors;
116 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117 LogicalDriveSize / (geo->heads * geo->sectors);
118 } else {
119 DAC960_V2_LogicalDeviceInfo_T *i =
120 p->V2.LogicalDeviceInformation[drive_nr];
121 switch (i->DriveGeometry) {
122 case DAC960_V2_Geometry_128_32:
123 geo->heads = 128;
124 geo->sectors = 32;
125 break;
126 case DAC960_V2_Geometry_255_63:
127 geo->heads = 255;
128 geo->sectors = 63;
129 break;
130 default:
131 DAC960_Error("Illegal Logical Device Geometry %d\n",
132 p, i->DriveGeometry);
133 return -EINVAL;
134 }
135
136 geo->cylinders = i->ConfigurableDeviceSize /
137 (geo->heads * geo->sectors);
138 }
139
140 return 0;
141 }
142
143 static unsigned int DAC960_check_events(struct gendisk *disk,
144 unsigned int clearing)
145 {
146 DAC960_Controller_T *p = disk->queue->queuedata;
147 int drive_nr = (long)disk->private_data;
148
149 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
150 return DISK_EVENT_MEDIA_CHANGE;
151 return 0;
152 }
153
154 static int DAC960_revalidate_disk(struct gendisk *disk)
155 {
156 DAC960_Controller_T *p = disk->queue->queuedata;
157 int unit = (long)disk->private_data;
158
159 set_capacity(disk, disk_size(p, unit));
160 return 0;
161 }
162
163 static const struct block_device_operations DAC960_BlockDeviceOperations = {
164 .owner = THIS_MODULE,
165 .open = DAC960_open,
166 .getgeo = DAC960_getgeo,
167 .check_events = DAC960_check_events,
168 .revalidate_disk = DAC960_revalidate_disk,
169 };
170
171
172 /*
173 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174 Copyright Notice, and Electronic Mail Address.
175 */
176
177 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178 {
179 DAC960_Announce("***** DAC960 RAID Driver Version "
180 DAC960_DriverVersion " of "
181 DAC960_DriverDate " *****\n", Controller);
182 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183 "<lnz@dandelion.com>\n", Controller);
184 }
185
186
187 /*
188 DAC960_Failure prints a standardized error message, and then returns false.
189 */
190
191 static bool DAC960_Failure(DAC960_Controller_T *Controller,
192 unsigned char *ErrorMessage)
193 {
194 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195 Controller);
196 if (Controller->IO_Address == 0)
197 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198 "PCI Address 0x%X\n", Controller,
199 Controller->Bus, Controller->Device,
200 Controller->Function, Controller->PCI_Address);
201 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202 "0x%X PCI Address 0x%X\n", Controller,
203 Controller->Bus, Controller->Device,
204 Controller->Function, Controller->IO_Address,
205 Controller->PCI_Address);
206 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207 return false;
208 }
209
210 /*
211 init_dma_loaf() and slice_dma_loaf() are helper functions for
212 aggregating the dma-mapped memory for a well-known collection of
213 data structures that are of different lengths.
214
215 These routines don't guarantee any alignment. The caller must
216 include any space needed for alignment in the sizes of the structures
217 that are passed in.
218 */
219
220 static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
221 size_t len)
222 {
223 void *cpu_addr;
224 dma_addr_t dma_handle;
225
226 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227 if (cpu_addr == NULL)
228 return false;
229
230 loaf->cpu_free = loaf->cpu_base = cpu_addr;
231 loaf->dma_free =loaf->dma_base = dma_handle;
232 loaf->length = len;
233 memset(cpu_addr, 0, len);
234 return true;
235 }
236
237 static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238 dma_addr_t *dma_handle)
239 {
240 void *cpu_end = loaf->cpu_free + len;
241 void *cpu_addr = loaf->cpu_free;
242
243 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
244 *dma_handle = loaf->dma_free;
245 loaf->cpu_free = cpu_end;
246 loaf->dma_free += len;
247 return cpu_addr;
248 }
249
250 static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251 {
252 if (loaf_handle->cpu_base != NULL)
253 pci_free_consistent(dev, loaf_handle->length,
254 loaf_handle->cpu_base, loaf_handle->dma_base);
255 }
256
257
258 /*
259 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260 data structures for Controller. It returns true on success and false on
261 failure.
262 */
263
264 static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
265 {
266 int CommandAllocationLength, CommandAllocationGroupSize;
267 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268 void *AllocationPointer = NULL;
269 void *ScatterGatherCPU = NULL;
270 dma_addr_t ScatterGatherDMA;
271 struct pci_pool *ScatterGatherPool;
272 void *RequestSenseCPU = NULL;
273 dma_addr_t RequestSenseDMA;
274 struct pci_pool *RequestSensePool = NULL;
275
276 if (Controller->FirmwareType == DAC960_V1_Controller)
277 {
278 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
280 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
281 Controller->PCIDevice,
282 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284 if (ScatterGatherPool == NULL)
285 return DAC960_Failure(Controller,
286 "AUXILIARY STRUCTURE CREATION (SG)");
287 Controller->ScatterGatherPool = ScatterGatherPool;
288 }
289 else
290 {
291 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
293 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
294 Controller->PCIDevice,
295 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297 if (ScatterGatherPool == NULL)
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
300 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
301 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
302 sizeof(int), 0);
303 if (RequestSensePool == NULL) {
304 pci_pool_destroy(ScatterGatherPool);
305 return DAC960_Failure(Controller,
306 "AUXILIARY STRUCTURE CREATION (SG)");
307 }
308 Controller->ScatterGatherPool = ScatterGatherPool;
309 Controller->V2.RequestSensePool = RequestSensePool;
310 }
311 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312 Controller->FreeCommands = NULL;
313 for (CommandIdentifier = 1;
314 CommandIdentifier <= Controller->DriverQueueDepth;
315 CommandIdentifier++)
316 {
317 DAC960_Command_T *Command;
318 if (--CommandsRemaining <= 0)
319 {
320 CommandsRemaining =
321 Controller->DriverQueueDepth - CommandIdentifier + 1;
322 if (CommandsRemaining > CommandAllocationGroupSize)
323 CommandsRemaining = CommandAllocationGroupSize;
324 CommandGroupByteCount =
325 CommandsRemaining * CommandAllocationLength;
326 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
327 if (AllocationPointer == NULL)
328 return DAC960_Failure(Controller,
329 "AUXILIARY STRUCTURE CREATION");
330 }
331 Command = (DAC960_Command_T *) AllocationPointer;
332 AllocationPointer += CommandAllocationLength;
333 Command->CommandIdentifier = CommandIdentifier;
334 Command->Controller = Controller;
335 Command->Next = Controller->FreeCommands;
336 Controller->FreeCommands = Command;
337 Controller->Commands[CommandIdentifier-1] = Command;
338 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
339 &ScatterGatherDMA);
340 if (ScatterGatherCPU == NULL)
341 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343 if (RequestSensePool != NULL) {
344 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
345 &RequestSenseDMA);
346 if (RequestSenseCPU == NULL) {
347 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
348 ScatterGatherDMA);
349 return DAC960_Failure(Controller,
350 "AUXILIARY STRUCTURE CREATION");
351 }
352 }
353 if (Controller->FirmwareType == DAC960_V1_Controller) {
354 Command->cmd_sglist = Command->V1.ScatterList;
355 Command->V1.ScatterGatherList =
356 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
358 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
359 } else {
360 Command->cmd_sglist = Command->V2.ScatterList;
361 Command->V2.ScatterGatherList =
362 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364 Command->V2.RequestSense =
365 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366 Command->V2.RequestSenseDMA = RequestSenseDMA;
367 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
368 }
369 }
370 return true;
371 }
372
373
374 /*
375 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376 structures for Controller.
377 */
378
379 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380 {
381 int i;
382 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383 struct pci_pool *RequestSensePool = NULL;
384 void *ScatterGatherCPU;
385 dma_addr_t ScatterGatherDMA;
386 void *RequestSenseCPU;
387 dma_addr_t RequestSenseDMA;
388 DAC960_Command_T *CommandGroup = NULL;
389
390
391 if (Controller->FirmwareType == DAC960_V2_Controller)
392 RequestSensePool = Controller->V2.RequestSensePool;
393
394 Controller->FreeCommands = NULL;
395 for (i = 0; i < Controller->DriverQueueDepth; i++)
396 {
397 DAC960_Command_T *Command = Controller->Commands[i];
398
399 if (Command == NULL)
400 continue;
401
402 if (Controller->FirmwareType == DAC960_V1_Controller) {
403 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405 RequestSenseCPU = NULL;
406 RequestSenseDMA = (dma_addr_t)0;
407 } else {
408 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410 RequestSenseCPU = (void *)Command->V2.RequestSense;
411 RequestSenseDMA = Command->V2.RequestSenseDMA;
412 }
413 if (ScatterGatherCPU != NULL)
414 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
415 if (RequestSenseCPU != NULL)
416 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
417
418 if ((Command->CommandIdentifier
419 % Controller->CommandAllocationGroupSize) == 1) {
420 /*
421 * We can't free the group of commands until all of the
422 * request sense and scatter gather dma structures are free.
423 * Remember the beginning of the group, but don't free it
424 * until we've reached the beginning of the next group.
425 */
426 kfree(CommandGroup);
427 CommandGroup = Command;
428 }
429 Controller->Commands[i] = NULL;
430 }
431 kfree(CommandGroup);
432
433 if (Controller->CombinedStatusBuffer != NULL)
434 {
435 kfree(Controller->CombinedStatusBuffer);
436 Controller->CombinedStatusBuffer = NULL;
437 Controller->CurrentStatusBuffer = NULL;
438 }
439
440 if (ScatterGatherPool != NULL)
441 pci_pool_destroy(ScatterGatherPool);
442 if (Controller->FirmwareType == DAC960_V1_Controller)
443 return;
444
445 if (RequestSensePool != NULL)
446 pci_pool_destroy(RequestSensePool);
447
448 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
449 kfree(Controller->V2.LogicalDeviceInformation[i]);
450 Controller->V2.LogicalDeviceInformation[i] = NULL;
451 }
452
453 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
454 {
455 kfree(Controller->V2.PhysicalDeviceInformation[i]);
456 Controller->V2.PhysicalDeviceInformation[i] = NULL;
457 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
458 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
459 }
460 }
461
462
463 /*
464 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
465 Firmware Controllers.
466 */
467
468 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
469 {
470 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
471 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
472 Command->V1.CommandStatus = 0;
473 }
474
475
476 /*
477 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
478 Firmware Controllers.
479 */
480
481 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
482 {
483 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
484 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
485 Command->V2.CommandStatus = 0;
486 }
487
488
489 /*
490 DAC960_AllocateCommand allocates a Command structure from Controller's
491 free list. During driver initialization, a special initialization command
492 has been placed on the free list to guarantee that command allocation can
493 never fail.
494 */
495
496 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
497 *Controller)
498 {
499 DAC960_Command_T *Command = Controller->FreeCommands;
500 if (Command == NULL) return NULL;
501 Controller->FreeCommands = Command->Next;
502 Command->Next = NULL;
503 return Command;
504 }
505
506
507 /*
508 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
509 free list.
510 */
511
512 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
513 {
514 DAC960_Controller_T *Controller = Command->Controller;
515
516 Command->Request = NULL;
517 Command->Next = Controller->FreeCommands;
518 Controller->FreeCommands = Command;
519 }
520
521
522 /*
523 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
524 */
525
526 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
527 {
528 spin_unlock_irq(&Controller->queue_lock);
529 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
530 spin_lock_irq(&Controller->queue_lock);
531 }
532
533 /*
534 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
535 */
536
537 static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
538 {
539 DAC960_Controller_T *Controller = Command->Controller;
540 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
541 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
542 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
543 Controller->V2.NextCommandMailbox;
544
545 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
546 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
547
548 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
549 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
550 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
551
552 Controller->V2.PreviousCommandMailbox2 =
553 Controller->V2.PreviousCommandMailbox1;
554 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
555
556 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
557 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
558
559 Controller->V2.NextCommandMailbox = NextCommandMailbox;
560 }
561
562 /*
563 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
564 */
565
566 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
567 {
568 DAC960_Controller_T *Controller = Command->Controller;
569 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
570 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
571 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
572 Controller->V2.NextCommandMailbox;
573 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
574 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
575 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
576 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
577 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
578 Controller->V2.PreviousCommandMailbox2 =
579 Controller->V2.PreviousCommandMailbox1;
580 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
581 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
582 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
583 Controller->V2.NextCommandMailbox = NextCommandMailbox;
584 }
585
586
587 /*
588 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
589 */
590
591 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
592 {
593 DAC960_Controller_T *Controller = Command->Controller;
594 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
595 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
596 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
597 Controller->V2.NextCommandMailbox;
598 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
599 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
600 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
601 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
602 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
603 Controller->V2.PreviousCommandMailbox2 =
604 Controller->V2.PreviousCommandMailbox1;
605 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
606 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
607 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
608 Controller->V2.NextCommandMailbox = NextCommandMailbox;
609 }
610
611
612 /*
613 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
614 Controllers with Dual Mode Firmware.
615 */
616
617 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
618 {
619 DAC960_Controller_T *Controller = Command->Controller;
620 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
621 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
622 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
623 Controller->V1.NextCommandMailbox;
624 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
625 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
626 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
627 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
628 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
629 Controller->V1.PreviousCommandMailbox2 =
630 Controller->V1.PreviousCommandMailbox1;
631 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
632 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
633 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
634 Controller->V1.NextCommandMailbox = NextCommandMailbox;
635 }
636
637
638 /*
639 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
640 Controllers with Single Mode Firmware.
641 */
642
643 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
644 {
645 DAC960_Controller_T *Controller = Command->Controller;
646 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
647 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
648 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
649 Controller->V1.NextCommandMailbox;
650 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
651 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
652 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
653 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
654 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
655 Controller->V1.PreviousCommandMailbox2 =
656 Controller->V1.PreviousCommandMailbox1;
657 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
658 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
659 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
660 Controller->V1.NextCommandMailbox = NextCommandMailbox;
661 }
662
663
664 /*
665 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
666 Controllers with Dual Mode Firmware.
667 */
668
669 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
670 {
671 DAC960_Controller_T *Controller = Command->Controller;
672 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
673 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
674 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
675 Controller->V1.NextCommandMailbox;
676 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
677 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
678 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
679 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
680 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
681 Controller->V1.PreviousCommandMailbox2 =
682 Controller->V1.PreviousCommandMailbox1;
683 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
684 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
685 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
686 Controller->V1.NextCommandMailbox = NextCommandMailbox;
687 }
688
689
690 /*
691 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
692 Controllers with Single Mode Firmware.
693 */
694
695 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
696 {
697 DAC960_Controller_T *Controller = Command->Controller;
698 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
699 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
700 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
701 Controller->V1.NextCommandMailbox;
702 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
703 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
704 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
705 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
706 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
707 Controller->V1.PreviousCommandMailbox2 =
708 Controller->V1.PreviousCommandMailbox1;
709 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
710 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
711 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
712 Controller->V1.NextCommandMailbox = NextCommandMailbox;
713 }
714
715
716 /*
717 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
718 */
719
720 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
721 {
722 DAC960_Controller_T *Controller = Command->Controller;
723 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
724 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
725 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
726 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
727 udelay(1);
728 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
729 DAC960_PD_NewCommand(ControllerBaseAddress);
730 }
731
732
733 /*
734 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
735 */
736
737 static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
738 {
739 DAC960_Controller_T *Controller = Command->Controller;
740 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
741 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
742 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
743 switch (CommandMailbox->Common.CommandOpcode)
744 {
745 case DAC960_V1_Enquiry:
746 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
747 break;
748 case DAC960_V1_GetDeviceState:
749 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
750 break;
751 case DAC960_V1_Read:
752 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
753 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754 break;
755 case DAC960_V1_Write:
756 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
757 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
758 break;
759 case DAC960_V1_ReadWithScatterGather:
760 CommandMailbox->Common.CommandOpcode =
761 DAC960_V1_ReadWithScatterGather_Old;
762 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
763 break;
764 case DAC960_V1_WriteWithScatterGather:
765 CommandMailbox->Common.CommandOpcode =
766 DAC960_V1_WriteWithScatterGather_Old;
767 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
768 break;
769 default:
770 break;
771 }
772 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
773 udelay(1);
774 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
775 DAC960_PD_NewCommand(ControllerBaseAddress);
776 }
777
778
779 /*
780 DAC960_ExecuteCommand executes Command and waits for completion.
781 */
782
783 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
784 {
785 DAC960_Controller_T *Controller = Command->Controller;
786 DECLARE_COMPLETION_ONSTACK(Completion);
787 unsigned long flags;
788 Command->Completion = &Completion;
789
790 spin_lock_irqsave(&Controller->queue_lock, flags);
791 DAC960_QueueCommand(Command);
792 spin_unlock_irqrestore(&Controller->queue_lock, flags);
793
794 if (in_interrupt())
795 return;
796 wait_for_completion(&Completion);
797 }
798
799
800 /*
801 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
802 Command and waits for completion. It returns true on success and false
803 on failure.
804 */
805
806 static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
807 DAC960_V1_CommandOpcode_T CommandOpcode,
808 dma_addr_t DataDMA)
809 {
810 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
811 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
812 DAC960_V1_CommandStatus_T CommandStatus;
813 DAC960_V1_ClearCommand(Command);
814 Command->CommandType = DAC960_ImmediateCommand;
815 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
816 CommandMailbox->Type3.BusAddress = DataDMA;
817 DAC960_ExecuteCommand(Command);
818 CommandStatus = Command->V1.CommandStatus;
819 DAC960_DeallocateCommand(Command);
820 return (CommandStatus == DAC960_V1_NormalCompletion);
821 }
822
823
824 /*
825 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
826 Command and waits for completion. It returns true on success and false
827 on failure.
828 */
829
830 static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
831 DAC960_V1_CommandOpcode_T CommandOpcode,
832 unsigned char CommandOpcode2,
833 dma_addr_t DataDMA)
834 {
835 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
836 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
837 DAC960_V1_CommandStatus_T CommandStatus;
838 DAC960_V1_ClearCommand(Command);
839 Command->CommandType = DAC960_ImmediateCommand;
840 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
841 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
842 CommandMailbox->Type3B.BusAddress = DataDMA;
843 DAC960_ExecuteCommand(Command);
844 CommandStatus = Command->V1.CommandStatus;
845 DAC960_DeallocateCommand(Command);
846 return (CommandStatus == DAC960_V1_NormalCompletion);
847 }
848
849
850 /*
851 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
852 Command and waits for completion. It returns true on success and false
853 on failure.
854 */
855
856 static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
857 DAC960_V1_CommandOpcode_T CommandOpcode,
858 unsigned char Channel,
859 unsigned char TargetID,
860 dma_addr_t DataDMA)
861 {
862 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
863 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
864 DAC960_V1_CommandStatus_T CommandStatus;
865 DAC960_V1_ClearCommand(Command);
866 Command->CommandType = DAC960_ImmediateCommand;
867 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
868 CommandMailbox->Type3D.Channel = Channel;
869 CommandMailbox->Type3D.TargetID = TargetID;
870 CommandMailbox->Type3D.BusAddress = DataDMA;
871 DAC960_ExecuteCommand(Command);
872 CommandStatus = Command->V1.CommandStatus;
873 DAC960_DeallocateCommand(Command);
874 return (CommandStatus == DAC960_V1_NormalCompletion);
875 }
876
877
878 /*
879 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
880 Reading IOCTL Command and waits for completion. It returns true on success
881 and false on failure.
882
883 Return data in The controller's HealthStatusBuffer, which is dma-able memory
884 */
885
886 static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
887 {
888 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
889 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
890 DAC960_V2_CommandStatus_T CommandStatus;
891 DAC960_V2_ClearCommand(Command);
892 Command->CommandType = DAC960_ImmediateCommand;
893 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
894 CommandMailbox->Common.CommandControlBits
895 .DataTransferControllerToHost = true;
896 CommandMailbox->Common.CommandControlBits
897 .NoAutoRequestSense = true;
898 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
899 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
900 CommandMailbox->Common.DataTransferMemoryAddress
901 .ScatterGatherSegments[0]
902 .SegmentDataPointer =
903 Controller->V2.HealthStatusBufferDMA;
904 CommandMailbox->Common.DataTransferMemoryAddress
905 .ScatterGatherSegments[0]
906 .SegmentByteCount =
907 CommandMailbox->Common.DataTransferSize;
908 DAC960_ExecuteCommand(Command);
909 CommandStatus = Command->V2.CommandStatus;
910 DAC960_DeallocateCommand(Command);
911 return (CommandStatus == DAC960_V2_NormalCompletion);
912 }
913
914
915 /*
916 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
917 Information Reading IOCTL Command and waits for completion. It returns
918 true on success and false on failure.
919
920 Data is returned in the controller's V2.NewControllerInformation dma-able
921 memory buffer.
922 */
923
924 static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
925 {
926 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
927 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
928 DAC960_V2_CommandStatus_T CommandStatus;
929 DAC960_V2_ClearCommand(Command);
930 Command->CommandType = DAC960_ImmediateCommand;
931 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
932 CommandMailbox->ControllerInfo.CommandControlBits
933 .DataTransferControllerToHost = true;
934 CommandMailbox->ControllerInfo.CommandControlBits
935 .NoAutoRequestSense = true;
936 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
937 CommandMailbox->ControllerInfo.ControllerNumber = 0;
938 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
939 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
940 .ScatterGatherSegments[0]
941 .SegmentDataPointer =
942 Controller->V2.NewControllerInformationDMA;
943 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
944 .ScatterGatherSegments[0]
945 .SegmentByteCount =
946 CommandMailbox->ControllerInfo.DataTransferSize;
947 DAC960_ExecuteCommand(Command);
948 CommandStatus = Command->V2.CommandStatus;
949 DAC960_DeallocateCommand(Command);
950 return (CommandStatus == DAC960_V2_NormalCompletion);
951 }
952
953
954 /*
955 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
956 Device Information Reading IOCTL Command and waits for completion. It
957 returns true on success and false on failure.
958
959 Data is returned in the controller's V2.NewLogicalDeviceInformation
960 */
961
962 static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
963 unsigned short LogicalDeviceNumber)
964 {
965 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
966 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
967 DAC960_V2_CommandStatus_T CommandStatus;
968
969 DAC960_V2_ClearCommand(Command);
970 Command->CommandType = DAC960_ImmediateCommand;
971 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
972 DAC960_V2_IOCTL;
973 CommandMailbox->LogicalDeviceInfo.CommandControlBits
974 .DataTransferControllerToHost = true;
975 CommandMailbox->LogicalDeviceInfo.CommandControlBits
976 .NoAutoRequestSense = true;
977 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
978 sizeof(DAC960_V2_LogicalDeviceInfo_T);
979 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
980 LogicalDeviceNumber;
981 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
982 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
983 .ScatterGatherSegments[0]
984 .SegmentDataPointer =
985 Controller->V2.NewLogicalDeviceInformationDMA;
986 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
987 .ScatterGatherSegments[0]
988 .SegmentByteCount =
989 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
990 DAC960_ExecuteCommand(Command);
991 CommandStatus = Command->V2.CommandStatus;
992 DAC960_DeallocateCommand(Command);
993 return (CommandStatus == DAC960_V2_NormalCompletion);
994 }
995
996
997 /*
998 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
999 Physical Device Information" IOCTL Command and waits for completion. It
1000 returns true on success and false on failure.
1001
1002 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1003 this function is called for a given controller. This will return data
1004 for the "first" device on that controller. The returned data includes a
1005 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1006 get data for the NEXT device on that controller.
1007
1008 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1009 memory buffer.
1010
1011 */
1012
1013 static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1014 unsigned char Channel,
1015 unsigned char TargetID,
1016 unsigned char LogicalUnit)
1017 {
1018 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1019 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1020 DAC960_V2_CommandStatus_T CommandStatus;
1021
1022 DAC960_V2_ClearCommand(Command);
1023 Command->CommandType = DAC960_ImmediateCommand;
1024 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1025 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026 .DataTransferControllerToHost = true;
1027 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1028 .NoAutoRequestSense = true;
1029 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1030 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1032 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1033 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1034 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1035 DAC960_V2_GetPhysicalDeviceInfoValid;
1036 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1037 .ScatterGatherSegments[0]
1038 .SegmentDataPointer =
1039 Controller->V2.NewPhysicalDeviceInformationDMA;
1040 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1041 .ScatterGatherSegments[0]
1042 .SegmentByteCount =
1043 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1044 DAC960_ExecuteCommand(Command);
1045 CommandStatus = Command->V2.CommandStatus;
1046 DAC960_DeallocateCommand(Command);
1047 return (CommandStatus == DAC960_V2_NormalCompletion);
1048 }
1049
1050
1051 static void DAC960_V2_ConstructNewUnitSerialNumber(
1052 DAC960_Controller_T *Controller,
1053 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1054 int LogicalUnit)
1055 {
1056 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1057 CommandMailbox->SCSI_10.CommandControlBits
1058 .DataTransferControllerToHost = true;
1059 CommandMailbox->SCSI_10.CommandControlBits
1060 .NoAutoRequestSense = true;
1061 CommandMailbox->SCSI_10.DataTransferSize =
1062 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1063 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1064 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1065 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1066 CommandMailbox->SCSI_10.CDBLength = 6;
1067 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1068 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1069 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1070 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1071 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1072 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1073 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1074 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1075 .ScatterGatherSegments[0]
1076 .SegmentDataPointer =
1077 Controller->V2.NewInquiryUnitSerialNumberDMA;
1078 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1079 .ScatterGatherSegments[0]
1080 .SegmentByteCount =
1081 CommandMailbox->SCSI_10.DataTransferSize;
1082 }
1083
1084
1085 /*
1086 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1087 Inquiry command to a SCSI device identified by Channel number,
1088 Target id, Logical Unit Number. This function Waits for completion
1089 of the command.
1090
1091 The return data includes Unit Serial Number information for the
1092 specified device.
1093
1094 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1095 memory buffer.
1096 */
1097
1098 static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1099 int Channel, int TargetID, int LogicalUnit)
1100 {
1101 DAC960_Command_T *Command;
1102 DAC960_V2_CommandMailbox_T *CommandMailbox;
1103 DAC960_V2_CommandStatus_T CommandStatus;
1104
1105 Command = DAC960_AllocateCommand(Controller);
1106 CommandMailbox = &Command->V2.CommandMailbox;
1107 DAC960_V2_ClearCommand(Command);
1108 Command->CommandType = DAC960_ImmediateCommand;
1109
1110 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1111 Channel, TargetID, LogicalUnit);
1112
1113 DAC960_ExecuteCommand(Command);
1114 CommandStatus = Command->V2.CommandStatus;
1115 DAC960_DeallocateCommand(Command);
1116 return (CommandStatus == DAC960_V2_NormalCompletion);
1117 }
1118
1119
1120 /*
1121 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1122 Operation IOCTL Command and waits for completion. It returns true on
1123 success and false on failure.
1124 */
1125
1126 static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1127 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1128 DAC960_V2_OperationDevice_T
1129 OperationDevice)
1130 {
1131 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1132 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1133 DAC960_V2_CommandStatus_T CommandStatus;
1134 DAC960_V2_ClearCommand(Command);
1135 Command->CommandType = DAC960_ImmediateCommand;
1136 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1137 CommandMailbox->DeviceOperation.CommandControlBits
1138 .DataTransferControllerToHost = true;
1139 CommandMailbox->DeviceOperation.CommandControlBits
1140 .NoAutoRequestSense = true;
1141 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1142 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1143 DAC960_ExecuteCommand(Command);
1144 CommandStatus = Command->V2.CommandStatus;
1145 DAC960_DeallocateCommand(Command);
1146 return (CommandStatus == DAC960_V2_NormalCompletion);
1147 }
1148
1149
1150 /*
1151 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1152 for DAC960 V1 Firmware Controllers.
1153
1154 PD and P controller types have no memory mailbox, but still need the
1155 other dma mapped memory.
1156 */
1157
1158 static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1159 *Controller)
1160 {
1161 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1162 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1163 struct pci_dev *PCI_Device = Controller->PCIDevice;
1164 struct dma_loaf *DmaPages = &Controller->DmaPages;
1165 size_t DmaPagesSize;
1166 size_t CommandMailboxesSize;
1167 size_t StatusMailboxesSize;
1168
1169 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1170 dma_addr_t CommandMailboxesMemoryDMA;
1171
1172 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1173 dma_addr_t StatusMailboxesMemoryDMA;
1174
1175 DAC960_V1_CommandMailbox_T CommandMailbox;
1176 DAC960_V1_CommandStatus_T CommandStatus;
1177 int TimeoutCounter;
1178 int i;
1179
1180
1181 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1182 return DAC960_Failure(Controller, "DMA mask out of range");
1183 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1184
1185 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1186 CommandMailboxesSize = 0;
1187 StatusMailboxesSize = 0;
1188 } else {
1189 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1190 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1191 }
1192 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1193 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1194 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1195 sizeof(DAC960_V1_RebuildProgress_T) +
1196 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1197 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1198 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1199 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1200
1201 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1202 return false;
1203
1204
1205 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1206 goto skip_mailboxes;
1207
1208 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1209 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1210
1211 /* These are the base addresses for the command memory mailbox array */
1212 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1213 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1214
1215 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1216 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1217 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1218 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1219 Controller->V1.PreviousCommandMailbox2 =
1220 Controller->V1.LastCommandMailbox - 1;
1221
1222 /* These are the base addresses for the status memory mailbox array */
1223 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1224 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1225
1226 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1227 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1228 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1229 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1230 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1231
1232 skip_mailboxes:
1233 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1234 sizeof(DAC960_V1_DCDB_T),
1235 &Controller->V1.MonitoringDCDB_DMA);
1236
1237 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1238 sizeof(DAC960_V1_Enquiry_T),
1239 &Controller->V1.NewEnquiryDMA);
1240
1241 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1242 sizeof(DAC960_V1_ErrorTable_T),
1243 &Controller->V1.NewErrorTableDMA);
1244
1245 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1246 sizeof(DAC960_V1_EventLogEntry_T),
1247 &Controller->V1.EventLogEntryDMA);
1248
1249 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1250 sizeof(DAC960_V1_RebuildProgress_T),
1251 &Controller->V1.RebuildProgressDMA);
1252
1253 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1254 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1255 &Controller->V1.NewLogicalDriveInformationDMA);
1256
1257 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1258 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1259 &Controller->V1.BackgroundInitializationStatusDMA);
1260
1261 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1262 sizeof(DAC960_V1_DeviceState_T),
1263 &Controller->V1.NewDeviceStateDMA);
1264
1265 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1266 sizeof(DAC960_SCSI_Inquiry_T),
1267 &Controller->V1.NewInquiryStandardDataDMA);
1268
1269 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1270 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1271 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1272
1273 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1274 return true;
1275
1276 /* Enable the Memory Mailbox Interface. */
1277 Controller->V1.DualModeMemoryMailboxInterface = true;
1278 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1279 CommandMailbox.TypeX.CommandIdentifier = 0;
1280 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1281 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1282 Controller->V1.FirstCommandMailboxDMA;
1283 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1284 Controller->V1.FirstStatusMailboxDMA;
1285 #define TIMEOUT_COUNT 1000000
1286
1287 for (i = 0; i < 2; i++)
1288 switch (Controller->HardwareType)
1289 {
1290 case DAC960_LA_Controller:
1291 TimeoutCounter = TIMEOUT_COUNT;
1292 while (--TimeoutCounter >= 0)
1293 {
1294 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1295 break;
1296 udelay(10);
1297 }
1298 if (TimeoutCounter < 0) return false;
1299 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1300 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1301 TimeoutCounter = TIMEOUT_COUNT;
1302 while (--TimeoutCounter >= 0)
1303 {
1304 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1305 ControllerBaseAddress))
1306 break;
1307 udelay(10);
1308 }
1309 if (TimeoutCounter < 0) return false;
1310 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1311 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1312 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1313 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1314 Controller->V1.DualModeMemoryMailboxInterface = false;
1315 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1316 break;
1317 case DAC960_PG_Controller:
1318 TimeoutCounter = TIMEOUT_COUNT;
1319 while (--TimeoutCounter >= 0)
1320 {
1321 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1322 break;
1323 udelay(10);
1324 }
1325 if (TimeoutCounter < 0) return false;
1326 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1327 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1328
1329 TimeoutCounter = TIMEOUT_COUNT;
1330 while (--TimeoutCounter >= 0)
1331 {
1332 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1333 ControllerBaseAddress))
1334 break;
1335 udelay(10);
1336 }
1337 if (TimeoutCounter < 0) return false;
1338 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1339 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1340 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1341 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1342 Controller->V1.DualModeMemoryMailboxInterface = false;
1343 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1344 break;
1345 default:
1346 DAC960_Failure(Controller, "Unknown Controller Type\n");
1347 break;
1348 }
1349 return false;
1350 }
1351
1352
1353 /*
1354 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1355 for DAC960 V2 Firmware Controllers.
1356
1357 Aggregate the space needed for the controller's memory mailbox and
1358 the other data structures that will be targets of dma transfers with
1359 the controller. Allocate a dma-mapped region of memory to hold these
1360 structures. Then, save CPU pointers and dma_addr_t values to reference
1361 the structures that are contained in that region.
1362 */
1363
1364 static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1365 *Controller)
1366 {
1367 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1368 struct pci_dev *PCI_Device = Controller->PCIDevice;
1369 struct dma_loaf *DmaPages = &Controller->DmaPages;
1370 size_t DmaPagesSize;
1371 size_t CommandMailboxesSize;
1372 size_t StatusMailboxesSize;
1373
1374 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1375 dma_addr_t CommandMailboxesMemoryDMA;
1376
1377 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1378 dma_addr_t StatusMailboxesMemoryDMA;
1379
1380 DAC960_V2_CommandMailbox_T *CommandMailbox;
1381 dma_addr_t CommandMailboxDMA;
1382 DAC960_V2_CommandStatus_T CommandStatus;
1383
1384 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1385 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
1386 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1387 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1388 else
1389 return DAC960_Failure(Controller, "DMA mask out of range");
1390
1391 /* This is a temporary dma mapping, used only in the scope of this function */
1392 CommandMailbox = pci_alloc_consistent(PCI_Device,
1393 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1394 if (CommandMailbox == NULL)
1395 return false;
1396
1397 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1398 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1399 DmaPagesSize =
1400 CommandMailboxesSize + StatusMailboxesSize +
1401 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1402 sizeof(DAC960_V2_ControllerInfo_T) +
1403 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1404 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1405 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1406 sizeof(DAC960_V2_Event_T) +
1407 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1408
1409 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1410 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1411 CommandMailbox, CommandMailboxDMA);
1412 return false;
1413 }
1414
1415 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1416 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1417
1418 /* These are the base addresses for the command memory mailbox array */
1419 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1420 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1421
1422 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1423 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1424 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1425 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1426 Controller->V2.PreviousCommandMailbox2 =
1427 Controller->V2.LastCommandMailbox - 1;
1428
1429 /* These are the base addresses for the status memory mailbox array */
1430 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1431 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1432
1433 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1434 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1435 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1436 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1437 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1438
1439 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1440 sizeof(DAC960_V2_HealthStatusBuffer_T),
1441 &Controller->V2.HealthStatusBufferDMA);
1442
1443 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1444 sizeof(DAC960_V2_ControllerInfo_T),
1445 &Controller->V2.NewControllerInformationDMA);
1446
1447 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1448 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1449 &Controller->V2.NewLogicalDeviceInformationDMA);
1450
1451 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1452 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1453 &Controller->V2.NewPhysicalDeviceInformationDMA);
1454
1455 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1456 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1457 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1458
1459 Controller->V2.Event = slice_dma_loaf(DmaPages,
1460 sizeof(DAC960_V2_Event_T),
1461 &Controller->V2.EventDMA);
1462
1463 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1464 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1465 &Controller->V2.PhysicalToLogicalDeviceDMA);
1466
1467 /*
1468 Enable the Memory Mailbox Interface.
1469
1470 I don't know why we can't just use one of the memory mailboxes
1471 we just allocated to do this, instead of using this temporary one.
1472 Try this change later.
1473 */
1474 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1475 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1476 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1477 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1478 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1479 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1480 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1481 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1482 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1483 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1484 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1485 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1486 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1487 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1488 Controller->V2.HealthStatusBufferDMA;
1489 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1490 Controller->V2.FirstCommandMailboxDMA;
1491 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1492 Controller->V2.FirstStatusMailboxDMA;
1493 switch (Controller->HardwareType)
1494 {
1495 case DAC960_GEM_Controller:
1496 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1497 udelay(1);
1498 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1499 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1500 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1501 udelay(1);
1502 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1503 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1504 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1505 break;
1506 case DAC960_BA_Controller:
1507 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1508 udelay(1);
1509 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1510 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1511 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1512 udelay(1);
1513 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1514 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1515 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1516 break;
1517 case DAC960_LP_Controller:
1518 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1519 udelay(1);
1520 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1521 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1522 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1523 udelay(1);
1524 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1525 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1526 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1527 break;
1528 default:
1529 DAC960_Failure(Controller, "Unknown Controller Type\n");
1530 CommandStatus = DAC960_V2_AbormalCompletion;
1531 break;
1532 }
1533 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1534 CommandMailbox, CommandMailboxDMA);
1535 return (CommandStatus == DAC960_V2_NormalCompletion);
1536 }
1537
1538
1539 /*
1540 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1541 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1542 */
1543
1544 static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1545 *Controller)
1546 {
1547 DAC960_V1_Enquiry2_T *Enquiry2;
1548 dma_addr_t Enquiry2DMA;
1549 DAC960_V1_Config2_T *Config2;
1550 dma_addr_t Config2DMA;
1551 int LogicalDriveNumber, Channel, TargetID;
1552 struct dma_loaf local_dma;
1553
1554 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1555 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1556 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1557
1558 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1559 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1560
1561 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1562 Controller->V1.NewEnquiryDMA)) {
1563 free_dma_loaf(Controller->PCIDevice, &local_dma);
1564 return DAC960_Failure(Controller, "ENQUIRY");
1565 }
1566 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1567 sizeof(DAC960_V1_Enquiry_T));
1568
1569 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1570 free_dma_loaf(Controller->PCIDevice, &local_dma);
1571 return DAC960_Failure(Controller, "ENQUIRY2");
1572 }
1573
1574 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1575 free_dma_loaf(Controller->PCIDevice, &local_dma);
1576 return DAC960_Failure(Controller, "READ CONFIG2");
1577 }
1578
1579 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1580 Controller->V1.NewLogicalDriveInformationDMA)) {
1581 free_dma_loaf(Controller->PCIDevice, &local_dma);
1582 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1583 }
1584 memcpy(&Controller->V1.LogicalDriveInformation,
1585 Controller->V1.NewLogicalDriveInformation,
1586 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1587
1588 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1589 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1590 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1591 Channel, TargetID,
1592 Controller->V1.NewDeviceStateDMA)) {
1593 free_dma_loaf(Controller->PCIDevice, &local_dma);
1594 return DAC960_Failure(Controller, "GET DEVICE STATE");
1595 }
1596 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1597 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1598 }
1599 /*
1600 Initialize the Controller Model Name and Full Model Name fields.
1601 */
1602 switch (Enquiry2->HardwareID.SubModel)
1603 {
1604 case DAC960_V1_P_PD_PU:
1605 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1606 strcpy(Controller->ModelName, "DAC960PU");
1607 else strcpy(Controller->ModelName, "DAC960PD");
1608 break;
1609 case DAC960_V1_PL:
1610 strcpy(Controller->ModelName, "DAC960PL");
1611 break;
1612 case DAC960_V1_PG:
1613 strcpy(Controller->ModelName, "DAC960PG");
1614 break;
1615 case DAC960_V1_PJ:
1616 strcpy(Controller->ModelName, "DAC960PJ");
1617 break;
1618 case DAC960_V1_PR:
1619 strcpy(Controller->ModelName, "DAC960PR");
1620 break;
1621 case DAC960_V1_PT:
1622 strcpy(Controller->ModelName, "DAC960PT");
1623 break;
1624 case DAC960_V1_PTL0:
1625 strcpy(Controller->ModelName, "DAC960PTL0");
1626 break;
1627 case DAC960_V1_PRL:
1628 strcpy(Controller->ModelName, "DAC960PRL");
1629 break;
1630 case DAC960_V1_PTL1:
1631 strcpy(Controller->ModelName, "DAC960PTL1");
1632 break;
1633 case DAC960_V1_1164P:
1634 strcpy(Controller->ModelName, "DAC1164P");
1635 break;
1636 default:
1637 free_dma_loaf(Controller->PCIDevice, &local_dma);
1638 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1639 }
1640 strcpy(Controller->FullModelName, "Mylex ");
1641 strcat(Controller->FullModelName, Controller->ModelName);
1642 /*
1643 Initialize the Controller Firmware Version field and verify that it
1644 is a supported firmware version. The supported firmware versions are:
1645
1646 DAC1164P 5.06 and above
1647 DAC960PTL/PRL/PJ/PG 4.06 and above
1648 DAC960PU/PD/PL 3.51 and above
1649 DAC960PU/PD/PL/P 2.73 and above
1650 */
1651 #if defined(CONFIG_ALPHA)
1652 /*
1653 DEC Alpha machines were often equipped with DAC960 cards that were
1654 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1655 the last custom FW revision to be released by DEC for these older
1656 controllers, appears to work quite well with this driver.
1657
1658 Cards tested successfully were several versions each of the PD and
1659 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1660 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1661 back of the board, of:
1662
1663 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1664 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1665 */
1666 # define FIRMWARE_27X "2.70"
1667 #else
1668 # define FIRMWARE_27X "2.73"
1669 #endif
1670
1671 if (Enquiry2->FirmwareID.MajorVersion == 0)
1672 {
1673 Enquiry2->FirmwareID.MajorVersion =
1674 Controller->V1.Enquiry.MajorFirmwareVersion;
1675 Enquiry2->FirmwareID.MinorVersion =
1676 Controller->V1.Enquiry.MinorFirmwareVersion;
1677 Enquiry2->FirmwareID.FirmwareType = '0';
1678 Enquiry2->FirmwareID.TurnID = 0;
1679 }
1680 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1681 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1682 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1683 if (!((Controller->FirmwareVersion[0] == '5' &&
1684 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1685 (Controller->FirmwareVersion[0] == '4' &&
1686 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1687 (Controller->FirmwareVersion[0] == '3' &&
1688 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1689 (Controller->FirmwareVersion[0] == '2' &&
1690 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1691 {
1692 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1693 DAC960_Error("Firmware Version = '%s'\n", Controller,
1694 Controller->FirmwareVersion);
1695 free_dma_loaf(Controller->PCIDevice, &local_dma);
1696 return false;
1697 }
1698 /*
1699 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1700 Enclosure Management Enabled fields.
1701 */
1702 Controller->Channels = Enquiry2->ActualChannels;
1703 Controller->Targets = Enquiry2->MaxTargets;
1704 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1705 Controller->V1.SAFTE_EnclosureManagementEnabled =
1706 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1707 /*
1708 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1709 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1710 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1711 less than the Controller Queue Depth to allow for an automatic drive
1712 rebuild operation.
1713 */
1714 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1715 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1716 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1717 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1718 Controller->LogicalDriveCount =
1719 Controller->V1.Enquiry.NumberOfLogicalDrives;
1720 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1721 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1722 Controller->DriverScatterGatherLimit =
1723 Controller->ControllerScatterGatherLimit;
1724 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1725 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1726 /*
1727 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1728 */
1729 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1730 >> (10 - DAC960_BlockSizeBits);
1731 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1732 >> (10 - DAC960_BlockSizeBits);
1733 switch (Config2->DriveGeometry)
1734 {
1735 case DAC960_V1_Geometry_128_32:
1736 Controller->V1.GeometryTranslationHeads = 128;
1737 Controller->V1.GeometryTranslationSectors = 32;
1738 break;
1739 case DAC960_V1_Geometry_255_63:
1740 Controller->V1.GeometryTranslationHeads = 255;
1741 Controller->V1.GeometryTranslationSectors = 63;
1742 break;
1743 default:
1744 free_dma_loaf(Controller->PCIDevice, &local_dma);
1745 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1746 }
1747 /*
1748 Initialize the Background Initialization Status.
1749 */
1750 if ((Controller->FirmwareVersion[0] == '4' &&
1751 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1752 (Controller->FirmwareVersion[0] == '5' &&
1753 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1754 {
1755 Controller->V1.BackgroundInitializationStatusSupported = true;
1756 DAC960_V1_ExecuteType3B(Controller,
1757 DAC960_V1_BackgroundInitializationControl, 0x20,
1758 Controller->
1759 V1.BackgroundInitializationStatusDMA);
1760 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1761 Controller->V1.BackgroundInitializationStatus,
1762 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1763 }
1764 /*
1765 Initialize the Logical Drive Initially Accessible flag.
1766 */
1767 for (LogicalDriveNumber = 0;
1768 LogicalDriveNumber < Controller->LogicalDriveCount;
1769 LogicalDriveNumber++)
1770 if (Controller->V1.LogicalDriveInformation
1771 [LogicalDriveNumber].LogicalDriveState !=
1772 DAC960_V1_LogicalDrive_Offline)
1773 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1774 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1775 free_dma_loaf(Controller->PCIDevice, &local_dma);
1776 return true;
1777 }
1778
1779
1780 /*
1781 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1782 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1783 */
1784
1785 static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1786 *Controller)
1787 {
1788 DAC960_V2_ControllerInfo_T *ControllerInfo =
1789 &Controller->V2.ControllerInformation;
1790 unsigned short LogicalDeviceNumber = 0;
1791 int ModelNameLength;
1792
1793 /* Get data into dma-able area, then copy into permanent location */
1794 if (!DAC960_V2_NewControllerInfo(Controller))
1795 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1796 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1797 sizeof(DAC960_V2_ControllerInfo_T));
1798
1799
1800 if (!DAC960_V2_GeneralInfo(Controller))
1801 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1802
1803 /*
1804 Initialize the Controller Model Name and Full Model Name fields.
1805 */
1806 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1807 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1808 ModelNameLength = sizeof(Controller->ModelName)-1;
1809 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1810 ModelNameLength);
1811 ModelNameLength--;
1812 while (Controller->ModelName[ModelNameLength] == ' ' ||
1813 Controller->ModelName[ModelNameLength] == '\0')
1814 ModelNameLength--;
1815 Controller->ModelName[++ModelNameLength] = '\0';
1816 strcpy(Controller->FullModelName, "Mylex ");
1817 strcat(Controller->FullModelName, Controller->ModelName);
1818 /*
1819 Initialize the Controller Firmware Version field.
1820 */
1821 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1822 ControllerInfo->FirmwareMajorVersion,
1823 ControllerInfo->FirmwareMinorVersion,
1824 ControllerInfo->FirmwareTurnNumber);
1825 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1826 ControllerInfo->FirmwareMinorVersion == 0 &&
1827 ControllerInfo->FirmwareTurnNumber < 1)
1828 {
1829 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1830 Controller, Controller->FirmwareVersion);
1831 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1832 Controller);
1833 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1834 Controller);
1835 }
1836 /*
1837 Initialize the Controller Channels, Targets, and Memory Size.
1838 */
1839 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1840 Controller->Targets =
1841 ControllerInfo->MaximumTargetsPerChannel
1842 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1843 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1844 /*
1845 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1846 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1847 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1848 less than the Controller Queue Depth to allow for an automatic drive
1849 rebuild operation.
1850 */
1851 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1852 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1853 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1854 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1855 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1856 Controller->MaxBlocksPerCommand =
1857 ControllerInfo->MaximumDataTransferSizeInBlocks;
1858 Controller->ControllerScatterGatherLimit =
1859 ControllerInfo->MaximumScatterGatherEntries;
1860 Controller->DriverScatterGatherLimit =
1861 Controller->ControllerScatterGatherLimit;
1862 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1863 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1864 /*
1865 Initialize the Logical Device Information.
1866 */
1867 while (true)
1868 {
1869 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1870 Controller->V2.NewLogicalDeviceInformation;
1871 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1872 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1873
1874 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1875 break;
1876 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1877 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1878 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1879 Controller, LogicalDeviceNumber);
1880 break;
1881 }
1882 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1883 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1884 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1885 LogicalDeviceNumber++;
1886 continue;
1887 }
1888 PhysicalDevice.Controller = 0;
1889 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1890 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1891 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1892 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1893 PhysicalDevice;
1894 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1895 DAC960_V2_LogicalDevice_Offline)
1896 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1897 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1898 GFP_ATOMIC);
1899 if (LogicalDeviceInfo == NULL)
1900 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1901 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1902 LogicalDeviceInfo;
1903 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1904 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1905 LogicalDeviceNumber++;
1906 }
1907 return true;
1908 }
1909
1910
1911 /*
1912 DAC960_ReportControllerConfiguration reports the Configuration Information
1913 for Controller.
1914 */
1915
1916 static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1917 *Controller)
1918 {
1919 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1920 Controller, Controller->ModelName);
1921 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1922 Controller, Controller->FirmwareVersion,
1923 Controller->Channels, Controller->MemorySize);
1924 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1925 Controller, Controller->Bus,
1926 Controller->Device, Controller->Function);
1927 if (Controller->IO_Address == 0)
1928 DAC960_Info("Unassigned\n", Controller);
1929 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1930 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1931 Controller, Controller->PCI_Address,
1932 (unsigned long) Controller->BaseAddress,
1933 Controller->IRQ_Channel);
1934 DAC960_Info(" Controller Queue Depth: %d, "
1935 "Maximum Blocks per Command: %d\n",
1936 Controller, Controller->ControllerQueueDepth,
1937 Controller->MaxBlocksPerCommand);
1938 DAC960_Info(" Driver Queue Depth: %d, "
1939 "Scatter/Gather Limit: %d of %d Segments\n",
1940 Controller, Controller->DriverQueueDepth,
1941 Controller->DriverScatterGatherLimit,
1942 Controller->ControllerScatterGatherLimit);
1943 if (Controller->FirmwareType == DAC960_V1_Controller)
1944 {
1945 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1946 "BIOS Geometry: %d/%d\n", Controller,
1947 Controller->V1.StripeSize,
1948 Controller->V1.SegmentSize,
1949 Controller->V1.GeometryTranslationHeads,
1950 Controller->V1.GeometryTranslationSectors);
1951 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1952 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1953 }
1954 return true;
1955 }
1956
1957
1958 /*
1959 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1960 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1961 Inquiry Unit Serial Number information for each device connected to
1962 Controller.
1963 */
1964
1965 static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1966 *Controller)
1967 {
1968 struct dma_loaf local_dma;
1969
1970 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1971 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1972
1973 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1974 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1975
1976 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1977 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1978
1979 struct completion Completions[DAC960_V1_MaxChannels];
1980 unsigned long flags;
1981 int Channel, TargetID;
1982
1983 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1984 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1985 sizeof(DAC960_SCSI_Inquiry_T) +
1986 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1987 return DAC960_Failure(Controller,
1988 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1989
1990 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1991 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1992 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1993 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1994 sizeof(DAC960_SCSI_Inquiry_T),
1995 SCSI_Inquiry_dma + Channel);
1996 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1997 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1998 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1999 }
2000
2001 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2002 {
2003 /*
2004 * For each channel, submit a probe for a device on that channel.
2005 * The timeout interval for a device that is present is 10 seconds.
2006 * With this approach, the timeout periods can elapse in parallel
2007 * on each channel.
2008 */
2009 for (Channel = 0; Channel < Controller->Channels; Channel++)
2010 {
2011 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2012 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2013 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2014 DAC960_Command_T *Command = Controller->Commands[Channel];
2015 struct completion *Completion = &Completions[Channel];
2016
2017 init_completion(Completion);
2018 DAC960_V1_ClearCommand(Command);
2019 Command->CommandType = DAC960_ImmediateCommand;
2020 Command->Completion = Completion;
2021 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2022 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2023 DCDB->Channel = Channel;
2024 DCDB->TargetID = TargetID;
2025 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2026 DCDB->EarlyStatus = false;
2027 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2028 DCDB->NoAutomaticRequestSense = false;
2029 DCDB->DisconnectPermitted = true;
2030 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2031 DCDB->BusAddress = NewInquiryStandardDataDMA;
2032 DCDB->CDBLength = 6;
2033 DCDB->TransferLengthHigh4 = 0;
2034 DCDB->SenseLength = sizeof(DCDB->SenseData);
2035 DCDB->CDB[0] = 0x12; /* INQUIRY */
2036 DCDB->CDB[1] = 0; /* EVPD = 0 */
2037 DCDB->CDB[2] = 0; /* Page Code */
2038 DCDB->CDB[3] = 0; /* Reserved */
2039 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2040 DCDB->CDB[5] = 0; /* Control */
2041
2042 spin_lock_irqsave(&Controller->queue_lock, flags);
2043 DAC960_QueueCommand(Command);
2044 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2045 }
2046 /*
2047 * Wait for the problems submitted in the previous loop
2048 * to complete. On the probes that are successful,
2049 * get the serial number of the device that was found.
2050 */
2051 for (Channel = 0; Channel < Controller->Channels; Channel++)
2052 {
2053 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2054 &Controller->V1.InquiryStandardData[Channel][TargetID];
2055 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2056 dma_addr_t NewInquiryUnitSerialNumberDMA =
2057 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2058 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2059 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2060 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2061 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2062 DAC960_Command_T *Command = Controller->Commands[Channel];
2063 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2064 struct completion *Completion = &Completions[Channel];
2065
2066 wait_for_completion(Completion);
2067
2068 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2069 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2070 InquiryStandardData->PeripheralDeviceType = 0x1F;
2071 continue;
2072 } else
2073 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2074
2075 /* Preserve Channel and TargetID values from the previous loop */
2076 Command->Completion = Completion;
2077 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2078 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2079 DCDB->SenseLength = sizeof(DCDB->SenseData);
2080 DCDB->CDB[0] = 0x12; /* INQUIRY */
2081 DCDB->CDB[1] = 1; /* EVPD = 1 */
2082 DCDB->CDB[2] = 0x80; /* Page Code */
2083 DCDB->CDB[3] = 0; /* Reserved */
2084 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2085 DCDB->CDB[5] = 0; /* Control */
2086
2087 spin_lock_irqsave(&Controller->queue_lock, flags);
2088 DAC960_QueueCommand(Command);
2089 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2090 wait_for_completion(Completion);
2091
2092 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2093 memset(InquiryUnitSerialNumber, 0,
2094 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2095 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2096 } else
2097 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2098 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2099 }
2100 }
2101 free_dma_loaf(Controller->PCIDevice, &local_dma);
2102 return true;
2103 }
2104
2105
2106 /*
2107 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2108 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2109 Information and SCSI Inquiry Unit Serial Number information for each
2110 device connected to Controller.
2111 */
2112
2113 static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2114 *Controller)
2115 {
2116 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2117 unsigned short PhysicalDeviceIndex = 0;
2118
2119 while (true)
2120 {
2121 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2122 Controller->V2.NewPhysicalDeviceInformation;
2123 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2124 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2125 Controller->V2.NewInquiryUnitSerialNumber;
2126 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2127
2128 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2129 break;
2130
2131 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2132 GFP_ATOMIC);
2133 if (PhysicalDeviceInfo == NULL)
2134 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2135 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2136 PhysicalDeviceInfo;
2137 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2138 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2139
2140 InquiryUnitSerialNumber = kmalloc(
2141 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2142 if (InquiryUnitSerialNumber == NULL) {
2143 kfree(PhysicalDeviceInfo);
2144 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2145 }
2146 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2147 InquiryUnitSerialNumber;
2148
2149 Channel = NewPhysicalDeviceInfo->Channel;
2150 TargetID = NewPhysicalDeviceInfo->TargetID;
2151 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2152
2153 /*
2154 Some devices do NOT have Unit Serial Numbers.
2155 This command fails for them. But, we still want to
2156 remember those devices are there. Construct a
2157 UnitSerialNumber structure for the failure case.
2158 */
2159 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2160 memset(InquiryUnitSerialNumber, 0,
2161 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2162 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2163 } else
2164 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2165 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2166
2167 PhysicalDeviceIndex++;
2168 LogicalUnit++;
2169 }
2170 return true;
2171 }
2172
2173
2174 /*
2175 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2176 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2177 Unit Serial Number structures.
2178 */
2179
2180 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2181 *InquiryStandardData,
2182 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2183 *InquiryUnitSerialNumber,
2184 unsigned char *Vendor,
2185 unsigned char *Model,
2186 unsigned char *Revision,
2187 unsigned char *SerialNumber)
2188 {
2189 int SerialNumberLength, i;
2190 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2191 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2192 {
2193 unsigned char VendorCharacter =
2194 InquiryStandardData->VendorIdentification[i];
2195 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2196 ? VendorCharacter : ' ');
2197 }
2198 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2199 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2200 {
2201 unsigned char ModelCharacter =
2202 InquiryStandardData->ProductIdentification[i];
2203 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2204 ? ModelCharacter : ' ');
2205 }
2206 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2207 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2208 {
2209 unsigned char RevisionCharacter =
2210 InquiryStandardData->ProductRevisionLevel[i];
2211 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2212 ? RevisionCharacter : ' ');
2213 }
2214 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2215 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2216 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2217 if (SerialNumberLength >
2218 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2219 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2220 for (i = 0; i < SerialNumberLength; i++)
2221 {
2222 unsigned char SerialNumberCharacter =
2223 InquiryUnitSerialNumber->ProductSerialNumber[i];
2224 SerialNumber[i] =
2225 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2226 ? SerialNumberCharacter : ' ');
2227 }
2228 SerialNumber[SerialNumberLength] = '\0';
2229 }
2230
2231
2232 /*
2233 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2234 Information for DAC960 V1 Firmware Controllers.
2235 */
2236
2237 static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2238 *Controller)
2239 {
2240 int LogicalDriveNumber, Channel, TargetID;
2241 DAC960_Info(" Physical Devices:\n", Controller);
2242 for (Channel = 0; Channel < Controller->Channels; Channel++)
2243 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2244 {
2245 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2246 &Controller->V1.InquiryStandardData[Channel][TargetID];
2247 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2248 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2249 DAC960_V1_DeviceState_T *DeviceState =
2250 &Controller->V1.DeviceState[Channel][TargetID];
2251 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2252 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2253 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2254 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2255 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2256 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2257 ->ProductSerialNumber)];
2258 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2259 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2260 Vendor, Model, Revision, SerialNumber);
2261 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2262 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2263 Vendor, Model, Revision);
2264 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2265 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2266 if (DeviceState->Present &&
2267 DeviceState->DeviceType == DAC960_V1_DiskType)
2268 {
2269 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2270 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2271 Controller,
2272 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2273 ? "Dead"
2274 : DeviceState->DeviceState
2275 == DAC960_V1_Device_WriteOnly
2276 ? "Write-Only"
2277 : DeviceState->DeviceState
2278 == DAC960_V1_Device_Online
2279 ? "Online" : "Standby"),
2280 DeviceState->DiskSize,
2281 Controller->V1.DeviceResetCount[Channel][TargetID]);
2282 else
2283 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2284 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2285 ? "Dead"
2286 : DeviceState->DeviceState
2287 == DAC960_V1_Device_WriteOnly
2288 ? "Write-Only"
2289 : DeviceState->DeviceState
2290 == DAC960_V1_Device_Online
2291 ? "Online" : "Standby"),
2292 DeviceState->DiskSize);
2293 }
2294 if (ErrorEntry->ParityErrorCount > 0 ||
2295 ErrorEntry->SoftErrorCount > 0 ||
2296 ErrorEntry->HardErrorCount > 0 ||
2297 ErrorEntry->MiscErrorCount > 0)
2298 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2299 "Hard: %d, Misc: %d\n", Controller,
2300 ErrorEntry->ParityErrorCount,
2301 ErrorEntry->SoftErrorCount,
2302 ErrorEntry->HardErrorCount,
2303 ErrorEntry->MiscErrorCount);
2304 }
2305 DAC960_Info(" Logical Drives:\n", Controller);
2306 for (LogicalDriveNumber = 0;
2307 LogicalDriveNumber < Controller->LogicalDriveCount;
2308 LogicalDriveNumber++)
2309 {
2310 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2311 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2312 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2313 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2314 LogicalDriveInformation->RAIDLevel,
2315 (LogicalDriveInformation->LogicalDriveState
2316 == DAC960_V1_LogicalDrive_Online
2317 ? "Online"
2318 : LogicalDriveInformation->LogicalDriveState
2319 == DAC960_V1_LogicalDrive_Critical
2320 ? "Critical" : "Offline"),
2321 LogicalDriveInformation->LogicalDriveSize,
2322 (LogicalDriveInformation->WriteBack
2323 ? "Write Back" : "Write Thru"));
2324 }
2325 return true;
2326 }
2327
2328
2329 /*
2330 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2331 Information for DAC960 V2 Firmware Controllers.
2332 */
2333
2334 static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2335 *Controller)
2336 {
2337 int PhysicalDeviceIndex, LogicalDriveNumber;
2338 DAC960_Info(" Physical Devices:\n", Controller);
2339 for (PhysicalDeviceIndex = 0;
2340 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2341 PhysicalDeviceIndex++)
2342 {
2343 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2344 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2345 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2346 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2347 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2348 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2349 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2350 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2351 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2352 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2353 if (PhysicalDeviceInfo == NULL) break;
2354 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2355 Vendor, Model, Revision, SerialNumber);
2356 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2357 Controller,
2358 PhysicalDeviceInfo->Channel,
2359 PhysicalDeviceInfo->TargetID,
2360 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2361 Vendor, Model, Revision);
2362 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2363 DAC960_Info(" %sAsynchronous\n", Controller,
2364 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2365 ? "Wide " :""));
2366 else
2367 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2368 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2369 ? "Wide " :""),
2370 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2371 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2372 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2373 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2374 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2375 DAC960_V2_Device_Unconfigured)
2376 continue;
2377 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2378 (PhysicalDeviceInfo->PhysicalDeviceState
2379 == DAC960_V2_Device_Online
2380 ? "Online"
2381 : PhysicalDeviceInfo->PhysicalDeviceState
2382 == DAC960_V2_Device_Rebuild
2383 ? "Rebuild"
2384 : PhysicalDeviceInfo->PhysicalDeviceState
2385 == DAC960_V2_Device_Missing
2386 ? "Missing"
2387 : PhysicalDeviceInfo->PhysicalDeviceState
2388 == DAC960_V2_Device_Critical
2389 ? "Critical"
2390 : PhysicalDeviceInfo->PhysicalDeviceState
2391 == DAC960_V2_Device_Dead
2392 ? "Dead"
2393 : PhysicalDeviceInfo->PhysicalDeviceState
2394 == DAC960_V2_Device_SuspectedDead
2395 ? "Suspected-Dead"
2396 : PhysicalDeviceInfo->PhysicalDeviceState
2397 == DAC960_V2_Device_CommandedOffline
2398 ? "Commanded-Offline"
2399 : PhysicalDeviceInfo->PhysicalDeviceState
2400 == DAC960_V2_Device_Standby
2401 ? "Standby" : "Unknown"),
2402 PhysicalDeviceInfo->ConfigurableDeviceSize);
2403 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2404 PhysicalDeviceInfo->SoftErrors == 0 &&
2405 PhysicalDeviceInfo->HardErrors == 0 &&
2406 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2407 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2408 PhysicalDeviceInfo->Retries == 0 &&
2409 PhysicalDeviceInfo->Aborts == 0 &&
2410 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2411 continue;
2412 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2413 "Hard: %d, Misc: %d\n", Controller,
2414 PhysicalDeviceInfo->ParityErrors,
2415 PhysicalDeviceInfo->SoftErrors,
2416 PhysicalDeviceInfo->HardErrors,
2417 PhysicalDeviceInfo->MiscellaneousErrors);
2418 DAC960_Info(" Timeouts: %d, Retries: %d, "
2419 "Aborts: %d, Predicted: %d\n", Controller,
2420 PhysicalDeviceInfo->CommandTimeouts,
2421 PhysicalDeviceInfo->Retries,
2422 PhysicalDeviceInfo->Aborts,
2423 PhysicalDeviceInfo->PredictedFailuresDetected);
2424 }
2425 DAC960_Info(" Logical Drives:\n", Controller);
2426 for (LogicalDriveNumber = 0;
2427 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2428 LogicalDriveNumber++)
2429 {
2430 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2431 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2432 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2433 "Read Cache Enabled",
2434 "Read Ahead Enabled",
2435 "Intelligent Read Ahead Enabled",
2436 "-", "-", "-", "-" };
2437 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2438 "Logical Device Read Only",
2439 "Write Cache Enabled",
2440 "Intelligent Write Cache Enabled",
2441 "-", "-", "-", "-" };
2442 unsigned char *GeometryTranslation;
2443 if (LogicalDeviceInfo == NULL) continue;
2444 switch (LogicalDeviceInfo->DriveGeometry)
2445 {
2446 case DAC960_V2_Geometry_128_32:
2447 GeometryTranslation = "128/32";
2448 break;
2449 case DAC960_V2_Geometry_255_63:
2450 GeometryTranslation = "255/63";
2451 break;
2452 default:
2453 GeometryTranslation = "Invalid";
2454 DAC960_Error("Illegal Logical Device Geometry %d\n",
2455 Controller, LogicalDeviceInfo->DriveGeometry);
2456 break;
2457 }
2458 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2459 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2460 LogicalDeviceInfo->RAIDLevel,
2461 (LogicalDeviceInfo->LogicalDeviceState
2462 == DAC960_V2_LogicalDevice_Online
2463 ? "Online"
2464 : LogicalDeviceInfo->LogicalDeviceState
2465 == DAC960_V2_LogicalDevice_Critical
2466 ? "Critical" : "Offline"),
2467 LogicalDeviceInfo->ConfigurableDeviceSize);
2468 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2469 Controller,
2470 (LogicalDeviceInfo->LogicalDeviceControl
2471 .LogicalDeviceInitialized
2472 ? "Initialized" : "Uninitialized"),
2473 GeometryTranslation);
2474 if (LogicalDeviceInfo->StripeSize == 0)
2475 {
2476 if (LogicalDeviceInfo->CacheLineSize == 0)
2477 DAC960_Info(" Stripe Size: N/A, "
2478 "Segment Size: N/A\n", Controller);
2479 else
2480 DAC960_Info(" Stripe Size: N/A, "
2481 "Segment Size: %dKB\n", Controller,
2482 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2483 }
2484 else
2485 {
2486 if (LogicalDeviceInfo->CacheLineSize == 0)
2487 DAC960_Info(" Stripe Size: %dKB, "
2488 "Segment Size: N/A\n", Controller,
2489 1 << (LogicalDeviceInfo->StripeSize - 2));
2490 else
2491 DAC960_Info(" Stripe Size: %dKB, "
2492 "Segment Size: %dKB\n", Controller,
2493 1 << (LogicalDeviceInfo->StripeSize - 2),
2494 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2495 }
2496 DAC960_Info(" %s, %s\n", Controller,
2497 ReadCacheStatus[
2498 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2499 WriteCacheStatus[
2500 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2501 if (LogicalDeviceInfo->SoftErrors > 0 ||
2502 LogicalDeviceInfo->CommandsFailed > 0 ||
2503 LogicalDeviceInfo->DeferredWriteErrors)
2504 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2505 "Deferred Write: %d\n", Controller,
2506 LogicalDeviceInfo->SoftErrors,
2507 LogicalDeviceInfo->CommandsFailed,
2508 LogicalDeviceInfo->DeferredWriteErrors);
2509
2510 }
2511 return true;
2512 }
2513
2514 /*
2515 DAC960_RegisterBlockDevice registers the Block Device structures
2516 associated with Controller.
2517 */
2518
2519 static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2520 {
2521 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2522 int n;
2523
2524 /*
2525 Register the Block Device Major Number for this DAC960 Controller.
2526 */
2527 if (register_blkdev(MajorNumber, "dac960") < 0)
2528 return false;
2529
2530 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2531 struct gendisk *disk = Controller->disks[n];
2532 struct request_queue *RequestQueue;
2533
2534 /* for now, let all request queues share controller's lock */
2535 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2536 if (!RequestQueue) {
2537 printk("DAC960: failure to allocate request queue\n");
2538 continue;
2539 }
2540 Controller->RequestQueue[n] = RequestQueue;
2541 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2542 RequestQueue->queuedata = Controller;
2543 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2544 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2545 disk->queue = RequestQueue;
2546 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2547 disk->major = MajorNumber;
2548 disk->first_minor = n << DAC960_MaxPartitionsBits;
2549 disk->fops = &DAC960_BlockDeviceOperations;
2550 disk->events = DISK_EVENT_MEDIA_CHANGE;
2551 }
2552 /*
2553 Indicate the Block Device Registration completed successfully,
2554 */
2555 return true;
2556 }
2557
2558
2559 /*
2560 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2561 associated with Controller.
2562 */
2563
2564 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2565 {
2566 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2567 int disk;
2568
2569 /* does order matter when deleting gendisk and cleanup in request queue? */
2570 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2571 del_gendisk(Controller->disks[disk]);
2572 blk_cleanup_queue(Controller->RequestQueue[disk]);
2573 Controller->RequestQueue[disk] = NULL;
2574 }
2575
2576 /*
2577 Unregister the Block Device Major Number for this DAC960 Controller.
2578 */
2579 unregister_blkdev(MajorNumber, "dac960");
2580 }
2581
2582 /*
2583 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2584 Information Partition Sector Counts and Block Sizes.
2585 */
2586
2587 static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2588 {
2589 int disk;
2590 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2591 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2592 }
2593
2594 /*
2595 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2596 the Error Status Register when the driver performs the BIOS handshaking.
2597 It returns true for fatal errors and false otherwise.
2598 */
2599
2600 static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2601 unsigned char ErrorStatus,
2602 unsigned char Parameter0,
2603 unsigned char Parameter1)
2604 {
2605 switch (ErrorStatus)
2606 {
2607 case 0x00:
2608 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2609 Controller, Parameter1, Parameter0);
2610 break;
2611 case 0x08:
2612 if (Controller->DriveSpinUpMessageDisplayed) break;
2613 DAC960_Notice("Spinning Up Drives\n", Controller);
2614 Controller->DriveSpinUpMessageDisplayed = true;
2615 break;
2616 case 0x30:
2617 DAC960_Notice("Configuration Checksum Error\n", Controller);
2618 break;
2619 case 0x60:
2620 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2621 break;
2622 case 0x70:
2623 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2624 break;
2625 case 0x90:
2626 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2627 Controller, Parameter1, Parameter0);
2628 break;
2629 case 0xA0:
2630 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2631 break;
2632 case 0xB0:
2633 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2634 break;
2635 case 0xD0:
2636 DAC960_Notice("New Controller Configuration Found\n", Controller);
2637 break;
2638 case 0xF0:
2639 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2640 return true;
2641 default:
2642 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2643 Controller, ErrorStatus);
2644 return true;
2645 }
2646 return false;
2647 }
2648
2649
2650 /*
2651 * DAC960_DetectCleanup releases the resources that were allocated
2652 * during DAC960_DetectController(). DAC960_DetectController can
2653 * has several internal failure points, so not ALL resources may
2654 * have been allocated. It's important to free only
2655 * resources that HAVE been allocated. The code below always
2656 * tests that the resource has been allocated before attempting to
2657 * free it.
2658 */
2659 static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2660 {
2661 int i;
2662
2663 /* Free the memory mailbox, status, and related structures */
2664 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2665 if (Controller->MemoryMappedAddress) {
2666 switch(Controller->HardwareType)
2667 {
2668 case DAC960_GEM_Controller:
2669 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2670 break;
2671 case DAC960_BA_Controller:
2672 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2673 break;
2674 case DAC960_LP_Controller:
2675 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2676 break;
2677 case DAC960_LA_Controller:
2678 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2679 break;
2680 case DAC960_PG_Controller:
2681 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2682 break;
2683 case DAC960_PD_Controller:
2684 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2685 break;
2686 case DAC960_P_Controller:
2687 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2688 break;
2689 }
2690 iounmap(Controller->MemoryMappedAddress);
2691 }
2692 if (Controller->IRQ_Channel)
2693 free_irq(Controller->IRQ_Channel, Controller);
2694 if (Controller->IO_Address)
2695 release_region(Controller->IO_Address, 0x80);
2696 pci_disable_device(Controller->PCIDevice);
2697 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2698 put_disk(Controller->disks[i]);
2699 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2700 kfree(Controller);
2701 }
2702
2703
2704 /*
2705 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2706 PCI RAID Controllers by interrogating the PCI Configuration Space for
2707 Controller Type.
2708 */
2709
2710 static DAC960_Controller_T *
2711 DAC960_DetectController(struct pci_dev *PCI_Device,
2712 const struct pci_device_id *entry)
2713 {
2714 struct DAC960_privdata *privdata =
2715 (struct DAC960_privdata *)entry->driver_data;
2716 irq_handler_t InterruptHandler = privdata->InterruptHandler;
2717 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2718 DAC960_Controller_T *Controller = NULL;
2719 unsigned char DeviceFunction = PCI_Device->devfn;
2720 unsigned char ErrorStatus, Parameter0, Parameter1;
2721 unsigned int IRQ_Channel;
2722 void __iomem *BaseAddress;
2723 int i;
2724
2725 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2726 if (Controller == NULL) {
2727 DAC960_Error("Unable to allocate Controller structure for "
2728 "Controller at\n", NULL);
2729 return NULL;
2730 }
2731 Controller->ControllerNumber = DAC960_ControllerCount;
2732 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2733 Controller->Bus = PCI_Device->bus->number;
2734 Controller->FirmwareType = privdata->FirmwareType;
2735 Controller->HardwareType = privdata->HardwareType;
2736 Controller->Device = DeviceFunction >> 3;
2737 Controller->Function = DeviceFunction & 0x7;
2738 Controller->PCIDevice = PCI_Device;
2739 strcpy(Controller->FullModelName, "DAC960");
2740
2741 if (pci_enable_device(PCI_Device))
2742 goto Failure;
2743
2744 switch (Controller->HardwareType)
2745 {
2746 case DAC960_GEM_Controller:
2747 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2748 break;
2749 case DAC960_BA_Controller:
2750 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2751 break;
2752 case DAC960_LP_Controller:
2753 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2754 break;
2755 case DAC960_LA_Controller:
2756 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2757 break;
2758 case DAC960_PG_Controller:
2759 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2760 break;
2761 case DAC960_PD_Controller:
2762 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2763 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2764 break;
2765 case DAC960_P_Controller:
2766 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2767 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2768 break;
2769 }
2770
2771 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2772 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2773 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2774 if (!Controller->disks[i])
2775 goto Failure;
2776 Controller->disks[i]->private_data = (void *)((long)i);
2777 }
2778 init_waitqueue_head(&Controller->CommandWaitQueue);
2779 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2780 spin_lock_init(&Controller->queue_lock);
2781 DAC960_AnnounceDriver(Controller);
2782 /*
2783 Map the Controller Register Window.
2784 */
2785 if (MemoryWindowSize < PAGE_SIZE)
2786 MemoryWindowSize = PAGE_SIZE;
2787 Controller->MemoryMappedAddress =
2788 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2789 Controller->BaseAddress =
2790 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2791 if (Controller->MemoryMappedAddress == NULL)
2792 {
2793 DAC960_Error("Unable to map Controller Register Window for "
2794 "Controller at\n", Controller);
2795 goto Failure;
2796 }
2797 BaseAddress = Controller->BaseAddress;
2798 switch (Controller->HardwareType)
2799 {
2800 case DAC960_GEM_Controller:
2801 DAC960_GEM_DisableInterrupts(BaseAddress);
2802 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2803 udelay(1000);
2804 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2805 {
2806 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2807 &Parameter0, &Parameter1) &&
2808 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2809 Parameter0, Parameter1))
2810 goto Failure;
2811 udelay(10);
2812 }
2813 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2814 {
2815 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2816 "for Controller at\n", Controller);
2817 goto Failure;
2818 }
2819 DAC960_GEM_EnableInterrupts(BaseAddress);
2820 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2821 Controller->ReadControllerConfiguration =
2822 DAC960_V2_ReadControllerConfiguration;
2823 Controller->ReadDeviceConfiguration =
2824 DAC960_V2_ReadDeviceConfiguration;
2825 Controller->ReportDeviceConfiguration =
2826 DAC960_V2_ReportDeviceConfiguration;
2827 Controller->QueueReadWriteCommand =
2828 DAC960_V2_QueueReadWriteCommand;
2829 break;
2830 case DAC960_BA_Controller:
2831 DAC960_BA_DisableInterrupts(BaseAddress);
2832 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2833 udelay(1000);
2834 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2835 {
2836 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2837 &Parameter0, &Parameter1) &&
2838 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2839 Parameter0, Parameter1))
2840 goto Failure;
2841 udelay(10);
2842 }
2843 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2844 {
2845 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2846 "for Controller at\n", Controller);
2847 goto Failure;
2848 }
2849 DAC960_BA_EnableInterrupts(BaseAddress);
2850 Controller->QueueCommand = DAC960_BA_QueueCommand;
2851 Controller->ReadControllerConfiguration =
2852 DAC960_V2_ReadControllerConfiguration;
2853 Controller->ReadDeviceConfiguration =
2854 DAC960_V2_ReadDeviceConfiguration;
2855 Controller->ReportDeviceConfiguration =
2856 DAC960_V2_ReportDeviceConfiguration;
2857 Controller->QueueReadWriteCommand =
2858 DAC960_V2_QueueReadWriteCommand;
2859 break;
2860 case DAC960_LP_Controller:
2861 DAC960_LP_DisableInterrupts(BaseAddress);
2862 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2863 udelay(1000);
2864 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2865 {
2866 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2867 &Parameter0, &Parameter1) &&
2868 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2869 Parameter0, Parameter1))
2870 goto Failure;
2871 udelay(10);
2872 }
2873 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2874 {
2875 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2876 "for Controller at\n", Controller);
2877 goto Failure;
2878 }
2879 DAC960_LP_EnableInterrupts(BaseAddress);
2880 Controller->QueueCommand = DAC960_LP_QueueCommand;
2881 Controller->ReadControllerConfiguration =
2882 DAC960_V2_ReadControllerConfiguration;
2883 Controller->ReadDeviceConfiguration =
2884 DAC960_V2_ReadDeviceConfiguration;
2885 Controller->ReportDeviceConfiguration =
2886 DAC960_V2_ReportDeviceConfiguration;
2887 Controller->QueueReadWriteCommand =
2888 DAC960_V2_QueueReadWriteCommand;
2889 break;
2890 case DAC960_LA_Controller:
2891 DAC960_LA_DisableInterrupts(BaseAddress);
2892 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2893 udelay(1000);
2894 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2895 {
2896 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2897 &Parameter0, &Parameter1) &&
2898 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2899 Parameter0, Parameter1))
2900 goto Failure;
2901 udelay(10);
2902 }
2903 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2904 {
2905 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2906 "for Controller at\n", Controller);
2907 goto Failure;
2908 }
2909 DAC960_LA_EnableInterrupts(BaseAddress);
2910 if (Controller->V1.DualModeMemoryMailboxInterface)
2911 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2912 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2913 Controller->ReadControllerConfiguration =
2914 DAC960_V1_ReadControllerConfiguration;
2915 Controller->ReadDeviceConfiguration =
2916 DAC960_V1_ReadDeviceConfiguration;
2917 Controller->ReportDeviceConfiguration =
2918 DAC960_V1_ReportDeviceConfiguration;
2919 Controller->QueueReadWriteCommand =
2920 DAC960_V1_QueueReadWriteCommand;
2921 break;
2922 case DAC960_PG_Controller:
2923 DAC960_PG_DisableInterrupts(BaseAddress);
2924 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2925 udelay(1000);
2926 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2927 {
2928 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2929 &Parameter0, &Parameter1) &&
2930 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2931 Parameter0, Parameter1))
2932 goto Failure;
2933 udelay(10);
2934 }
2935 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2936 {
2937 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2938 "for Controller at\n", Controller);
2939 goto Failure;
2940 }
2941 DAC960_PG_EnableInterrupts(BaseAddress);
2942 if (Controller->V1.DualModeMemoryMailboxInterface)
2943 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2944 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2945 Controller->ReadControllerConfiguration =
2946 DAC960_V1_ReadControllerConfiguration;
2947 Controller->ReadDeviceConfiguration =
2948 DAC960_V1_ReadDeviceConfiguration;
2949 Controller->ReportDeviceConfiguration =
2950 DAC960_V1_ReportDeviceConfiguration;
2951 Controller->QueueReadWriteCommand =
2952 DAC960_V1_QueueReadWriteCommand;
2953 break;
2954 case DAC960_PD_Controller:
2955 if (!request_region(Controller->IO_Address, 0x80,
2956 Controller->FullModelName)) {
2957 DAC960_Error("IO port 0x%d busy for Controller at\n",
2958 Controller, Controller->IO_Address);
2959 goto Failure;
2960 }
2961 DAC960_PD_DisableInterrupts(BaseAddress);
2962 DAC960_PD_AcknowledgeStatus(BaseAddress);
2963 udelay(1000);
2964 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2965 {
2966 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2967 &Parameter0, &Parameter1) &&
2968 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2969 Parameter0, Parameter1))
2970 goto Failure;
2971 udelay(10);
2972 }
2973 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2974 {
2975 DAC960_Error("Unable to allocate DMA mapped memory "
2976 "for Controller at\n", Controller);
2977 goto Failure;
2978 }
2979 DAC960_PD_EnableInterrupts(BaseAddress);
2980 Controller->QueueCommand = DAC960_PD_QueueCommand;
2981 Controller->ReadControllerConfiguration =
2982 DAC960_V1_ReadControllerConfiguration;
2983 Controller->ReadDeviceConfiguration =
2984 DAC960_V1_ReadDeviceConfiguration;
2985 Controller->ReportDeviceConfiguration =
2986 DAC960_V1_ReportDeviceConfiguration;
2987 Controller->QueueReadWriteCommand =
2988 DAC960_V1_QueueReadWriteCommand;
2989 break;
2990 case DAC960_P_Controller:
2991 if (!request_region(Controller->IO_Address, 0x80,
2992 Controller->FullModelName)){
2993 DAC960_Error("IO port 0x%d busy for Controller at\n",
2994 Controller, Controller->IO_Address);
2995 goto Failure;
2996 }
2997 DAC960_PD_DisableInterrupts(BaseAddress);
2998 DAC960_PD_AcknowledgeStatus(BaseAddress);
2999 udelay(1000);
3000 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3001 {
3002 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3003 &Parameter0, &Parameter1) &&
3004 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3005 Parameter0, Parameter1))
3006 goto Failure;
3007 udelay(10);
3008 }
3009 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3010 {
3011 DAC960_Error("Unable to allocate DMA mapped memory"
3012 "for Controller at\n", Controller);
3013 goto Failure;
3014 }
3015 DAC960_PD_EnableInterrupts(BaseAddress);
3016 Controller->QueueCommand = DAC960_P_QueueCommand;
3017 Controller->ReadControllerConfiguration =
3018 DAC960_V1_ReadControllerConfiguration;
3019 Controller->ReadDeviceConfiguration =
3020 DAC960_V1_ReadDeviceConfiguration;
3021 Controller->ReportDeviceConfiguration =
3022 DAC960_V1_ReportDeviceConfiguration;
3023 Controller->QueueReadWriteCommand =
3024 DAC960_V1_QueueReadWriteCommand;
3025 break;
3026 }
3027 /*
3028 Acquire shared access to the IRQ Channel.
3029 */
3030 IRQ_Channel = PCI_Device->irq;
3031 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3032 Controller->FullModelName, Controller) < 0)
3033 {
3034 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3035 Controller, Controller->IRQ_Channel);
3036 goto Failure;
3037 }
3038 Controller->IRQ_Channel = IRQ_Channel;
3039 Controller->InitialCommand.CommandIdentifier = 1;
3040 Controller->InitialCommand.Controller = Controller;
3041 Controller->Commands[0] = &Controller->InitialCommand;
3042 Controller->FreeCommands = &Controller->InitialCommand;
3043 return Controller;
3044
3045 Failure:
3046 if (Controller->IO_Address == 0)
3047 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3048 "PCI Address 0x%X\n", Controller,
3049 Controller->Bus, Controller->Device,
3050 Controller->Function, Controller->PCI_Address);
3051 else
3052 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3053 "0x%X PCI Address 0x%X\n", Controller,
3054 Controller->Bus, Controller->Device,
3055 Controller->Function, Controller->IO_Address,
3056 Controller->PCI_Address);
3057 DAC960_DetectCleanup(Controller);
3058 DAC960_ControllerCount--;
3059 return NULL;
3060 }
3061
3062 /*
3063 DAC960_InitializeController initializes Controller.
3064 */
3065
3066 static bool
3067 DAC960_InitializeController(DAC960_Controller_T *Controller)
3068 {
3069 if (DAC960_ReadControllerConfiguration(Controller) &&
3070 DAC960_ReportControllerConfiguration(Controller) &&
3071 DAC960_CreateAuxiliaryStructures(Controller) &&
3072 DAC960_ReadDeviceConfiguration(Controller) &&
3073 DAC960_ReportDeviceConfiguration(Controller) &&
3074 DAC960_RegisterBlockDevice(Controller))
3075 {
3076 /*
3077 Initialize the Monitoring Timer.
3078 */
3079 init_timer(&Controller->MonitoringTimer);
3080 Controller->MonitoringTimer.expires =
3081 jiffies + DAC960_MonitoringTimerInterval;
3082 Controller->MonitoringTimer.data = (unsigned long) Controller;
3083 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3084 add_timer(&Controller->MonitoringTimer);
3085 Controller->ControllerInitialized = true;
3086 return true;
3087 }
3088 return false;
3089 }
3090
3091
3092 /*
3093 DAC960_FinalizeController finalizes Controller.
3094 */
3095
3096 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3097 {
3098 if (Controller->ControllerInitialized)
3099 {
3100 unsigned long flags;
3101
3102 /*
3103 * Acquiring and releasing lock here eliminates
3104 * a very low probability race.
3105 *
3106 * The code below allocates controller command structures
3107 * from the free list without holding the controller lock.
3108 * This is safe assuming there is no other activity on
3109 * the controller at the time.
3110 *
3111 * But, there might be a monitoring command still
3112 * in progress. Setting the Shutdown flag while holding
3113 * the lock ensures that there is no monitoring command
3114 * in the interrupt handler currently, and any monitoring
3115 * commands that complete from this time on will NOT return
3116 * their command structure to the free list.
3117 */
3118
3119 spin_lock_irqsave(&Controller->queue_lock, flags);
3120 Controller->ShutdownMonitoringTimer = 1;
3121 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3122
3123 del_timer_sync(&Controller->MonitoringTimer);
3124 if (Controller->FirmwareType == DAC960_V1_Controller)
3125 {
3126 DAC960_Notice("Flushing Cache...", Controller);
3127 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3128 DAC960_Notice("done\n", Controller);
3129
3130 if (Controller->HardwareType == DAC960_PD_Controller)
3131 release_region(Controller->IO_Address, 0x80);
3132 }
3133 else
3134 {
3135 DAC960_Notice("Flushing Cache...", Controller);
3136 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3137 DAC960_V2_RAID_Controller);
3138 DAC960_Notice("done\n", Controller);
3139 }
3140 }
3141 DAC960_UnregisterBlockDevice(Controller);
3142 DAC960_DestroyAuxiliaryStructures(Controller);
3143 DAC960_DestroyProcEntries(Controller);
3144 DAC960_DetectCleanup(Controller);
3145 }
3146
3147
3148 /*
3149 DAC960_Probe verifies controller's existence and
3150 initializes the DAC960 Driver for that controller.
3151 */
3152
3153 static int
3154 DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3155 {
3156 int disk;
3157 DAC960_Controller_T *Controller;
3158
3159 if (DAC960_ControllerCount == DAC960_MaxControllers)
3160 {
3161 DAC960_Error("More than %d DAC960 Controllers detected - "
3162 "ignoring from Controller at\n",
3163 NULL, DAC960_MaxControllers);
3164 return -ENODEV;
3165 }
3166
3167 Controller = DAC960_DetectController(dev, entry);
3168 if (!Controller)
3169 return -ENODEV;
3170
3171 if (!DAC960_InitializeController(Controller)) {
3172 DAC960_FinalizeController(Controller);
3173 return -ENODEV;
3174 }
3175
3176 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3177 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3178 add_disk(Controller->disks[disk]);
3179 }
3180 DAC960_CreateProcEntries(Controller);
3181 return 0;
3182 }
3183
3184
3185 /*
3186 DAC960_Finalize finalizes the DAC960 Driver.
3187 */
3188
3189 static void DAC960_Remove(struct pci_dev *PCI_Device)
3190 {
3191 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3192 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3193 if (Controller != NULL)
3194 DAC960_FinalizeController(Controller);
3195 }
3196
3197
3198 /*
3199 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3200 DAC960 V1 Firmware Controllers.
3201 */
3202
3203 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3204 {
3205 DAC960_Controller_T *Controller = Command->Controller;
3206 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3207 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3208 Command->V1.ScatterGatherList;
3209 struct scatterlist *ScatterList = Command->V1.ScatterList;
3210
3211 DAC960_V1_ClearCommand(Command);
3212
3213 if (Command->SegmentCount == 1)
3214 {
3215 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3216 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3217 else
3218 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3219
3220 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3221 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3222 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3223 CommandMailbox->Type5.BusAddress =
3224 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3225 }
3226 else
3227 {
3228 int i;
3229
3230 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3231 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3232 else
3233 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3234
3235 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3236 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3237 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3238 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3239
3240 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3241
3242 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3243 ScatterGatherList->SegmentDataPointer =
3244 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3245 ScatterGatherList->SegmentByteCount =
3246 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3247 }
3248 }
3249 DAC960_QueueCommand(Command);
3250 }
3251
3252
3253 /*
3254 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3255 DAC960 V2 Firmware Controllers.
3256 */
3257
3258 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3259 {
3260 DAC960_Controller_T *Controller = Command->Controller;
3261 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3262 struct scatterlist *ScatterList = Command->V2.ScatterList;
3263
3264 DAC960_V2_ClearCommand(Command);
3265
3266 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3267 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3268 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3269 CommandMailbox->SCSI_10.DataTransferSize =
3270 Command->BlockCount << DAC960_BlockSizeBits;
3271 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3272 CommandMailbox->SCSI_10.PhysicalDevice =
3273 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3274 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3275 CommandMailbox->SCSI_10.CDBLength = 10;
3276 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3277 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3278 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3279 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3280 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3281 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3282 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3283 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3284
3285 if (Command->SegmentCount == 1)
3286 {
3287 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3288 .ScatterGatherSegments[0]
3289 .SegmentDataPointer =
3290 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3291 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3292 .ScatterGatherSegments[0]
3293 .SegmentByteCount =
3294 CommandMailbox->SCSI_10.DataTransferSize;
3295 }
3296 else
3297 {
3298 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3299 int i;
3300
3301 if (Command->SegmentCount > 2)
3302 {
3303 ScatterGatherList = Command->V2.ScatterGatherList;
3304 CommandMailbox->SCSI_10.CommandControlBits
3305 .AdditionalScatterGatherListMemory = true;
3306 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3307 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3308 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309 .ExtendedScatterGather.ScatterGatherList0Address =
3310 Command->V2.ScatterGatherListDMA;
3311 }
3312 else
3313 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3314 .ScatterGatherSegments;
3315
3316 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3317 ScatterGatherList->SegmentDataPointer =
3318 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3319 ScatterGatherList->SegmentByteCount =
3320 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3321 }
3322 }
3323 DAC960_QueueCommand(Command);
3324 }
3325
3326
3327 static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3328 {
3329 struct request *Request;
3330 DAC960_Command_T *Command;
3331
3332 while(1) {
3333 Request = blk_peek_request(req_q);
3334 if (!Request)
3335 return 1;
3336
3337 Command = DAC960_AllocateCommand(Controller);
3338 if (Command == NULL)
3339 return 0;
3340
3341 if (rq_data_dir(Request) == READ) {
3342 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3343 Command->CommandType = DAC960_ReadCommand;
3344 } else {
3345 Command->DmaDirection = PCI_DMA_TODEVICE;
3346 Command->CommandType = DAC960_WriteCommand;
3347 }
3348 Command->Completion = Request->end_io_data;
3349 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3350 Command->BlockNumber = blk_rq_pos(Request);
3351 Command->BlockCount = blk_rq_sectors(Request);
3352 Command->Request = Request;
3353 blk_start_request(Request);
3354 Command->SegmentCount = blk_rq_map_sg(req_q,
3355 Command->Request, Command->cmd_sglist);
3356 /* pci_map_sg MAY change the value of SegCount */
3357 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3358 Command->SegmentCount, Command->DmaDirection);
3359
3360 DAC960_QueueReadWriteCommand(Command);
3361 }
3362 }
3363
3364 /*
3365 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3366 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3367 this function should wait for a Command to become available if necessary.
3368 This function returns true if an I/O Request was queued and false otherwise.
3369 */
3370 static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3371 {
3372 int i;
3373
3374 if (!controller->ControllerInitialized)
3375 return;
3376
3377 /* Do this better later! */
3378 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3379 struct request_queue *req_q = controller->RequestQueue[i];
3380
3381 if (req_q == NULL)
3382 continue;
3383
3384 if (!DAC960_process_queue(controller, req_q)) {
3385 controller->req_q_index = i;
3386 return;
3387 }
3388 }
3389
3390 if (controller->req_q_index == 0)
3391 return;
3392
3393 for (i = 0; i < controller->req_q_index; i++) {
3394 struct request_queue *req_q = controller->RequestQueue[i];
3395
3396 if (req_q == NULL)
3397 continue;
3398
3399 if (!DAC960_process_queue(controller, req_q)) {
3400 controller->req_q_index = i;
3401 return;
3402 }
3403 }
3404 }
3405
3406
3407 /*
3408 DAC960_queue_partial_rw extracts one bio from the request already
3409 associated with argument command, and construct a new command block to retry I/O
3410 only on that bio. Queue that command to the controller.
3411
3412 This function re-uses a previously-allocated Command,
3413 there is no failure mode from trying to allocate a command.
3414 */
3415
3416 static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3417 {
3418 DAC960_Controller_T *Controller = Command->Controller;
3419 struct request *Request = Command->Request;
3420 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3421
3422 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3423 Command->CommandType = DAC960_ReadRetryCommand;
3424 else
3425 Command->CommandType = DAC960_WriteRetryCommand;
3426
3427 /*
3428 * We could be more efficient with these mapping requests
3429 * and map only the portions that we need. But since this
3430 * code should almost never be called, just go with a
3431 * simple coding.
3432 */
3433 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3434
3435 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3436 /*
3437 * Resubmitting the request sector at a time is really tedious.
3438 * But, this should almost never happen. So, we're willing to pay
3439 * this price so that in the end, as much of the transfer is completed
3440 * successfully as possible.
3441 */
3442 Command->SegmentCount = 1;
3443 Command->BlockNumber = blk_rq_pos(Request);
3444 Command->BlockCount = 1;
3445 DAC960_QueueReadWriteCommand(Command);
3446 return;
3447 }
3448
3449 /*
3450 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3451 */
3452
3453 static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3454 {
3455 DAC960_ProcessRequest(RequestQueue->queuedata);
3456 }
3457
3458 /*
3459 DAC960_ProcessCompletedBuffer performs completion processing for an
3460 individual Buffer.
3461 */
3462
3463 static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3464 bool SuccessfulIO)
3465 {
3466 struct request *Request = Command->Request;
3467 int Error = SuccessfulIO ? 0 : -EIO;
3468
3469 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3470 Command->SegmentCount, Command->DmaDirection);
3471
3472 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3473 if (Command->Completion) {
3474 complete(Command->Completion);
3475 Command->Completion = NULL;
3476 }
3477 return true;
3478 }
3479 return false;
3480 }
3481
3482 /*
3483 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3484 when an error occurs on a Read or Write operation.
3485 */
3486
3487 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3488 {
3489 DAC960_Controller_T *Controller = Command->Controller;
3490 unsigned char *CommandName = "UNKNOWN";
3491 switch (Command->CommandType)
3492 {
3493 case DAC960_ReadCommand:
3494 case DAC960_ReadRetryCommand:
3495 CommandName = "READ";
3496 break;
3497 case DAC960_WriteCommand:
3498 case DAC960_WriteRetryCommand:
3499 CommandName = "WRITE";
3500 break;
3501 case DAC960_MonitoringCommand:
3502 case DAC960_ImmediateCommand:
3503 case DAC960_QueuedCommand:
3504 break;
3505 }
3506 switch (Command->V1.CommandStatus)
3507 {
3508 case DAC960_V1_IrrecoverableDataError:
3509 DAC960_Error("Irrecoverable Data Error on %s:\n",
3510 Controller, CommandName);
3511 break;
3512 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3513 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3514 Controller, CommandName);
3515 break;
3516 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3517 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3518 "on %s:\n", Controller, CommandName);
3519 break;
3520 case DAC960_V1_BadDataEncountered:
3521 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3522 break;
3523 default:
3524 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3525 Controller, Command->V1.CommandStatus, CommandName);
3526 break;
3527 }
3528 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3529 Controller, Controller->ControllerNumber,
3530 Command->LogicalDriveNumber, Command->BlockNumber,
3531 Command->BlockNumber + Command->BlockCount - 1);
3532 }
3533
3534
3535 /*
3536 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3537 for DAC960 V1 Firmware Controllers.
3538 */
3539
3540 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3541 {
3542 DAC960_Controller_T *Controller = Command->Controller;
3543 DAC960_CommandType_T CommandType = Command->CommandType;
3544 DAC960_V1_CommandOpcode_T CommandOpcode =
3545 Command->V1.CommandMailbox.Common.CommandOpcode;
3546 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3547
3548 if (CommandType == DAC960_ReadCommand ||
3549 CommandType == DAC960_WriteCommand)
3550 {
3551
3552 #ifdef FORCE_RETRY_DEBUG
3553 CommandStatus = DAC960_V1_IrrecoverableDataError;
3554 #endif
3555
3556 if (CommandStatus == DAC960_V1_NormalCompletion) {
3557
3558 if (!DAC960_ProcessCompletedRequest(Command, true))
3559 BUG();
3560
3561 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3562 CommandStatus == DAC960_V1_BadDataEncountered)
3563 {
3564 /*
3565 * break the command down into pieces and resubmit each
3566 * piece, hoping that some of them will succeed.
3567 */
3568 DAC960_queue_partial_rw(Command);
3569 return;
3570 }
3571 else
3572 {
3573 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3574 DAC960_V1_ReadWriteError(Command);
3575
3576 if (!DAC960_ProcessCompletedRequest(Command, false))
3577 BUG();
3578 }
3579 }
3580 else if (CommandType == DAC960_ReadRetryCommand ||
3581 CommandType == DAC960_WriteRetryCommand)
3582 {
3583 bool normal_completion;
3584 #ifdef FORCE_RETRY_FAILURE_DEBUG
3585 static int retry_count = 1;
3586 #endif
3587 /*
3588 Perform completion processing for the portion that was
3589 retried, and submit the next portion, if any.
3590 */
3591 normal_completion = true;
3592 if (CommandStatus != DAC960_V1_NormalCompletion) {
3593 normal_completion = false;
3594 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3595 DAC960_V1_ReadWriteError(Command);
3596 }
3597
3598 #ifdef FORCE_RETRY_FAILURE_DEBUG
3599 if (!(++retry_count % 10000)) {
3600 printk("V1 error retry failure test\n");
3601 normal_completion = false;
3602 DAC960_V1_ReadWriteError(Command);
3603 }
3604 #endif
3605
3606 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3607 DAC960_queue_partial_rw(Command);
3608 return;
3609 }
3610 }
3611
3612 else if (CommandType == DAC960_MonitoringCommand)
3613 {
3614 if (Controller->ShutdownMonitoringTimer)
3615 return;
3616 if (CommandOpcode == DAC960_V1_Enquiry)
3617 {
3618 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3619 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3620 unsigned int OldCriticalLogicalDriveCount =
3621 OldEnquiry->CriticalLogicalDriveCount;
3622 unsigned int NewCriticalLogicalDriveCount =
3623 NewEnquiry->CriticalLogicalDriveCount;
3624 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3625 {
3626 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3627 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3628 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3629 "Now Exists\n", Controller,
3630 LogicalDriveNumber,
3631 Controller->ControllerNumber,
3632 LogicalDriveNumber);
3633 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3634 DAC960_ComputeGenericDiskInfo(Controller);
3635 }
3636 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3637 {
3638 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3639 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3640 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3641 "No Longer Exists\n", Controller,
3642 LogicalDriveNumber,
3643 Controller->ControllerNumber,
3644 LogicalDriveNumber);
3645 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3646 DAC960_ComputeGenericDiskInfo(Controller);
3647 }
3648 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3649 OldEnquiry->StatusFlags.DeferredWriteError)
3650 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3651 (NewEnquiry->StatusFlags.DeferredWriteError
3652 ? "TRUE" : "FALSE"));
3653 if ((NewCriticalLogicalDriveCount > 0 ||
3654 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3655 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3656 NewEnquiry->OfflineLogicalDriveCount !=
3657 OldEnquiry->OfflineLogicalDriveCount) ||
3658 (NewEnquiry->DeadDriveCount > 0 ||
3659 NewEnquiry->DeadDriveCount !=
3660 OldEnquiry->DeadDriveCount) ||
3661 (NewEnquiry->EventLogSequenceNumber !=
3662 OldEnquiry->EventLogSequenceNumber) ||
3663 Controller->MonitoringTimerCount == 0 ||
3664 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3665 + DAC960_SecondaryMonitoringInterval))
3666 {
3667 Controller->V1.NeedLogicalDriveInformation = true;
3668 Controller->V1.NewEventLogSequenceNumber =
3669 NewEnquiry->EventLogSequenceNumber;
3670 Controller->V1.NeedErrorTableInformation = true;
3671 Controller->V1.NeedDeviceStateInformation = true;
3672 Controller->V1.StartDeviceStateScan = true;
3673 Controller->V1.NeedBackgroundInitializationStatus =
3674 Controller->V1.BackgroundInitializationStatusSupported;
3675 Controller->SecondaryMonitoringTime = jiffies;
3676 }
3677 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3678 NewEnquiry->RebuildFlag
3679 == DAC960_V1_BackgroundRebuildInProgress ||
3680 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3681 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3682 {
3683 Controller->V1.NeedRebuildProgress = true;
3684 Controller->V1.RebuildProgressFirst =
3685 (NewEnquiry->CriticalLogicalDriveCount <
3686 OldEnquiry->CriticalLogicalDriveCount);
3687 }
3688 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3689 switch (NewEnquiry->RebuildFlag)
3690 {
3691 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3692 DAC960_Progress("Consistency Check Completed Successfully\n",
3693 Controller);
3694 break;
3695 case DAC960_V1_StandbyRebuildInProgress:
3696 case DAC960_V1_BackgroundRebuildInProgress:
3697 break;
3698 case DAC960_V1_BackgroundCheckInProgress:
3699 Controller->V1.NeedConsistencyCheckProgress = true;
3700 break;
3701 case DAC960_V1_StandbyRebuildCompletedWithError:
3702 DAC960_Progress("Consistency Check Completed with Error\n",
3703 Controller);
3704 break;
3705 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3706 DAC960_Progress("Consistency Check Failed - "
3707 "Physical Device Failed\n", Controller);
3708 break;
3709 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3710 DAC960_Progress("Consistency Check Failed - "
3711 "Logical Drive Failed\n", Controller);
3712 break;
3713 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3714 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3715 Controller);
3716 break;
3717 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3718 DAC960_Progress("Consistency Check Successfully Terminated\n",
3719 Controller);
3720 break;
3721 }
3722 else if (NewEnquiry->RebuildFlag
3723 == DAC960_V1_BackgroundCheckInProgress)
3724 Controller->V1.NeedConsistencyCheckProgress = true;
3725 Controller->MonitoringAlertMode =
3726 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3727 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3728 NewEnquiry->DeadDriveCount > 0);
3729 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3730 {
3731 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3732 Controller->V1.RebuildFlagPending = true;
3733 }
3734 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3735 sizeof(DAC960_V1_Enquiry_T));
3736 }
3737 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3738 {
3739 static char
3740 *DAC960_EventMessages[] =
3741 { "killed because write recovery failed",
3742 "killed because of SCSI bus reset failure",
3743 "killed because of double check condition",
3744 "killed because it was removed",
3745 "killed because of gross error on SCSI chip",
3746 "killed because of bad tag returned from drive",
3747 "killed because of timeout on SCSI command",
3748 "killed because of reset SCSI command issued from system",
3749 "killed because busy or parity error count exceeded limit",
3750 "killed because of 'kill drive' command from system",
3751 "killed because of selection timeout",
3752 "killed due to SCSI phase sequence error",
3753 "killed due to unknown status" };
3754 DAC960_V1_EventLogEntry_T *EventLogEntry =
3755 Controller->V1.EventLogEntry;
3756 if (EventLogEntry->SequenceNumber ==
3757 Controller->V1.OldEventLogSequenceNumber)
3758 {
3759 unsigned char SenseKey = EventLogEntry->SenseKey;
3760 unsigned char AdditionalSenseCode =
3761 EventLogEntry->AdditionalSenseCode;
3762 unsigned char AdditionalSenseCodeQualifier =
3763 EventLogEntry->AdditionalSenseCodeQualifier;
3764 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3765 AdditionalSenseCode == 0x80 &&
3766 AdditionalSenseCodeQualifier <
3767 ARRAY_SIZE(DAC960_EventMessages))
3768 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3769 EventLogEntry->Channel,
3770 EventLogEntry->TargetID,
3771 DAC960_EventMessages[
3772 AdditionalSenseCodeQualifier]);
3773 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3774 AdditionalSenseCode == 0x29)
3775 {
3776 if (Controller->MonitoringTimerCount > 0)
3777 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3778 [EventLogEntry->TargetID]++;
3779 }
3780 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3781 (SenseKey == DAC960_SenseKey_NotReady &&
3782 AdditionalSenseCode == 0x04 &&
3783 (AdditionalSenseCodeQualifier == 0x01 ||
3784 AdditionalSenseCodeQualifier == 0x02))))
3785 {
3786 DAC960_Critical("Physical Device %d:%d Error Log: "
3787 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3788 Controller,
3789 EventLogEntry->Channel,
3790 EventLogEntry->TargetID,
3791 SenseKey,
3792 AdditionalSenseCode,
3793 AdditionalSenseCodeQualifier);
3794 DAC960_Critical("Physical Device %d:%d Error Log: "
3795 "Information = %02X%02X%02X%02X "
3796 "%02X%02X%02X%02X\n",
3797 Controller,
3798 EventLogEntry->Channel,
3799 EventLogEntry->TargetID,
3800 EventLogEntry->Information[0],
3801 EventLogEntry->Information[1],
3802 EventLogEntry->Information[2],
3803 EventLogEntry->Information[3],
3804 EventLogEntry->CommandSpecificInformation[0],
3805 EventLogEntry->CommandSpecificInformation[1],
3806 EventLogEntry->CommandSpecificInformation[2],
3807 EventLogEntry->CommandSpecificInformation[3]);
3808 }
3809 }
3810 Controller->V1.OldEventLogSequenceNumber++;
3811 }
3812 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3813 {
3814 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3815 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3816 int Channel, TargetID;
3817 for (Channel = 0; Channel < Controller->Channels; Channel++)
3818 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3819 {
3820 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3821 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3822 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3823 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3824 if ((NewErrorEntry->ParityErrorCount !=
3825 OldErrorEntry->ParityErrorCount) ||
3826 (NewErrorEntry->SoftErrorCount !=
3827 OldErrorEntry->SoftErrorCount) ||
3828 (NewErrorEntry->HardErrorCount !=
3829 OldErrorEntry->HardErrorCount) ||
3830 (NewErrorEntry->MiscErrorCount !=
3831 OldErrorEntry->MiscErrorCount))
3832 DAC960_Critical("Physical Device %d:%d Errors: "
3833 "Parity = %d, Soft = %d, "
3834 "Hard = %d, Misc = %d\n",
3835 Controller, Channel, TargetID,
3836 NewErrorEntry->ParityErrorCount,
3837 NewErrorEntry->SoftErrorCount,
3838 NewErrorEntry->HardErrorCount,
3839 NewErrorEntry->MiscErrorCount);
3840 }
3841 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3842 sizeof(DAC960_V1_ErrorTable_T));
3843 }
3844 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3845 {
3846 DAC960_V1_DeviceState_T *OldDeviceState =
3847 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3848 [Controller->V1.DeviceStateTargetID];
3849 DAC960_V1_DeviceState_T *NewDeviceState =
3850 Controller->V1.NewDeviceState;
3851 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3852 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3853 Controller->V1.DeviceStateChannel,
3854 Controller->V1.DeviceStateTargetID,
3855 (NewDeviceState->DeviceState
3856 == DAC960_V1_Device_Dead
3857 ? "DEAD"
3858 : NewDeviceState->DeviceState
3859 == DAC960_V1_Device_WriteOnly
3860 ? "WRITE-ONLY"
3861 : NewDeviceState->DeviceState
3862 == DAC960_V1_Device_Online
3863 ? "ONLINE" : "STANDBY"));
3864 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3865 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3866 {
3867 Controller->V1.NeedDeviceInquiryInformation = true;
3868 Controller->V1.NeedDeviceSerialNumberInformation = true;
3869 Controller->V1.DeviceResetCount
3870 [Controller->V1.DeviceStateChannel]
3871 [Controller->V1.DeviceStateTargetID] = 0;
3872 }
3873 memcpy(OldDeviceState, NewDeviceState,
3874 sizeof(DAC960_V1_DeviceState_T));
3875 }
3876 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3877 {
3878 int LogicalDriveNumber;
3879 for (LogicalDriveNumber = 0;
3880 LogicalDriveNumber < Controller->LogicalDriveCount;
3881 LogicalDriveNumber++)
3882 {
3883 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3884 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3885 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3886 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3887 if (NewLogicalDriveInformation->LogicalDriveState !=
3888 OldLogicalDriveInformation->LogicalDriveState)
3889 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3890 "is now %s\n", Controller,
3891 LogicalDriveNumber,
3892 Controller->ControllerNumber,
3893 LogicalDriveNumber,
3894 (NewLogicalDriveInformation->LogicalDriveState
3895 == DAC960_V1_LogicalDrive_Online
3896 ? "ONLINE"
3897 : NewLogicalDriveInformation->LogicalDriveState
3898 == DAC960_V1_LogicalDrive_Critical
3899 ? "CRITICAL" : "OFFLINE"));
3900 if (NewLogicalDriveInformation->WriteBack !=
3901 OldLogicalDriveInformation->WriteBack)
3902 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3903 "is now %s\n", Controller,
3904 LogicalDriveNumber,
3905 Controller->ControllerNumber,
3906 LogicalDriveNumber,
3907 (NewLogicalDriveInformation->WriteBack
3908 ? "WRITE BACK" : "WRITE THRU"));
3909 }
3910 memcpy(&Controller->V1.LogicalDriveInformation,
3911 Controller->V1.NewLogicalDriveInformation,
3912 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3913 }
3914 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3915 {
3916 unsigned int LogicalDriveNumber =
3917 Controller->V1.RebuildProgress->LogicalDriveNumber;
3918 unsigned int LogicalDriveSize =
3919 Controller->V1.RebuildProgress->LogicalDriveSize;
3920 unsigned int BlocksCompleted =
3921 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3922 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3923 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3924 CommandStatus = DAC960_V1_RebuildSuccessful;
3925 switch (CommandStatus)
3926 {
3927 case DAC960_V1_NormalCompletion:
3928 Controller->EphemeralProgressMessage = true;
3929 DAC960_Progress("Rebuild in Progress: "
3930 "Logical Drive %d (/dev/rd/c%dd%d) "
3931 "%d%% completed\n",
3932 Controller, LogicalDriveNumber,
3933 Controller->ControllerNumber,
3934 LogicalDriveNumber,
3935 (100 * (BlocksCompleted >> 7))
3936 / (LogicalDriveSize >> 7));
3937 Controller->EphemeralProgressMessage = false;
3938 break;
3939 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3940 DAC960_Progress("Rebuild Failed due to "
3941 "Logical Drive Failure\n", Controller);
3942 break;
3943 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3944 DAC960_Progress("Rebuild Failed due to "
3945 "Bad Blocks on Other Drives\n", Controller);
3946 break;
3947 case DAC960_V1_RebuildFailed_NewDriveFailed:
3948 DAC960_Progress("Rebuild Failed due to "
3949 "Failure of Drive Being Rebuilt\n", Controller);
3950 break;
3951 case DAC960_V1_NoRebuildOrCheckInProgress:
3952 break;
3953 case DAC960_V1_RebuildSuccessful:
3954 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3955 break;
3956 case DAC960_V1_RebuildSuccessfullyTerminated:
3957 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3958 break;
3959 }
3960 Controller->V1.LastRebuildStatus = CommandStatus;
3961 if (CommandType != DAC960_MonitoringCommand &&
3962 Controller->V1.RebuildStatusPending)
3963 {
3964 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3965 Controller->V1.RebuildStatusPending = false;
3966 }
3967 else if (CommandType == DAC960_MonitoringCommand &&
3968 CommandStatus != DAC960_V1_NormalCompletion &&
3969 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3970 {
3971 Controller->V1.PendingRebuildStatus = CommandStatus;
3972 Controller->V1.RebuildStatusPending = true;
3973 }
3974 }
3975 else if (CommandOpcode == DAC960_V1_RebuildStat)
3976 {
3977 unsigned int LogicalDriveNumber =
3978 Controller->V1.RebuildProgress->LogicalDriveNumber;
3979 unsigned int LogicalDriveSize =
3980 Controller->V1.RebuildProgress->LogicalDriveSize;
3981 unsigned int BlocksCompleted =
3982 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3983 if (CommandStatus == DAC960_V1_NormalCompletion)
3984 {
3985 Controller->EphemeralProgressMessage = true;
3986 DAC960_Progress("Consistency Check in Progress: "
3987 "Logical Drive %d (/dev/rd/c%dd%d) "
3988 "%d%% completed\n",
3989 Controller, LogicalDriveNumber,
3990 Controller->ControllerNumber,
3991 LogicalDriveNumber,
3992 (100 * (BlocksCompleted >> 7))
3993 / (LogicalDriveSize >> 7));
3994 Controller->EphemeralProgressMessage = false;
3995 }
3996 }
3997 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3998 {
3999 unsigned int LogicalDriveNumber =
4000 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4001 unsigned int LogicalDriveSize =
4002 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4003 unsigned int BlocksCompleted =
4004 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4005 switch (CommandStatus)
4006 {
4007 case DAC960_V1_NormalCompletion:
4008 switch (Controller->V1.BackgroundInitializationStatus->Status)
4009 {
4010 case DAC960_V1_BackgroundInitializationInvalid:
4011 break;
4012 case DAC960_V1_BackgroundInitializationStarted:
4013 DAC960_Progress("Background Initialization Started\n",
4014 Controller);
4015 break;
4016 case DAC960_V1_BackgroundInitializationInProgress:
4017 if (BlocksCompleted ==
4018 Controller->V1.LastBackgroundInitializationStatus.
4019 BlocksCompleted &&
4020 LogicalDriveNumber ==
4021 Controller->V1.LastBackgroundInitializationStatus.
4022 LogicalDriveNumber)
4023 break;
4024 Controller->EphemeralProgressMessage = true;
4025 DAC960_Progress("Background Initialization in Progress: "
4026 "Logical Drive %d (/dev/rd/c%dd%d) "
4027 "%d%% completed\n",
4028 Controller, LogicalDriveNumber,
4029 Controller->ControllerNumber,
4030 LogicalDriveNumber,
4031 (100 * (BlocksCompleted >> 7))
4032 / (LogicalDriveSize >> 7));
4033 Controller->EphemeralProgressMessage = false;
4034 break;
4035 case DAC960_V1_BackgroundInitializationSuspended:
4036 DAC960_Progress("Background Initialization Suspended\n",
4037 Controller);
4038 break;
4039 case DAC960_V1_BackgroundInitializationCancelled:
4040 DAC960_Progress("Background Initialization Cancelled\n",
4041 Controller);
4042 break;
4043 }
4044 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4045 Controller->V1.BackgroundInitializationStatus,
4046 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4047 break;
4048 case DAC960_V1_BackgroundInitSuccessful:
4049 if (Controller->V1.BackgroundInitializationStatus->Status ==
4050 DAC960_V1_BackgroundInitializationInProgress)
4051 DAC960_Progress("Background Initialization "
4052 "Completed Successfully\n", Controller);
4053 Controller->V1.BackgroundInitializationStatus->Status =
4054 DAC960_V1_BackgroundInitializationInvalid;
4055 break;
4056 case DAC960_V1_BackgroundInitAborted:
4057 if (Controller->V1.BackgroundInitializationStatus->Status ==
4058 DAC960_V1_BackgroundInitializationInProgress)
4059 DAC960_Progress("Background Initialization Aborted\n",
4060 Controller);
4061 Controller->V1.BackgroundInitializationStatus->Status =
4062 DAC960_V1_BackgroundInitializationInvalid;
4063 break;
4064 case DAC960_V1_NoBackgroundInitInProgress:
4065 break;
4066 }
4067 }
4068 else if (CommandOpcode == DAC960_V1_DCDB)
4069 {
4070 /*
4071 This is a bit ugly.
4072
4073 The InquiryStandardData and
4074 the InquiryUntitSerialNumber information
4075 retrieval operations BOTH use the DAC960_V1_DCDB
4076 commands. the test above can't distinguish between
4077 these two cases.
4078
4079 Instead, we rely on the order of code later in this
4080 function to ensure that DeviceInquiryInformation commands
4081 are submitted before DeviceSerialNumber commands.
4082 */
4083 if (Controller->V1.NeedDeviceInquiryInformation)
4084 {
4085 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4086 &Controller->V1.InquiryStandardData
4087 [Controller->V1.DeviceStateChannel]
4088 [Controller->V1.DeviceStateTargetID];
4089 if (CommandStatus != DAC960_V1_NormalCompletion)
4090 {
4091 memset(InquiryStandardData, 0,
4092 sizeof(DAC960_SCSI_Inquiry_T));
4093 InquiryStandardData->PeripheralDeviceType = 0x1F;
4094 }
4095 else
4096 memcpy(InquiryStandardData,
4097 Controller->V1.NewInquiryStandardData,
4098 sizeof(DAC960_SCSI_Inquiry_T));
4099 Controller->V1.NeedDeviceInquiryInformation = false;
4100 }
4101 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4102 {
4103 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4104 &Controller->V1.InquiryUnitSerialNumber
4105 [Controller->V1.DeviceStateChannel]
4106 [Controller->V1.DeviceStateTargetID];
4107 if (CommandStatus != DAC960_V1_NormalCompletion)
4108 {
4109 memset(InquiryUnitSerialNumber, 0,
4110 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4111 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4112 }
4113 else
4114 memcpy(InquiryUnitSerialNumber,
4115 Controller->V1.NewInquiryUnitSerialNumber,
4116 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4117 Controller->V1.NeedDeviceSerialNumberInformation = false;
4118 }
4119 }
4120 /*
4121 Begin submitting new monitoring commands.
4122 */
4123 if (Controller->V1.NewEventLogSequenceNumber
4124 - Controller->V1.OldEventLogSequenceNumber > 0)
4125 {
4126 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4127 DAC960_V1_PerformEventLogOperation;
4128 Command->V1.CommandMailbox.Type3E.OperationType =
4129 DAC960_V1_GetEventLogEntry;
4130 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4131 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4132 Controller->V1.OldEventLogSequenceNumber;
4133 Command->V1.CommandMailbox.Type3E.BusAddress =
4134 Controller->V1.EventLogEntryDMA;
4135 DAC960_QueueCommand(Command);
4136 return;
4137 }
4138 if (Controller->V1.NeedErrorTableInformation)
4139 {
4140 Controller->V1.NeedErrorTableInformation = false;
4141 Command->V1.CommandMailbox.Type3.CommandOpcode =
4142 DAC960_V1_GetErrorTable;
4143 Command->V1.CommandMailbox.Type3.BusAddress =
4144 Controller->V1.NewErrorTableDMA;
4145 DAC960_QueueCommand(Command);
4146 return;
4147 }
4148 if (Controller->V1.NeedRebuildProgress &&
4149 Controller->V1.RebuildProgressFirst)
4150 {
4151 Controller->V1.NeedRebuildProgress = false;
4152 Command->V1.CommandMailbox.Type3.CommandOpcode =
4153 DAC960_V1_GetRebuildProgress;
4154 Command->V1.CommandMailbox.Type3.BusAddress =
4155 Controller->V1.RebuildProgressDMA;
4156 DAC960_QueueCommand(Command);
4157 return;
4158 }
4159 if (Controller->V1.NeedDeviceStateInformation)
4160 {
4161 if (Controller->V1.NeedDeviceInquiryInformation)
4162 {
4163 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4164 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4165
4166 dma_addr_t NewInquiryStandardDataDMA =
4167 Controller->V1.NewInquiryStandardDataDMA;
4168
4169 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4170 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4171 DCDB->Channel = Controller->V1.DeviceStateChannel;
4172 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4173 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4174 DCDB->EarlyStatus = false;
4175 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4176 DCDB->NoAutomaticRequestSense = false;
4177 DCDB->DisconnectPermitted = true;
4178 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4179 DCDB->BusAddress = NewInquiryStandardDataDMA;
4180 DCDB->CDBLength = 6;
4181 DCDB->TransferLengthHigh4 = 0;
4182 DCDB->SenseLength = sizeof(DCDB->SenseData);
4183 DCDB->CDB[0] = 0x12; /* INQUIRY */
4184 DCDB->CDB[1] = 0; /* EVPD = 0 */
4185 DCDB->CDB[2] = 0; /* Page Code */
4186 DCDB->CDB[3] = 0; /* Reserved */
4187 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4188 DCDB->CDB[5] = 0; /* Control */
4189 DAC960_QueueCommand(Command);
4190 return;
4191 }
4192 if (Controller->V1.NeedDeviceSerialNumberInformation)
4193 {
4194 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4195 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4196 dma_addr_t NewInquiryUnitSerialNumberDMA =
4197 Controller->V1.NewInquiryUnitSerialNumberDMA;
4198
4199 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4200 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4201 DCDB->Channel = Controller->V1.DeviceStateChannel;
4202 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4203 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4204 DCDB->EarlyStatus = false;
4205 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4206 DCDB->NoAutomaticRequestSense = false;
4207 DCDB->DisconnectPermitted = true;
4208 DCDB->TransferLength =
4209 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4210 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4211 DCDB->CDBLength = 6;
4212 DCDB->TransferLengthHigh4 = 0;
4213 DCDB->SenseLength = sizeof(DCDB->SenseData);
4214 DCDB->CDB[0] = 0x12; /* INQUIRY */
4215 DCDB->CDB[1] = 1; /* EVPD = 1 */
4216 DCDB->CDB[2] = 0x80; /* Page Code */
4217 DCDB->CDB[3] = 0; /* Reserved */
4218 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4219 DCDB->CDB[5] = 0; /* Control */
4220 DAC960_QueueCommand(Command);
4221 return;
4222 }
4223 if (Controller->V1.StartDeviceStateScan)
4224 {
4225 Controller->V1.DeviceStateChannel = 0;
4226 Controller->V1.DeviceStateTargetID = 0;
4227 Controller->V1.StartDeviceStateScan = false;
4228 }
4229 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4230 {
4231 Controller->V1.DeviceStateChannel++;
4232 Controller->V1.DeviceStateTargetID = 0;
4233 }
4234 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4235 {
4236 Controller->V1.NewDeviceState->DeviceState =
4237 DAC960_V1_Device_Dead;
4238 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4239 DAC960_V1_GetDeviceState;
4240 Command->V1.CommandMailbox.Type3D.Channel =
4241 Controller->V1.DeviceStateChannel;
4242 Command->V1.CommandMailbox.Type3D.TargetID =
4243 Controller->V1.DeviceStateTargetID;
4244 Command->V1.CommandMailbox.Type3D.BusAddress =
4245 Controller->V1.NewDeviceStateDMA;
4246 DAC960_QueueCommand(Command);
4247 return;
4248 }
4249 Controller->V1.NeedDeviceStateInformation = false;
4250 }
4251 if (Controller->V1.NeedLogicalDriveInformation)
4252 {
4253 Controller->V1.NeedLogicalDriveInformation = false;
4254 Command->V1.CommandMailbox.Type3.CommandOpcode =
4255 DAC960_V1_GetLogicalDriveInformation;
4256 Command->V1.CommandMailbox.Type3.BusAddress =
4257 Controller->V1.NewLogicalDriveInformationDMA;
4258 DAC960_QueueCommand(Command);
4259 return;
4260 }
4261 if (Controller->V1.NeedRebuildProgress)
4262 {
4263 Controller->V1.NeedRebuildProgress = false;
4264 Command->V1.CommandMailbox.Type3.CommandOpcode =
4265 DAC960_V1_GetRebuildProgress;
4266 Command->V1.CommandMailbox.Type3.BusAddress =
4267 Controller->V1.RebuildProgressDMA;
4268 DAC960_QueueCommand(Command);
4269 return;
4270 }
4271 if (Controller->V1.NeedConsistencyCheckProgress)
4272 {
4273 Controller->V1.NeedConsistencyCheckProgress = false;
4274 Command->V1.CommandMailbox.Type3.CommandOpcode =
4275 DAC960_V1_RebuildStat;
4276 Command->V1.CommandMailbox.Type3.BusAddress =
4277 Controller->V1.RebuildProgressDMA;
4278 DAC960_QueueCommand(Command);
4279 return;
4280 }
4281 if (Controller->V1.NeedBackgroundInitializationStatus)
4282 {
4283 Controller->V1.NeedBackgroundInitializationStatus = false;
4284 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4285 DAC960_V1_BackgroundInitializationControl;
4286 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4287 Command->V1.CommandMailbox.Type3B.BusAddress =
4288 Controller->V1.BackgroundInitializationStatusDMA;
4289 DAC960_QueueCommand(Command);
4290 return;
4291 }
4292 Controller->MonitoringTimerCount++;
4293 Controller->MonitoringTimer.expires =
4294 jiffies + DAC960_MonitoringTimerInterval;
4295 add_timer(&Controller->MonitoringTimer);
4296 }
4297 if (CommandType == DAC960_ImmediateCommand)
4298 {
4299 complete(Command->Completion);
4300 Command->Completion = NULL;
4301 return;
4302 }
4303 if (CommandType == DAC960_QueuedCommand)
4304 {
4305 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4306 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4307 Command->V1.KernelCommand = NULL;
4308 if (CommandOpcode == DAC960_V1_DCDB)
4309 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4310 [KernelCommand->DCDB->TargetID] =
4311 false;
4312 DAC960_DeallocateCommand(Command);
4313 KernelCommand->CompletionFunction(KernelCommand);
4314 return;
4315 }
4316 /*
4317 Queue a Status Monitoring Command to the Controller using the just
4318 completed Command if one was deferred previously due to lack of a
4319 free Command when the Monitoring Timer Function was called.
4320 */
4321 if (Controller->MonitoringCommandDeferred)
4322 {
4323 Controller->MonitoringCommandDeferred = false;
4324 DAC960_V1_QueueMonitoringCommand(Command);
4325 return;
4326 }
4327 /*
4328 Deallocate the Command.
4329 */
4330 DAC960_DeallocateCommand(Command);
4331 /*
4332 Wake up any processes waiting on a free Command.
4333 */
4334 wake_up(&Controller->CommandWaitQueue);
4335 }
4336
4337
4338 /*
4339 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4340 when an error occurs on a Read or Write operation.
4341 */
4342
4343 static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4344 {
4345 DAC960_Controller_T *Controller = Command->Controller;
4346 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4347 "NOT READY", "MEDIUM ERROR",
4348 "HARDWARE ERROR", "ILLEGAL REQUEST",
4349 "UNIT ATTENTION", "DATA PROTECT",
4350 "BLANK CHECK", "VENDOR-SPECIFIC",
4351 "COPY ABORTED", "ABORTED COMMAND",
4352 "EQUAL", "VOLUME OVERFLOW",
4353 "MISCOMPARE", "RESERVED" };
4354 unsigned char *CommandName = "UNKNOWN";
4355 switch (Command->CommandType)
4356 {
4357 case DAC960_ReadCommand:
4358 case DAC960_ReadRetryCommand:
4359 CommandName = "READ";
4360 break;
4361 case DAC960_WriteCommand:
4362 case DAC960_WriteRetryCommand:
4363 CommandName = "WRITE";
4364 break;
4365 case DAC960_MonitoringCommand:
4366 case DAC960_ImmediateCommand:
4367 case DAC960_QueuedCommand:
4368 break;
4369 }
4370 DAC960_Error("Error Condition %s on %s:\n", Controller,
4371 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4372 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4373 Controller, Controller->ControllerNumber,
4374 Command->LogicalDriveNumber, Command->BlockNumber,
4375 Command->BlockNumber + Command->BlockCount - 1);
4376 }
4377
4378
4379 /*
4380 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4381 occurs.
4382 */
4383
4384 static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4385 DAC960_V2_Event_T *Event)
4386 {
4387 DAC960_SCSI_RequestSense_T *RequestSense =
4388 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4389 unsigned char MessageBuffer[DAC960_LineBufferSize];
4390 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4391 { /* Physical Device Events (0x0000 - 0x007F) */
4392 { 0x0001, "P Online" },
4393 { 0x0002, "P Standby" },
4394 { 0x0005, "P Automatic Rebuild Started" },
4395 { 0x0006, "P Manual Rebuild Started" },
4396 { 0x0007, "P Rebuild Completed" },
4397 { 0x0008, "P Rebuild Cancelled" },
4398 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4399 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4400 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4401 { 0x000C, "S Offline" },
4402 { 0x000D, "P Found" },
4403 { 0x000E, "P Removed" },
4404 { 0x000F, "P Unconfigured" },
4405 { 0x0010, "P Expand Capacity Started" },
4406 { 0x0011, "P Expand Capacity Completed" },
4407 { 0x0012, "P Expand Capacity Failed" },
4408 { 0x0013, "P Command Timed Out" },
4409 { 0x0014, "P Command Aborted" },
4410 { 0x0015, "P Command Retried" },
4411 { 0x0016, "P Parity Error" },
4412 { 0x0017, "P Soft Error" },
4413 { 0x0018, "P Miscellaneous Error" },
4414 { 0x0019, "P Reset" },
4415 { 0x001A, "P Active Spare Found" },
4416 { 0x001B, "P Warm Spare Found" },
4417 { 0x001C, "S Sense Data Received" },
4418 { 0x001D, "P Initialization Started" },
4419 { 0x001E, "P Initialization Completed" },
4420 { 0x001F, "P Initialization Failed" },
4421 { 0x0020, "P Initialization Cancelled" },
4422 { 0x0021, "P Failed because Write Recovery Failed" },
4423 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4424 { 0x0023, "P Failed because of Double Check Condition" },
4425 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4426 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4427 { 0x0026, "P Failed because of Bad Tag from Device" },
4428 { 0x0027, "P Failed because of Command Timeout" },
4429 { 0x0028, "P Failed because of System Reset" },
4430 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4431 { 0x002A, "P Failed because Host Set Device to Failed State" },
4432 { 0x002B, "P Failed because of Selection Timeout" },
4433 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4434 { 0x002D, "P Failed because Device Returned Unknown Status" },
4435 { 0x002E, "P Failed because Device Not Ready" },
4436 { 0x002F, "P Failed because Device Not Found at Startup" },
4437 { 0x0030, "P Failed because COD Write Operation Failed" },
4438 { 0x0031, "P Failed because BDT Write Operation Failed" },
4439 { 0x0039, "P Missing at Startup" },
4440 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4441 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4442 { 0x003D, "P Standby Rebuild Started" },
4443 /* Logical Device Events (0x0080 - 0x00FF) */
4444 { 0x0080, "M Consistency Check Started" },
4445 { 0x0081, "M Consistency Check Completed" },
4446 { 0x0082, "M Consistency Check Cancelled" },
4447 { 0x0083, "M Consistency Check Completed With Errors" },
4448 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4449 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4450 { 0x0086, "L Offline" },
4451 { 0x0087, "L Critical" },
4452 { 0x0088, "L Online" },
4453 { 0x0089, "M Automatic Rebuild Started" },
4454 { 0x008A, "M Manual Rebuild Started" },
4455 { 0x008B, "M Rebuild Completed" },
4456 { 0x008C, "M Rebuild Cancelled" },
4457 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4458 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4459 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4460 { 0x0090, "M Initialization Started" },
4461 { 0x0091, "M Initialization Completed" },
4462 { 0x0092, "M Initialization Cancelled" },
4463 { 0x0093, "M Initialization Failed" },
4464 { 0x0094, "L Found" },
4465 { 0x0095, "L Deleted" },
4466 { 0x0096, "M Expand Capacity Started" },
4467 { 0x0097, "M Expand Capacity Completed" },
4468 { 0x0098, "M Expand Capacity Failed" },
4469 { 0x0099, "L Bad Block Found" },
4470 { 0x009A, "L Size Changed" },
4471 { 0x009B, "L Type Changed" },
4472 { 0x009C, "L Bad Data Block Found" },
4473 { 0x009E, "L Read of Data Block in BDT" },
4474 { 0x009F, "L Write Back Data for Disk Block Lost" },
4475 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4476 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4477 { 0x00A2, "L Standby Rebuild Started" },
4478 /* Fault Management Events (0x0100 - 0x017F) */
4479 { 0x0140, "E Fan %d Failed" },
4480 { 0x0141, "E Fan %d OK" },
4481 { 0x0142, "E Fan %d Not Present" },
4482 { 0x0143, "E Power Supply %d Failed" },
4483 { 0x0144, "E Power Supply %d OK" },
4484 { 0x0145, "E Power Supply %d Not Present" },
4485 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4486 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4487 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4488 { 0x0149, "E Temperature Sensor %d Not Present" },
4489 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4490 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4491 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4492 /* Controller Events (0x0180 - 0x01FF) */
4493 { 0x0181, "C Cache Write Back Error" },
4494 { 0x0188, "C Battery Backup Unit Found" },
4495 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4496 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4497 { 0x0193, "C Installation Aborted" },
4498 { 0x0195, "C Battery Backup Unit Physically Removed" },
4499 { 0x0196, "C Memory Error During Warm Boot" },
4500 { 0x019E, "C Memory Soft ECC Error Corrected" },
4501 { 0x019F, "C Memory Hard ECC Error Corrected" },
4502 { 0x01A2, "C Battery Backup Unit Failed" },
4503 { 0x01AB, "C Mirror Race Recovery Failed" },
4504 { 0x01AC, "C Mirror Race on Critical Drive" },
4505 /* Controller Internal Processor Events */
4506 { 0x0380, "C Internal Controller Hung" },
4507 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4508 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4509 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4510 { 0, "" } };
4511 int EventListIndex = 0, EventCode;
4512 unsigned char EventType, *EventMessage;
4513 if (Event->EventCode == 0x1C &&
4514 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4515 (RequestSense->AdditionalSenseCode == 0x80 ||
4516 RequestSense->AdditionalSenseCode == 0x81))
4517 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4518 RequestSense->AdditionalSenseCodeQualifier;
4519 while (true)
4520 {
4521 EventCode = EventList[EventListIndex].EventCode;
4522 if (EventCode == Event->EventCode || EventCode == 0) break;
4523 EventListIndex++;
4524 }
4525 EventType = EventList[EventListIndex].EventMessage[0];
4526 EventMessage = &EventList[EventListIndex].EventMessage[2];
4527 if (EventCode == 0)
4528 {
4529 DAC960_Critical("Unknown Controller Event Code %04X\n",
4530 Controller, Event->EventCode);
4531 return;
4532 }
4533 switch (EventType)
4534 {
4535 case 'P':
4536 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4537 Event->Channel, Event->TargetID, EventMessage);
4538 break;
4539 case 'L':
4540 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4541 Event->LogicalUnit, Controller->ControllerNumber,
4542 Event->LogicalUnit, EventMessage);
4543 break;
4544 case 'M':
4545 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4546 Event->LogicalUnit, Controller->ControllerNumber,
4547 Event->LogicalUnit, EventMessage);
4548 break;
4549 case 'S':
4550 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4551 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4552 RequestSense->AdditionalSenseCode == 0x04 &&
4553 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4554 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4555 break;
4556 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4557 Event->Channel, Event->TargetID, EventMessage);
4558 DAC960_Critical("Physical Device %d:%d Request Sense: "
4559 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4560 Controller,
4561 Event->Channel,
4562 Event->TargetID,
4563 RequestSense->SenseKey,
4564 RequestSense->AdditionalSenseCode,
4565 RequestSense->AdditionalSenseCodeQualifier);
4566 DAC960_Critical("Physical Device %d:%d Request Sense: "
4567 "Information = %02X%02X%02X%02X "
4568 "%02X%02X%02X%02X\n",
4569 Controller,
4570 Event->Channel,
4571 Event->TargetID,
4572 RequestSense->Information[0],
4573 RequestSense->Information[1],
4574 RequestSense->Information[2],
4575 RequestSense->Information[3],
4576 RequestSense->CommandSpecificInformation[0],
4577 RequestSense->CommandSpecificInformation[1],
4578 RequestSense->CommandSpecificInformation[2],
4579 RequestSense->CommandSpecificInformation[3]);
4580 break;
4581 case 'E':
4582 if (Controller->SuppressEnclosureMessages) break;
4583 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4584 DAC960_Critical("Enclosure %d %s\n", Controller,
4585 Event->TargetID, MessageBuffer);
4586 break;
4587 case 'C':
4588 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4589 break;
4590 default:
4591 DAC960_Critical("Unknown Controller Event Code %04X\n",
4592 Controller, Event->EventCode);
4593 break;
4594 }
4595 }
4596
4597
4598 /*
4599 DAC960_V2_ReportProgress prints an appropriate progress message for
4600 Logical Device Long Operations.
4601 */
4602
4603 static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4604 unsigned char *MessageString,
4605 unsigned int LogicalDeviceNumber,
4606 unsigned long BlocksCompleted,
4607 unsigned long LogicalDeviceSize)
4608 {
4609 Controller->EphemeralProgressMessage = true;
4610 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4611 "%d%% completed\n", Controller,
4612 MessageString,
4613 LogicalDeviceNumber,
4614 Controller->ControllerNumber,
4615 LogicalDeviceNumber,
4616 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4617 Controller->EphemeralProgressMessage = false;
4618 }
4619
4620
4621 /*
4622 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4623 for DAC960 V2 Firmware Controllers.
4624 */
4625
4626 static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4627 {
4628 DAC960_Controller_T *Controller = Command->Controller;
4629 DAC960_CommandType_T CommandType = Command->CommandType;
4630 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4631 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4632 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4633
4634 if (CommandType == DAC960_ReadCommand ||
4635 CommandType == DAC960_WriteCommand)
4636 {
4637
4638 #ifdef FORCE_RETRY_DEBUG
4639 CommandStatus = DAC960_V2_AbormalCompletion;
4640 #endif
4641 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4642
4643 if (CommandStatus == DAC960_V2_NormalCompletion) {
4644
4645 if (!DAC960_ProcessCompletedRequest(Command, true))
4646 BUG();
4647
4648 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4649 {
4650 /*
4651 * break the command down into pieces and resubmit each
4652 * piece, hoping that some of them will succeed.
4653 */
4654 DAC960_queue_partial_rw(Command);
4655 return;
4656 }
4657 else
4658 {
4659 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4660 DAC960_V2_ReadWriteError(Command);
4661 /*
4662 Perform completion processing for all buffers in this I/O Request.
4663 */
4664 (void)DAC960_ProcessCompletedRequest(Command, false);
4665 }
4666 }
4667 else if (CommandType == DAC960_ReadRetryCommand ||
4668 CommandType == DAC960_WriteRetryCommand)
4669 {
4670 bool normal_completion;
4671
4672 #ifdef FORCE_RETRY_FAILURE_DEBUG
4673 static int retry_count = 1;
4674 #endif
4675 /*
4676 Perform completion processing for the portion that was
4677 retried, and submit the next portion, if any.
4678 */
4679 normal_completion = true;
4680 if (CommandStatus != DAC960_V2_NormalCompletion) {
4681 normal_completion = false;
4682 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4683 DAC960_V2_ReadWriteError(Command);
4684 }
4685
4686 #ifdef FORCE_RETRY_FAILURE_DEBUG
4687 if (!(++retry_count % 10000)) {
4688 printk("V2 error retry failure test\n");
4689 normal_completion = false;
4690 DAC960_V2_ReadWriteError(Command);
4691 }
4692 #endif
4693
4694 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4695 DAC960_queue_partial_rw(Command);
4696 return;
4697 }
4698 }
4699 else if (CommandType == DAC960_MonitoringCommand)
4700 {
4701 if (Controller->ShutdownMonitoringTimer)
4702 return;
4703 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4704 {
4705 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4706 Controller->V2.NewControllerInformation;
4707 DAC960_V2_ControllerInfo_T *ControllerInfo =
4708 &Controller->V2.ControllerInformation;
4709 Controller->LogicalDriveCount =
4710 NewControllerInfo->LogicalDevicesPresent;
4711 Controller->V2.NeedLogicalDeviceInformation = true;
4712 Controller->V2.NeedPhysicalDeviceInformation = true;
4713 Controller->V2.StartLogicalDeviceInformationScan = true;
4714 Controller->V2.StartPhysicalDeviceInformationScan = true;
4715 Controller->MonitoringAlertMode =
4716 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4717 NewControllerInfo->LogicalDevicesOffline > 0 ||
4718 NewControllerInfo->PhysicalDisksCritical > 0 ||
4719 NewControllerInfo->PhysicalDisksOffline > 0);
4720 memcpy(ControllerInfo, NewControllerInfo,
4721 sizeof(DAC960_V2_ControllerInfo_T));
4722 }
4723 else if (CommandOpcode == DAC960_V2_GetEvent)
4724 {
4725 if (CommandStatus == DAC960_V2_NormalCompletion) {
4726 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4727 }
4728 Controller->V2.NextEventSequenceNumber++;
4729 }
4730 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4731 CommandStatus == DAC960_V2_NormalCompletion)
4732 {
4733 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4734 Controller->V2.NewPhysicalDeviceInformation;
4735 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4736 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4737 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4738 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4739 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4740 unsigned int DeviceIndex;
4741 while (PhysicalDeviceInfo != NULL &&
4742 (NewPhysicalDeviceInfo->Channel >
4743 PhysicalDeviceInfo->Channel ||
4744 (NewPhysicalDeviceInfo->Channel ==
4745 PhysicalDeviceInfo->Channel &&
4746 (NewPhysicalDeviceInfo->TargetID >
4747 PhysicalDeviceInfo->TargetID ||
4748 (NewPhysicalDeviceInfo->TargetID ==
4749 PhysicalDeviceInfo->TargetID &&
4750 NewPhysicalDeviceInfo->LogicalUnit >
4751 PhysicalDeviceInfo->LogicalUnit)))))
4752 {
4753 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4754 Controller,
4755 PhysicalDeviceInfo->Channel,
4756 PhysicalDeviceInfo->TargetID);
4757 Controller->V2.PhysicalDeviceInformation
4758 [PhysicalDeviceIndex] = NULL;
4759 Controller->V2.InquiryUnitSerialNumber
4760 [PhysicalDeviceIndex] = NULL;
4761 kfree(PhysicalDeviceInfo);
4762 kfree(InquiryUnitSerialNumber);
4763 for (DeviceIndex = PhysicalDeviceIndex;
4764 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4765 DeviceIndex++)
4766 {
4767 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4768 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4769 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4770 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4771 }
4772 Controller->V2.PhysicalDeviceInformation
4773 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4774 Controller->V2.InquiryUnitSerialNumber
4775 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4776 PhysicalDeviceInfo =
4777 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4778 InquiryUnitSerialNumber =
4779 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4780 }
4781 if (PhysicalDeviceInfo == NULL ||
4782 (NewPhysicalDeviceInfo->Channel !=
4783 PhysicalDeviceInfo->Channel) ||
4784 (NewPhysicalDeviceInfo->TargetID !=
4785 PhysicalDeviceInfo->TargetID) ||
4786 (NewPhysicalDeviceInfo->LogicalUnit !=
4787 PhysicalDeviceInfo->LogicalUnit))
4788 {
4789 PhysicalDeviceInfo =
4790 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4791 InquiryUnitSerialNumber =
4792 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4793 GFP_ATOMIC);
4794 if (InquiryUnitSerialNumber == NULL ||
4795 PhysicalDeviceInfo == NULL)
4796 {
4797 kfree(InquiryUnitSerialNumber);
4798 InquiryUnitSerialNumber = NULL;
4799 kfree(PhysicalDeviceInfo);
4800 PhysicalDeviceInfo = NULL;
4801 }
4802 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4803 Controller,
4804 NewPhysicalDeviceInfo->Channel,
4805 NewPhysicalDeviceInfo->TargetID,
4806 (PhysicalDeviceInfo != NULL
4807 ? "" : " - Allocation Failed"));
4808 if (PhysicalDeviceInfo != NULL)
4809 {
4810 memset(PhysicalDeviceInfo, 0,
4811 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4812 PhysicalDeviceInfo->PhysicalDeviceState =
4813 DAC960_V2_Device_InvalidState;
4814 memset(InquiryUnitSerialNumber, 0,
4815 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4816 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4817 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4818 DeviceIndex > PhysicalDeviceIndex;
4819 DeviceIndex--)
4820 {
4821 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4822 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4823 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4824 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4825 }
4826 Controller->V2.PhysicalDeviceInformation
4827 [PhysicalDeviceIndex] =
4828 PhysicalDeviceInfo;
4829 Controller->V2.InquiryUnitSerialNumber
4830 [PhysicalDeviceIndex] =
4831 InquiryUnitSerialNumber;
4832 Controller->V2.NeedDeviceSerialNumberInformation = true;
4833 }
4834 }
4835 if (PhysicalDeviceInfo != NULL)
4836 {
4837 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4838 PhysicalDeviceInfo->PhysicalDeviceState)
4839 DAC960_Critical(
4840 "Physical Device %d:%d is now %s\n", Controller,
4841 NewPhysicalDeviceInfo->Channel,
4842 NewPhysicalDeviceInfo->TargetID,
4843 (NewPhysicalDeviceInfo->PhysicalDeviceState
4844 == DAC960_V2_Device_Online
4845 ? "ONLINE"
4846 : NewPhysicalDeviceInfo->PhysicalDeviceState
4847 == DAC960_V2_Device_Rebuild
4848 ? "REBUILD"
4849 : NewPhysicalDeviceInfo->PhysicalDeviceState
4850 == DAC960_V2_Device_Missing
4851 ? "MISSING"
4852 : NewPhysicalDeviceInfo->PhysicalDeviceState
4853 == DAC960_V2_Device_Critical
4854 ? "CRITICAL"
4855 : NewPhysicalDeviceInfo->PhysicalDeviceState
4856 == DAC960_V2_Device_Dead
4857 ? "DEAD"
4858 : NewPhysicalDeviceInfo->PhysicalDeviceState
4859 == DAC960_V2_Device_SuspectedDead
4860 ? "SUSPECTED-DEAD"
4861 : NewPhysicalDeviceInfo->PhysicalDeviceState
4862 == DAC960_V2_Device_CommandedOffline
4863 ? "COMMANDED-OFFLINE"
4864 : NewPhysicalDeviceInfo->PhysicalDeviceState
4865 == DAC960_V2_Device_Standby
4866 ? "STANDBY" : "UNKNOWN"));
4867 if ((NewPhysicalDeviceInfo->ParityErrors !=
4868 PhysicalDeviceInfo->ParityErrors) ||
4869 (NewPhysicalDeviceInfo->SoftErrors !=
4870 PhysicalDeviceInfo->SoftErrors) ||
4871 (NewPhysicalDeviceInfo->HardErrors !=
4872 PhysicalDeviceInfo->HardErrors) ||
4873 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4874 PhysicalDeviceInfo->MiscellaneousErrors) ||
4875 (NewPhysicalDeviceInfo->CommandTimeouts !=
4876 PhysicalDeviceInfo->CommandTimeouts) ||
4877 (NewPhysicalDeviceInfo->Retries !=
4878 PhysicalDeviceInfo->Retries) ||
4879 (NewPhysicalDeviceInfo->Aborts !=
4880 PhysicalDeviceInfo->Aborts) ||
4881 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4882 PhysicalDeviceInfo->PredictedFailuresDetected))
4883 {
4884 DAC960_Critical("Physical Device %d:%d Errors: "
4885 "Parity = %d, Soft = %d, "
4886 "Hard = %d, Misc = %d\n",
4887 Controller,
4888 NewPhysicalDeviceInfo->Channel,
4889 NewPhysicalDeviceInfo->TargetID,
4890 NewPhysicalDeviceInfo->ParityErrors,
4891 NewPhysicalDeviceInfo->SoftErrors,
4892 NewPhysicalDeviceInfo->HardErrors,
4893 NewPhysicalDeviceInfo->MiscellaneousErrors);
4894 DAC960_Critical("Physical Device %d:%d Errors: "
4895 "Timeouts = %d, Retries = %d, "
4896 "Aborts = %d, Predicted = %d\n",
4897 Controller,
4898 NewPhysicalDeviceInfo->Channel,
4899 NewPhysicalDeviceInfo->TargetID,
4900 NewPhysicalDeviceInfo->CommandTimeouts,
4901 NewPhysicalDeviceInfo->Retries,
4902 NewPhysicalDeviceInfo->Aborts,
4903 NewPhysicalDeviceInfo
4904 ->PredictedFailuresDetected);
4905 }
4906 if ((PhysicalDeviceInfo->PhysicalDeviceState
4907 == DAC960_V2_Device_Dead ||
4908 PhysicalDeviceInfo->PhysicalDeviceState
4909 == DAC960_V2_Device_InvalidState) &&
4910 NewPhysicalDeviceInfo->PhysicalDeviceState
4911 != DAC960_V2_Device_Dead)
4912 Controller->V2.NeedDeviceSerialNumberInformation = true;
4913 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4914 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4915 }
4916 NewPhysicalDeviceInfo->LogicalUnit++;
4917 Controller->V2.PhysicalDeviceIndex++;
4918 }
4919 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4920 {
4921 unsigned int DeviceIndex;
4922 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4923 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4924 DeviceIndex++)
4925 {
4926 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4927 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4928 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4929 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4930 if (PhysicalDeviceInfo == NULL) break;
4931 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4932 Controller,
4933 PhysicalDeviceInfo->Channel,
4934 PhysicalDeviceInfo->TargetID);
4935 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4936 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4937 kfree(PhysicalDeviceInfo);
4938 kfree(InquiryUnitSerialNumber);
4939 }
4940 Controller->V2.NeedPhysicalDeviceInformation = false;
4941 }
4942 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4943 CommandStatus == DAC960_V2_NormalCompletion)
4944 {
4945 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4946 Controller->V2.NewLogicalDeviceInformation;
4947 unsigned short LogicalDeviceNumber =
4948 NewLogicalDeviceInfo->LogicalDeviceNumber;
4949 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4950 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4951 if (LogicalDeviceInfo == NULL)
4952 {
4953 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4954 PhysicalDevice.Controller = 0;
4955 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4956 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4957 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4958 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4959 PhysicalDevice;
4960 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4961 GFP_ATOMIC);
4962 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4963 LogicalDeviceInfo;
4964 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4965 "Now Exists%s\n", Controller,
4966 LogicalDeviceNumber,
4967 Controller->ControllerNumber,
4968 LogicalDeviceNumber,
4969 (LogicalDeviceInfo != NULL
4970 ? "" : " - Allocation Failed"));
4971 if (LogicalDeviceInfo != NULL)
4972 {
4973 memset(LogicalDeviceInfo, 0,
4974 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4975 DAC960_ComputeGenericDiskInfo(Controller);
4976 }
4977 }
4978 if (LogicalDeviceInfo != NULL)
4979 {
4980 unsigned long LogicalDeviceSize =
4981 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4982 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4983 LogicalDeviceInfo->LogicalDeviceState)
4984 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4985 "is now %s\n", Controller,
4986 LogicalDeviceNumber,
4987 Controller->ControllerNumber,
4988 LogicalDeviceNumber,
4989 (NewLogicalDeviceInfo->LogicalDeviceState
4990 == DAC960_V2_LogicalDevice_Online
4991 ? "ONLINE"
4992 : NewLogicalDeviceInfo->LogicalDeviceState
4993 == DAC960_V2_LogicalDevice_Critical
4994 ? "CRITICAL" : "OFFLINE"));
4995 if ((NewLogicalDeviceInfo->SoftErrors !=
4996 LogicalDeviceInfo->SoftErrors) ||
4997 (NewLogicalDeviceInfo->CommandsFailed !=
4998 LogicalDeviceInfo->CommandsFailed) ||
4999 (NewLogicalDeviceInfo->DeferredWriteErrors !=
5000 LogicalDeviceInfo->DeferredWriteErrors))
5001 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5002 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5003 Controller, LogicalDeviceNumber,
5004 Controller->ControllerNumber,
5005 LogicalDeviceNumber,
5006 NewLogicalDeviceInfo->SoftErrors,
5007 NewLogicalDeviceInfo->CommandsFailed,
5008 NewLogicalDeviceInfo->DeferredWriteErrors);
5009 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5010 DAC960_V2_ReportProgress(Controller,
5011 "Consistency Check",
5012 LogicalDeviceNumber,
5013 NewLogicalDeviceInfo
5014 ->ConsistencyCheckBlockNumber,
5015 LogicalDeviceSize);
5016 else if (NewLogicalDeviceInfo->RebuildInProgress)
5017 DAC960_V2_ReportProgress(Controller,
5018 "Rebuild",
5019 LogicalDeviceNumber,
5020 NewLogicalDeviceInfo
5021 ->RebuildBlockNumber,
5022 LogicalDeviceSize);
5023 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5024 DAC960_V2_ReportProgress(Controller,
5025 "Background Initialization",
5026 LogicalDeviceNumber,
5027 NewLogicalDeviceInfo
5028 ->BackgroundInitializationBlockNumber,
5029 LogicalDeviceSize);
5030 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5031 DAC960_V2_ReportProgress(Controller,
5032 "Foreground Initialization",
5033 LogicalDeviceNumber,
5034 NewLogicalDeviceInfo
5035 ->ForegroundInitializationBlockNumber,
5036 LogicalDeviceSize);
5037 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5038 DAC960_V2_ReportProgress(Controller,
5039 "Data Migration",
5040 LogicalDeviceNumber,
5041 NewLogicalDeviceInfo
5042 ->DataMigrationBlockNumber,
5043 LogicalDeviceSize);
5044 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5045 DAC960_V2_ReportProgress(Controller,
5046 "Patrol Operation",
5047 LogicalDeviceNumber,
5048 NewLogicalDeviceInfo
5049 ->PatrolOperationBlockNumber,
5050 LogicalDeviceSize);
5051 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5052 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5053 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5054 "Background Initialization %s\n",
5055 Controller,
5056 LogicalDeviceNumber,
5057 Controller->ControllerNumber,
5058 LogicalDeviceNumber,
5059 (NewLogicalDeviceInfo->LogicalDeviceControl
5060 .LogicalDeviceInitialized
5061 ? "Completed" : "Failed"));
5062 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5063 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5064 }
5065 Controller->V2.LogicalDriveFoundDuringScan
5066 [LogicalDeviceNumber] = true;
5067 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5068 }
5069 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5070 {
5071 int LogicalDriveNumber;
5072 for (LogicalDriveNumber = 0;
5073 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5074 LogicalDriveNumber++)
5075 {
5076 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5077 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5078 if (LogicalDeviceInfo == NULL ||
5079 Controller->V2.LogicalDriveFoundDuringScan
5080 [LogicalDriveNumber])
5081 continue;
5082 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5083 "No Longer Exists\n", Controller,
5084 LogicalDriveNumber,
5085 Controller->ControllerNumber,
5086 LogicalDriveNumber);
5087 Controller->V2.LogicalDeviceInformation
5088 [LogicalDriveNumber] = NULL;
5089 kfree(LogicalDeviceInfo);
5090 Controller->LogicalDriveInitiallyAccessible
5091 [LogicalDriveNumber] = false;
5092 DAC960_ComputeGenericDiskInfo(Controller);
5093 }
5094 Controller->V2.NeedLogicalDeviceInformation = false;
5095 }
5096 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5097 {
5098 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5099 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5100
5101 if (CommandStatus != DAC960_V2_NormalCompletion) {
5102 memset(InquiryUnitSerialNumber,
5103 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5104 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5105 } else
5106 memcpy(InquiryUnitSerialNumber,
5107 Controller->V2.NewInquiryUnitSerialNumber,
5108 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5109
5110 Controller->V2.NeedDeviceSerialNumberInformation = false;
5111 }
5112
5113 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5114 - Controller->V2.NextEventSequenceNumber > 0)
5115 {
5116 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5117 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5118 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5119 Controller->V2.NextEventSequenceNumber >> 16;
5120 CommandMailbox->GetEvent.ControllerNumber = 0;
5121 CommandMailbox->GetEvent.IOCTL_Opcode =
5122 DAC960_V2_GetEvent;
5123 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5124 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5125 CommandMailbox->GetEvent.DataTransferMemoryAddress
5126 .ScatterGatherSegments[0]
5127 .SegmentDataPointer =
5128 Controller->V2.EventDMA;
5129 CommandMailbox->GetEvent.DataTransferMemoryAddress
5130 .ScatterGatherSegments[0]
5131 .SegmentByteCount =
5132 CommandMailbox->GetEvent.DataTransferSize;
5133 DAC960_QueueCommand(Command);
5134 return;
5135 }
5136 if (Controller->V2.NeedPhysicalDeviceInformation)
5137 {
5138 if (Controller->V2.NeedDeviceSerialNumberInformation)
5139 {
5140 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5141 Controller->V2.NewInquiryUnitSerialNumber;
5142 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5143
5144 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5145 Controller->V2.NewPhysicalDeviceInformation->Channel,
5146 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5147 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5148
5149
5150 DAC960_QueueCommand(Command);
5151 return;
5152 }
5153 if (Controller->V2.StartPhysicalDeviceInformationScan)
5154 {
5155 Controller->V2.PhysicalDeviceIndex = 0;
5156 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5157 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5158 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5159 Controller->V2.StartPhysicalDeviceInformationScan = false;
5160 }
5161 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5162 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5163 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5164 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5165 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5166 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5167 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5168 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5169 Controller->V2.NewPhysicalDeviceInformation->Channel;
5170 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5171 DAC960_V2_GetPhysicalDeviceInfoValid;
5172 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5173 .ScatterGatherSegments[0]
5174 .SegmentDataPointer =
5175 Controller->V2.NewPhysicalDeviceInformationDMA;
5176 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5177 .ScatterGatherSegments[0]
5178 .SegmentByteCount =
5179 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5180 DAC960_QueueCommand(Command);
5181 return;
5182 }
5183 if (Controller->V2.NeedLogicalDeviceInformation)
5184 {
5185 if (Controller->V2.StartLogicalDeviceInformationScan)
5186 {
5187 int LogicalDriveNumber;
5188 for (LogicalDriveNumber = 0;
5189 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5190 LogicalDriveNumber++)
5191 Controller->V2.LogicalDriveFoundDuringScan
5192 [LogicalDriveNumber] = false;
5193 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5194 Controller->V2.StartLogicalDeviceInformationScan = false;
5195 }
5196 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5197 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5198 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5199 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5200 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5201 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5202 DAC960_V2_GetLogicalDeviceInfoValid;
5203 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5204 .ScatterGatherSegments[0]
5205 .SegmentDataPointer =
5206 Controller->V2.NewLogicalDeviceInformationDMA;
5207 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5208 .ScatterGatherSegments[0]
5209 .SegmentByteCount =
5210 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5211 DAC960_QueueCommand(Command);
5212 return;
5213 }
5214 Controller->MonitoringTimerCount++;
5215 Controller->MonitoringTimer.expires =
5216 jiffies + DAC960_HealthStatusMonitoringInterval;
5217 add_timer(&Controller->MonitoringTimer);
5218 }
5219 if (CommandType == DAC960_ImmediateCommand)
5220 {
5221 complete(Command->Completion);
5222 Command->Completion = NULL;
5223 return;
5224 }
5225 if (CommandType == DAC960_QueuedCommand)
5226 {
5227 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5228 KernelCommand->CommandStatus = CommandStatus;
5229 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5230 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5231 Command->V2.KernelCommand = NULL;
5232 DAC960_DeallocateCommand(Command);
5233 KernelCommand->CompletionFunction(KernelCommand);
5234 return;
5235 }
5236 /*
5237 Queue a Status Monitoring Command to the Controller using the just
5238 completed Command if one was deferred previously due to lack of a
5239 free Command when the Monitoring Timer Function was called.
5240 */
5241 if (Controller->MonitoringCommandDeferred)
5242 {
5243 Controller->MonitoringCommandDeferred = false;
5244 DAC960_V2_QueueMonitoringCommand(Command);
5245 return;
5246 }
5247 /*
5248 Deallocate the Command.
5249 */
5250 DAC960_DeallocateCommand(Command);
5251 /*
5252 Wake up any processes waiting on a free Command.
5253 */
5254 wake_up(&Controller->CommandWaitQueue);
5255 }
5256
5257 /*
5258 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5259 Controllers.
5260 */
5261
5262 static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5263 void *DeviceIdentifier)
5264 {
5265 DAC960_Controller_T *Controller = DeviceIdentifier;
5266 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5267 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5268 unsigned long flags;
5269
5270 spin_lock_irqsave(&Controller->queue_lock, flags);
5271 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5272 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5273 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5274 {
5275 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5276 NextStatusMailbox->Fields.CommandIdentifier;
5277 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5278 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5279 Command->V2.RequestSenseLength =
5280 NextStatusMailbox->Fields.RequestSenseLength;
5281 Command->V2.DataTransferResidue =
5282 NextStatusMailbox->Fields.DataTransferResidue;
5283 NextStatusMailbox->Words[0] = 0;
5284 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5285 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5286 DAC960_V2_ProcessCompletedCommand(Command);
5287 }
5288 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5289 /*
5290 Attempt to remove additional I/O Requests from the Controller's
5291 I/O Request Queue and queue them to the Controller.
5292 */
5293 DAC960_ProcessRequest(Controller);
5294 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5295 return IRQ_HANDLED;
5296 }
5297
5298 /*
5299 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5300 Controllers.
5301 */
5302
5303 static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5304 void *DeviceIdentifier)
5305 {
5306 DAC960_Controller_T *Controller = DeviceIdentifier;
5307 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5308 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5309 unsigned long flags;
5310
5311 spin_lock_irqsave(&Controller->queue_lock, flags);
5312 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5313 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5314 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5315 {
5316 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5317 NextStatusMailbox->Fields.CommandIdentifier;
5318 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5319 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5320 Command->V2.RequestSenseLength =
5321 NextStatusMailbox->Fields.RequestSenseLength;
5322 Command->V2.DataTransferResidue =
5323 NextStatusMailbox->Fields.DataTransferResidue;
5324 NextStatusMailbox->Words[0] = 0;
5325 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5326 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5327 DAC960_V2_ProcessCompletedCommand(Command);
5328 }
5329 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5330 /*
5331 Attempt to remove additional I/O Requests from the Controller's
5332 I/O Request Queue and queue them to the Controller.
5333 */
5334 DAC960_ProcessRequest(Controller);
5335 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5336 return IRQ_HANDLED;
5337 }
5338
5339
5340 /*
5341 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5342 Controllers.
5343 */
5344
5345 static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5346 void *DeviceIdentifier)
5347 {
5348 DAC960_Controller_T *Controller = DeviceIdentifier;
5349 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5350 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5351 unsigned long flags;
5352
5353 spin_lock_irqsave(&Controller->queue_lock, flags);
5354 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5355 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5356 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5357 {
5358 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5359 NextStatusMailbox->Fields.CommandIdentifier;
5360 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5361 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5362 Command->V2.RequestSenseLength =
5363 NextStatusMailbox->Fields.RequestSenseLength;
5364 Command->V2.DataTransferResidue =
5365 NextStatusMailbox->Fields.DataTransferResidue;
5366 NextStatusMailbox->Words[0] = 0;
5367 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5368 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5369 DAC960_V2_ProcessCompletedCommand(Command);
5370 }
5371 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5372 /*
5373 Attempt to remove additional I/O Requests from the Controller's
5374 I/O Request Queue and queue them to the Controller.
5375 */
5376 DAC960_ProcessRequest(Controller);
5377 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5378 return IRQ_HANDLED;
5379 }
5380
5381
5382 /*
5383 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5384 Controllers.
5385 */
5386
5387 static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5388 void *DeviceIdentifier)
5389 {
5390 DAC960_Controller_T *Controller = DeviceIdentifier;
5391 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5392 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5393 unsigned long flags;
5394
5395 spin_lock_irqsave(&Controller->queue_lock, flags);
5396 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5397 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5398 while (NextStatusMailbox->Fields.Valid)
5399 {
5400 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5401 NextStatusMailbox->Fields.CommandIdentifier;
5402 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5403 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5404 NextStatusMailbox->Word = 0;
5405 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5406 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5407 DAC960_V1_ProcessCompletedCommand(Command);
5408 }
5409 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5410 /*
5411 Attempt to remove additional I/O Requests from the Controller's
5412 I/O Request Queue and queue them to the Controller.
5413 */
5414 DAC960_ProcessRequest(Controller);
5415 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5416 return IRQ_HANDLED;
5417 }
5418
5419
5420 /*
5421 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5422 Controllers.
5423 */
5424
5425 static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5426 void *DeviceIdentifier)
5427 {
5428 DAC960_Controller_T *Controller = DeviceIdentifier;
5429 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5430 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5431 unsigned long flags;
5432
5433 spin_lock_irqsave(&Controller->queue_lock, flags);
5434 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5435 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5436 while (NextStatusMailbox->Fields.Valid)
5437 {
5438 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5439 NextStatusMailbox->Fields.CommandIdentifier;
5440 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5441 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5442 NextStatusMailbox->Word = 0;
5443 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5444 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5445 DAC960_V1_ProcessCompletedCommand(Command);
5446 }
5447 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5448 /*
5449 Attempt to remove additional I/O Requests from the Controller's
5450 I/O Request Queue and queue them to the Controller.
5451 */
5452 DAC960_ProcessRequest(Controller);
5453 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5454 return IRQ_HANDLED;
5455 }
5456
5457
5458 /*
5459 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5460 Controllers.
5461 */
5462
5463 static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5464 void *DeviceIdentifier)
5465 {
5466 DAC960_Controller_T *Controller = DeviceIdentifier;
5467 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5468 unsigned long flags;
5469
5470 spin_lock_irqsave(&Controller->queue_lock, flags);
5471 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5472 {
5473 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5474 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5475 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5476 Command->V1.CommandStatus =
5477 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5478 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5479 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5480 DAC960_V1_ProcessCompletedCommand(Command);
5481 }
5482 /*
5483 Attempt to remove additional I/O Requests from the Controller's
5484 I/O Request Queue and queue them to the Controller.
5485 */
5486 DAC960_ProcessRequest(Controller);
5487 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5488 return IRQ_HANDLED;
5489 }
5490
5491
5492 /*
5493 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5494 Controllers.
5495
5496 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5497 on the data having been placed into DAC960_Controller_T, rather than
5498 an arbitrary buffer.
5499 */
5500
5501 static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5502 void *DeviceIdentifier)
5503 {
5504 DAC960_Controller_T *Controller = DeviceIdentifier;
5505 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5506 unsigned long flags;
5507
5508 spin_lock_irqsave(&Controller->queue_lock, flags);
5509 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5510 {
5511 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5512 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5513 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5514 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5515 DAC960_V1_CommandOpcode_T CommandOpcode =
5516 CommandMailbox->Common.CommandOpcode;
5517 Command->V1.CommandStatus =
5518 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5519 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5520 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5521 switch (CommandOpcode)
5522 {
5523 case DAC960_V1_Enquiry_Old:
5524 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5525 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5526 break;
5527 case DAC960_V1_GetDeviceState_Old:
5528 Command->V1.CommandMailbox.Common.CommandOpcode =
5529 DAC960_V1_GetDeviceState;
5530 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5531 break;
5532 case DAC960_V1_Read_Old:
5533 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5534 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5535 break;
5536 case DAC960_V1_Write_Old:
5537 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5538 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5539 break;
5540 case DAC960_V1_ReadWithScatterGather_Old:
5541 Command->V1.CommandMailbox.Common.CommandOpcode =
5542 DAC960_V1_ReadWithScatterGather;
5543 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5544 break;
5545 case DAC960_V1_WriteWithScatterGather_Old:
5546 Command->V1.CommandMailbox.Common.CommandOpcode =
5547 DAC960_V1_WriteWithScatterGather;
5548 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5549 break;
5550 default:
5551 break;
5552 }
5553 DAC960_V1_ProcessCompletedCommand(Command);
5554 }
5555 /*
5556 Attempt to remove additional I/O Requests from the Controller's
5557 I/O Request Queue and queue them to the Controller.
5558 */
5559 DAC960_ProcessRequest(Controller);
5560 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5561 return IRQ_HANDLED;
5562 }
5563
5564
5565 /*
5566 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5567 Firmware Controllers.
5568 */
5569
5570 static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5571 {
5572 DAC960_Controller_T *Controller = Command->Controller;
5573 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5574 DAC960_V1_ClearCommand(Command);
5575 Command->CommandType = DAC960_MonitoringCommand;
5576 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5577 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5578 DAC960_QueueCommand(Command);
5579 }
5580
5581
5582 /*
5583 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5584 Firmware Controllers.
5585 */
5586
5587 static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5588 {
5589 DAC960_Controller_T *Controller = Command->Controller;
5590 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5591 DAC960_V2_ClearCommand(Command);
5592 Command->CommandType = DAC960_MonitoringCommand;
5593 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5594 CommandMailbox->ControllerInfo.CommandControlBits
5595 .DataTransferControllerToHost = true;
5596 CommandMailbox->ControllerInfo.CommandControlBits
5597 .NoAutoRequestSense = true;
5598 CommandMailbox->ControllerInfo.DataTransferSize =
5599 sizeof(DAC960_V2_ControllerInfo_T);
5600 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5601 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5602 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5603 .ScatterGatherSegments[0]
5604 .SegmentDataPointer =
5605 Controller->V2.NewControllerInformationDMA;
5606 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5607 .ScatterGatherSegments[0]
5608 .SegmentByteCount =
5609 CommandMailbox->ControllerInfo.DataTransferSize;
5610 DAC960_QueueCommand(Command);
5611 }
5612
5613
5614 /*
5615 DAC960_MonitoringTimerFunction is the timer function for monitoring
5616 the status of DAC960 Controllers.
5617 */
5618
5619 static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5620 {
5621 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5622 DAC960_Command_T *Command;
5623 unsigned long flags;
5624
5625 if (Controller->FirmwareType == DAC960_V1_Controller)
5626 {
5627 spin_lock_irqsave(&Controller->queue_lock, flags);
5628 /*
5629 Queue a Status Monitoring Command to Controller.
5630 */
5631 Command = DAC960_AllocateCommand(Controller);
5632 if (Command != NULL)
5633 DAC960_V1_QueueMonitoringCommand(Command);
5634 else Controller->MonitoringCommandDeferred = true;
5635 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5636 }
5637 else
5638 {
5639 DAC960_V2_ControllerInfo_T *ControllerInfo =
5640 &Controller->V2.ControllerInformation;
5641 unsigned int StatusChangeCounter =
5642 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5643 bool ForceMonitoringCommand = false;
5644 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5645 + DAC960_SecondaryMonitoringInterval))
5646 {
5647 int LogicalDriveNumber;
5648 for (LogicalDriveNumber = 0;
5649 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5650 LogicalDriveNumber++)
5651 {
5652 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5653 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5654 if (LogicalDeviceInfo == NULL) continue;
5655 if (!LogicalDeviceInfo->LogicalDeviceControl
5656 .LogicalDeviceInitialized)
5657 {
5658 ForceMonitoringCommand = true;
5659 break;
5660 }
5661 }
5662 Controller->SecondaryMonitoringTime = jiffies;
5663 }
5664 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5665 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5666 == Controller->V2.NextEventSequenceNumber &&
5667 (ControllerInfo->BackgroundInitializationsActive +
5668 ControllerInfo->LogicalDeviceInitializationsActive +
5669 ControllerInfo->PhysicalDeviceInitializationsActive +
5670 ControllerInfo->ConsistencyChecksActive +
5671 ControllerInfo->RebuildsActive +
5672 ControllerInfo->OnlineExpansionsActive == 0 ||
5673 time_before(jiffies, Controller->PrimaryMonitoringTime
5674 + DAC960_MonitoringTimerInterval)) &&
5675 !ForceMonitoringCommand)
5676 {
5677 Controller->MonitoringTimer.expires =
5678 jiffies + DAC960_HealthStatusMonitoringInterval;
5679 add_timer(&Controller->MonitoringTimer);
5680 return;
5681 }
5682 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5683 Controller->PrimaryMonitoringTime = jiffies;
5684
5685 spin_lock_irqsave(&Controller->queue_lock, flags);
5686 /*
5687 Queue a Status Monitoring Command to Controller.
5688 */
5689 Command = DAC960_AllocateCommand(Controller);
5690 if (Command != NULL)
5691 DAC960_V2_QueueMonitoringCommand(Command);
5692 else Controller->MonitoringCommandDeferred = true;
5693 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5694 /*
5695 Wake up any processes waiting on a Health Status Buffer change.
5696 */
5697 wake_up(&Controller->HealthStatusWaitQueue);
5698 }
5699 }
5700
5701 /*
5702 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5703 additional bytes in the Combined Status Buffer and grows the buffer if
5704 necessary. It returns true if there is enough room and false otherwise.
5705 */
5706
5707 static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5708 unsigned int ByteCount)
5709 {
5710 unsigned char *NewStatusBuffer;
5711 if (Controller->InitialStatusLength + 1 +
5712 Controller->CurrentStatusLength + ByteCount + 1 <=
5713 Controller->CombinedStatusBufferLength)
5714 return true;
5715 if (Controller->CombinedStatusBufferLength == 0)
5716 {
5717 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5718 while (NewStatusBufferLength < ByteCount)
5719 NewStatusBufferLength *= 2;
5720 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5721 GFP_ATOMIC);
5722 if (Controller->CombinedStatusBuffer == NULL) return false;
5723 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5724 return true;
5725 }
5726 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5727 GFP_ATOMIC);
5728 if (NewStatusBuffer == NULL)
5729 {
5730 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5731 Controller);
5732 return false;
5733 }
5734 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5735 Controller->CombinedStatusBufferLength);
5736 kfree(Controller->CombinedStatusBuffer);
5737 Controller->CombinedStatusBuffer = NewStatusBuffer;
5738 Controller->CombinedStatusBufferLength *= 2;
5739 Controller->CurrentStatusBuffer =
5740 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5741 return true;
5742 }
5743
5744
5745 /*
5746 DAC960_Message prints Driver Messages.
5747 */
5748
5749 static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5750 unsigned char *Format,
5751 DAC960_Controller_T *Controller,
5752 ...)
5753 {
5754 static unsigned char Buffer[DAC960_LineBufferSize];
5755 static bool BeginningOfLine = true;
5756 va_list Arguments;
5757 int Length = 0;
5758 va_start(Arguments, Controller);
5759 Length = vsprintf(Buffer, Format, Arguments);
5760 va_end(Arguments);
5761 if (Controller == NULL)
5762 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5763 DAC960_ControllerCount, Buffer);
5764 else if (MessageLevel == DAC960_AnnounceLevel ||
5765 MessageLevel == DAC960_InfoLevel)
5766 {
5767 if (!Controller->ControllerInitialized)
5768 {
5769 if (DAC960_CheckStatusBuffer(Controller, Length))
5770 {
5771 strcpy(&Controller->CombinedStatusBuffer
5772 [Controller->InitialStatusLength],
5773 Buffer);
5774 Controller->InitialStatusLength += Length;
5775 Controller->CurrentStatusBuffer =
5776 &Controller->CombinedStatusBuffer
5777 [Controller->InitialStatusLength + 1];
5778 }
5779 if (MessageLevel == DAC960_AnnounceLevel)
5780 {
5781 static int AnnouncementLines = 0;
5782 if (++AnnouncementLines <= 2)
5783 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5784 Buffer);
5785 }
5786 else
5787 {
5788 if (BeginningOfLine)
5789 {
5790 if (Buffer[0] != '\n' || Length > 1)
5791 printk("%sDAC960#%d: %s",
5792 DAC960_MessageLevelMap[MessageLevel],
5793 Controller->ControllerNumber, Buffer);
5794 }
5795 else printk("%s", Buffer);
5796 }
5797 }
5798 else if (DAC960_CheckStatusBuffer(Controller, Length))
5799 {
5800 strcpy(&Controller->CurrentStatusBuffer[
5801 Controller->CurrentStatusLength], Buffer);
5802 Controller->CurrentStatusLength += Length;
5803 }
5804 }
5805 else if (MessageLevel == DAC960_ProgressLevel)
5806 {
5807 strcpy(Controller->ProgressBuffer, Buffer);
5808 Controller->ProgressBufferLength = Length;
5809 if (Controller->EphemeralProgressMessage)
5810 {
5811 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5812 + DAC960_ProgressReportingInterval))
5813 {
5814 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5815 Controller->ControllerNumber, Buffer);
5816 Controller->LastProgressReportTime = jiffies;
5817 }
5818 }
5819 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5820 Controller->ControllerNumber, Buffer);
5821 }
5822 else if (MessageLevel == DAC960_UserCriticalLevel)
5823 {
5824 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5825 Buffer);
5826 Controller->UserStatusLength += Length;
5827 if (Buffer[0] != '\n' || Length > 1)
5828 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5829 Controller->ControllerNumber, Buffer);
5830 }
5831 else
5832 {
5833 if (BeginningOfLine)
5834 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5835 Controller->ControllerNumber, Buffer);
5836 else printk("%s", Buffer);
5837 }
5838 BeginningOfLine = (Buffer[Length-1] == '\n');
5839 }
5840
5841
5842 /*
5843 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5844 Channel:TargetID specification from a User Command string. It updates
5845 Channel and TargetID and returns true on success and false on failure.
5846 */
5847
5848 static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5849 char *UserCommandString,
5850 unsigned char *Channel,
5851 unsigned char *TargetID)
5852 {
5853 char *NewUserCommandString = UserCommandString;
5854 unsigned long XChannel, XTargetID;
5855 while (*UserCommandString == ' ') UserCommandString++;
5856 if (UserCommandString == NewUserCommandString)
5857 return false;
5858 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5859 if (NewUserCommandString == UserCommandString ||
5860 *NewUserCommandString != ':' ||
5861 XChannel >= Controller->Channels)
5862 return false;
5863 UserCommandString = ++NewUserCommandString;
5864 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5865 if (NewUserCommandString == UserCommandString ||
5866 *NewUserCommandString != '\0' ||
5867 XTargetID >= Controller->Targets)
5868 return false;
5869 *Channel = XChannel;
5870 *TargetID = XTargetID;
5871 return true;
5872 }
5873
5874
5875 /*
5876 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5877 specification from a User Command string. It updates LogicalDriveNumber and
5878 returns true on success and false on failure.
5879 */
5880
5881 static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5882 char *UserCommandString,
5883 unsigned char *LogicalDriveNumber)
5884 {
5885 char *NewUserCommandString = UserCommandString;
5886 unsigned long XLogicalDriveNumber;
5887 while (*UserCommandString == ' ') UserCommandString++;
5888 if (UserCommandString == NewUserCommandString)
5889 return false;
5890 XLogicalDriveNumber =
5891 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5892 if (NewUserCommandString == UserCommandString ||
5893 *NewUserCommandString != '\0' ||
5894 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5895 return false;
5896 *LogicalDriveNumber = XLogicalDriveNumber;
5897 return true;
5898 }
5899
5900
5901 /*
5902 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5903 DAC960 V1 Firmware Controllers.
5904 */
5905
5906 static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5907 DAC960_Command_T *Command,
5908 unsigned char Channel,
5909 unsigned char TargetID,
5910 DAC960_V1_PhysicalDeviceState_T
5911 DeviceState,
5912 const unsigned char *DeviceStateString)
5913 {
5914 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5915 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5916 CommandMailbox->Type3D.Channel = Channel;
5917 CommandMailbox->Type3D.TargetID = TargetID;
5918 CommandMailbox->Type3D.DeviceState = DeviceState;
5919 CommandMailbox->Type3D.Modifier = 0;
5920 DAC960_ExecuteCommand(Command);
5921 switch (Command->V1.CommandStatus)
5922 {
5923 case DAC960_V1_NormalCompletion:
5924 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5925 DeviceStateString, Channel, TargetID);
5926 break;
5927 case DAC960_V1_UnableToStartDevice:
5928 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5929 "Unable to Start Device\n", Controller,
5930 DeviceStateString, Channel, TargetID);
5931 break;
5932 case DAC960_V1_NoDeviceAtAddress:
5933 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5934 "No Device at Address\n", Controller,
5935 DeviceStateString, Channel, TargetID);
5936 break;
5937 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5938 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5939 "Invalid Channel or Target or Modifier\n",
5940 Controller, DeviceStateString, Channel, TargetID);
5941 break;
5942 case DAC960_V1_ChannelBusy:
5943 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5944 "Channel Busy\n", Controller,
5945 DeviceStateString, Channel, TargetID);
5946 break;
5947 default:
5948 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5949 "Unexpected Status %04X\n", Controller,
5950 DeviceStateString, Channel, TargetID,
5951 Command->V1.CommandStatus);
5952 break;
5953 }
5954 }
5955
5956
5957 /*
5958 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5959 Controllers.
5960 */
5961
5962 static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5963 unsigned char *UserCommand)
5964 {
5965 DAC960_Command_T *Command;
5966 DAC960_V1_CommandMailbox_T *CommandMailbox;
5967 unsigned long flags;
5968 unsigned char Channel, TargetID, LogicalDriveNumber;
5969
5970 spin_lock_irqsave(&Controller->queue_lock, flags);
5971 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5972 DAC960_WaitForCommand(Controller);
5973 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5974 Controller->UserStatusLength = 0;
5975 DAC960_V1_ClearCommand(Command);
5976 Command->CommandType = DAC960_ImmediateCommand;
5977 CommandMailbox = &Command->V1.CommandMailbox;
5978 if (strcmp(UserCommand, "flush-cache") == 0)
5979 {
5980 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5981 DAC960_ExecuteCommand(Command);
5982 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5983 }
5984 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5985 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5986 &Channel, &TargetID))
5987 {
5988 DAC960_V1_DeviceState_T *DeviceState =
5989 &Controller->V1.DeviceState[Channel][TargetID];
5990 if (DeviceState->Present &&
5991 DeviceState->DeviceType == DAC960_V1_DiskType &&
5992 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5993 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5994 DAC960_V1_Device_Dead, "Kill");
5995 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5996 Controller, Channel, TargetID);
5997 }
5998 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5999 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6000 &Channel, &TargetID))
6001 {
6002 DAC960_V1_DeviceState_T *DeviceState =
6003 &Controller->V1.DeviceState[Channel][TargetID];
6004 if (DeviceState->Present &&
6005 DeviceState->DeviceType == DAC960_V1_DiskType &&
6006 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6007 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6008 DAC960_V1_Device_Online, "Make Online");
6009 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6010 Controller, Channel, TargetID);
6011
6012 }
6013 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6014 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6015 &Channel, &TargetID))
6016 {
6017 DAC960_V1_DeviceState_T *DeviceState =
6018 &Controller->V1.DeviceState[Channel][TargetID];
6019 if (DeviceState->Present &&
6020 DeviceState->DeviceType == DAC960_V1_DiskType &&
6021 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6022 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6023 DAC960_V1_Device_Standby, "Make Standby");
6024 else DAC960_UserCritical("Make Standby of Physical "
6025 "Device %d:%d Illegal\n",
6026 Controller, Channel, TargetID);
6027 }
6028 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6029 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6030 &Channel, &TargetID))
6031 {
6032 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6033 CommandMailbox->Type3D.Channel = Channel;
6034 CommandMailbox->Type3D.TargetID = TargetID;
6035 DAC960_ExecuteCommand(Command);
6036 switch (Command->V1.CommandStatus)
6037 {
6038 case DAC960_V1_NormalCompletion:
6039 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6040 Controller, Channel, TargetID);
6041 break;
6042 case DAC960_V1_AttemptToRebuildOnlineDrive:
6043 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6044 "Attempt to Rebuild Online or "
6045 "Unresponsive Drive\n",
6046 Controller, Channel, TargetID);
6047 break;
6048 case DAC960_V1_NewDiskFailedDuringRebuild:
6049 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6050 "New Disk Failed During Rebuild\n",
6051 Controller, Channel, TargetID);
6052 break;
6053 case DAC960_V1_InvalidDeviceAddress:
6054 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6055 "Invalid Device Address\n",
6056 Controller, Channel, TargetID);
6057 break;
6058 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6059 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6060 "Rebuild or Consistency Check Already "
6061 "in Progress\n", Controller, Channel, TargetID);
6062 break;
6063 default:
6064 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6065 "Unexpected Status %04X\n", Controller,
6066 Channel, TargetID, Command->V1.CommandStatus);
6067 break;
6068 }
6069 }
6070 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6071 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6072 &LogicalDriveNumber))
6073 {
6074 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6075 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6076 CommandMailbox->Type3C.AutoRestore = true;
6077 DAC960_ExecuteCommand(Command);
6078 switch (Command->V1.CommandStatus)
6079 {
6080 case DAC960_V1_NormalCompletion:
6081 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6082 "(/dev/rd/c%dd%d) Initiated\n",
6083 Controller, LogicalDriveNumber,
6084 Controller->ControllerNumber,
6085 LogicalDriveNumber);
6086 break;
6087 case DAC960_V1_DependentDiskIsDead:
6088 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6089 "(/dev/rd/c%dd%d) Failed - "
6090 "Dependent Physical Device is DEAD\n",
6091 Controller, LogicalDriveNumber,
6092 Controller->ControllerNumber,
6093 LogicalDriveNumber);
6094 break;
6095 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6096 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6097 "(/dev/rd/c%dd%d) Failed - "
6098 "Invalid or Nonredundant Logical Drive\n",
6099 Controller, LogicalDriveNumber,
6100 Controller->ControllerNumber,
6101 LogicalDriveNumber);
6102 break;
6103 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6104 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6105 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6106 "Consistency Check Already in Progress\n",
6107 Controller, LogicalDriveNumber,
6108 Controller->ControllerNumber,
6109 LogicalDriveNumber);
6110 break;
6111 default:
6112 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6113 "(/dev/rd/c%dd%d) Failed - "
6114 "Unexpected Status %04X\n",
6115 Controller, LogicalDriveNumber,
6116 Controller->ControllerNumber,
6117 LogicalDriveNumber, Command->V1.CommandStatus);
6118 break;
6119 }
6120 }
6121 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6122 strcmp(UserCommand, "cancel-consistency-check") == 0)
6123 {
6124 /*
6125 the OldRebuildRateConstant is never actually used
6126 once its value is retrieved from the controller.
6127 */
6128 unsigned char *OldRebuildRateConstant;
6129 dma_addr_t OldRebuildRateConstantDMA;
6130
6131 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6132 sizeof(char), &OldRebuildRateConstantDMA);
6133 if (OldRebuildRateConstant == NULL) {
6134 DAC960_UserCritical("Cancellation of Rebuild or "
6135 "Consistency Check Failed - "
6136 "Out of Memory",
6137 Controller);
6138 goto failure;
6139 }
6140 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6141 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6142 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6143 DAC960_ExecuteCommand(Command);
6144 switch (Command->V1.CommandStatus)
6145 {
6146 case DAC960_V1_NormalCompletion:
6147 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6148 Controller);
6149 break;
6150 default:
6151 DAC960_UserCritical("Cancellation of Rebuild or "
6152 "Consistency Check Failed - "
6153 "Unexpected Status %04X\n",
6154 Controller, Command->V1.CommandStatus);
6155 break;
6156 }
6157 failure:
6158 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6159 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6160 }
6161 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6162 Controller, UserCommand);
6163
6164 spin_lock_irqsave(&Controller->queue_lock, flags);
6165 DAC960_DeallocateCommand(Command);
6166 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6167 return true;
6168 }
6169
6170
6171 /*
6172 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6173 TargetID into a Logical Device. It returns true on success and false
6174 on failure.
6175 */
6176
6177 static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6178 unsigned char Channel,
6179 unsigned char TargetID,
6180 unsigned short
6181 *LogicalDeviceNumber)
6182 {
6183 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6184 DAC960_Controller_T *Controller = Command->Controller;
6185
6186 CommandMailbox = &Command->V2.CommandMailbox;
6187 memcpy(&SavedCommandMailbox, CommandMailbox,
6188 sizeof(DAC960_V2_CommandMailbox_T));
6189
6190 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6191 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6192 .DataTransferControllerToHost = true;
6193 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6194 .NoAutoRequestSense = true;
6195 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6196 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6197 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6198 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6199 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6200 DAC960_V2_TranslatePhysicalToLogicalDevice;
6201 CommandMailbox->Common.DataTransferMemoryAddress
6202 .ScatterGatherSegments[0]
6203 .SegmentDataPointer =
6204 Controller->V2.PhysicalToLogicalDeviceDMA;
6205 CommandMailbox->Common.DataTransferMemoryAddress
6206 .ScatterGatherSegments[0]
6207 .SegmentByteCount =
6208 CommandMailbox->Common.DataTransferSize;
6209
6210 DAC960_ExecuteCommand(Command);
6211 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6212
6213 memcpy(CommandMailbox, &SavedCommandMailbox,
6214 sizeof(DAC960_V2_CommandMailbox_T));
6215 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6216 }
6217
6218
6219 /*
6220 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6221 Controllers.
6222 */
6223
6224 static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6225 unsigned char *UserCommand)
6226 {
6227 DAC960_Command_T *Command;
6228 DAC960_V2_CommandMailbox_T *CommandMailbox;
6229 unsigned long flags;
6230 unsigned char Channel, TargetID, LogicalDriveNumber;
6231 unsigned short LogicalDeviceNumber;
6232
6233 spin_lock_irqsave(&Controller->queue_lock, flags);
6234 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6235 DAC960_WaitForCommand(Controller);
6236 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6237 Controller->UserStatusLength = 0;
6238 DAC960_V2_ClearCommand(Command);
6239 Command->CommandType = DAC960_ImmediateCommand;
6240 CommandMailbox = &Command->V2.CommandMailbox;
6241 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6242 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6243 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6244 if (strcmp(UserCommand, "flush-cache") == 0)
6245 {
6246 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6247 CommandMailbox->DeviceOperation.OperationDevice =
6248 DAC960_V2_RAID_Controller;
6249 DAC960_ExecuteCommand(Command);
6250 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6251 }
6252 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6253 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6254 &Channel, &TargetID) &&
6255 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6256 &LogicalDeviceNumber))
6257 {
6258 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6259 LogicalDeviceNumber;
6260 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6261 DAC960_V2_SetDeviceState;
6262 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6263 DAC960_V2_Device_Dead;
6264 DAC960_ExecuteCommand(Command);
6265 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6266 Controller, Channel, TargetID,
6267 (Command->V2.CommandStatus
6268 == DAC960_V2_NormalCompletion
6269 ? "Succeeded" : "Failed"));
6270 }
6271 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6272 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6273 &Channel, &TargetID) &&
6274 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6275 &LogicalDeviceNumber))
6276 {
6277 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6278 LogicalDeviceNumber;
6279 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6280 DAC960_V2_SetDeviceState;
6281 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6282 DAC960_V2_Device_Online;
6283 DAC960_ExecuteCommand(Command);
6284 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6285 Controller, Channel, TargetID,
6286 (Command->V2.CommandStatus
6287 == DAC960_V2_NormalCompletion
6288 ? "Succeeded" : "Failed"));
6289 }
6290 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6291 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6292 &Channel, &TargetID) &&
6293 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6294 &LogicalDeviceNumber))
6295 {
6296 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6297 LogicalDeviceNumber;
6298 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6299 DAC960_V2_SetDeviceState;
6300 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6301 DAC960_V2_Device_Standby;
6302 DAC960_ExecuteCommand(Command);
6303 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6304 Controller, Channel, TargetID,
6305 (Command->V2.CommandStatus
6306 == DAC960_V2_NormalCompletion
6307 ? "Succeeded" : "Failed"));
6308 }
6309 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6310 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6311 &Channel, &TargetID) &&
6312 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6313 &LogicalDeviceNumber))
6314 {
6315 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6316 LogicalDeviceNumber;
6317 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6318 DAC960_V2_RebuildDeviceStart;
6319 DAC960_ExecuteCommand(Command);
6320 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6321 Controller, Channel, TargetID,
6322 (Command->V2.CommandStatus
6323 == DAC960_V2_NormalCompletion
6324 ? "Initiated" : "Not Initiated"));
6325 }
6326 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6327 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6328 &Channel, &TargetID) &&
6329 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6330 &LogicalDeviceNumber))
6331 {
6332 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6333 LogicalDeviceNumber;
6334 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6335 DAC960_V2_RebuildDeviceStop;
6336 DAC960_ExecuteCommand(Command);
6337 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6338 Controller, Channel, TargetID,
6339 (Command->V2.CommandStatus
6340 == DAC960_V2_NormalCompletion
6341 ? "Cancelled" : "Not Cancelled"));
6342 }
6343 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6344 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6345 &LogicalDriveNumber))
6346 {
6347 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6348 LogicalDriveNumber;
6349 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6350 DAC960_V2_ConsistencyCheckStart;
6351 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6352 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6353 DAC960_ExecuteCommand(Command);
6354 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6355 "(/dev/rd/c%dd%d) %s\n",
6356 Controller, LogicalDriveNumber,
6357 Controller->ControllerNumber,
6358 LogicalDriveNumber,
6359 (Command->V2.CommandStatus
6360 == DAC960_V2_NormalCompletion
6361 ? "Initiated" : "Not Initiated"));
6362 }
6363 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6364 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6365 &LogicalDriveNumber))
6366 {
6367 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6368 LogicalDriveNumber;
6369 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6370 DAC960_V2_ConsistencyCheckStop;
6371 DAC960_ExecuteCommand(Command);
6372 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6373 "(/dev/rd/c%dd%d) %s\n",
6374 Controller, LogicalDriveNumber,
6375 Controller->ControllerNumber,
6376 LogicalDriveNumber,
6377 (Command->V2.CommandStatus
6378 == DAC960_V2_NormalCompletion
6379 ? "Cancelled" : "Not Cancelled"));
6380 }
6381 else if (strcmp(UserCommand, "perform-discovery") == 0)
6382 {
6383 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6384 DAC960_ExecuteCommand(Command);
6385 DAC960_UserCritical("Discovery %s\n", Controller,
6386 (Command->V2.CommandStatus
6387 == DAC960_V2_NormalCompletion
6388 ? "Initiated" : "Not Initiated"));
6389 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6390 {
6391 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6392 CommandMailbox->ControllerInfo.CommandControlBits
6393 .DataTransferControllerToHost = true;
6394 CommandMailbox->ControllerInfo.CommandControlBits
6395 .NoAutoRequestSense = true;
6396 CommandMailbox->ControllerInfo.DataTransferSize =
6397 sizeof(DAC960_V2_ControllerInfo_T);
6398 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6399 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6400 DAC960_V2_GetControllerInfo;
6401 /*
6402 * How does this NOT race with the queued Monitoring
6403 * usage of this structure?
6404 */
6405 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6406 .ScatterGatherSegments[0]
6407 .SegmentDataPointer =
6408 Controller->V2.NewControllerInformationDMA;
6409 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6410 .ScatterGatherSegments[0]
6411 .SegmentByteCount =
6412 CommandMailbox->ControllerInfo.DataTransferSize;
6413 DAC960_ExecuteCommand(Command);
6414 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6415 {
6416 DAC960_ExecuteCommand(Command);
6417 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6418 }
6419 DAC960_UserCritical("Discovery Completed\n", Controller);
6420 }
6421 }
6422 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6423 Controller->SuppressEnclosureMessages = true;
6424 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6425 Controller, UserCommand);
6426
6427 spin_lock_irqsave(&Controller->queue_lock, flags);
6428 DAC960_DeallocateCommand(Command);
6429 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6430 return true;
6431 }
6432
6433 static int dac960_proc_show(struct seq_file *m, void *v)
6434 {
6435 unsigned char *StatusMessage = "OK\n";
6436 int ControllerNumber;
6437 for (ControllerNumber = 0;
6438 ControllerNumber < DAC960_ControllerCount;
6439 ControllerNumber++)
6440 {
6441 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6442 if (Controller == NULL) continue;
6443 if (Controller->MonitoringAlertMode)
6444 {
6445 StatusMessage = "ALERT\n";
6446 break;
6447 }
6448 }
6449 seq_puts(m, StatusMessage);
6450 return 0;
6451 }
6452
6453 static int dac960_proc_open(struct inode *inode, struct file *file)
6454 {
6455 return single_open(file, dac960_proc_show, NULL);
6456 }
6457
6458 static const struct file_operations dac960_proc_fops = {
6459 .owner = THIS_MODULE,
6460 .open = dac960_proc_open,
6461 .read = seq_read,
6462 .llseek = seq_lseek,
6463 .release = single_release,
6464 };
6465
6466 static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
6467 {
6468 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6469 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6470 return 0;
6471 }
6472
6473 static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6474 {
6475 return single_open(file, dac960_initial_status_proc_show, PDE(inode)->data);
6476 }
6477
6478 static const struct file_operations dac960_initial_status_proc_fops = {
6479 .owner = THIS_MODULE,
6480 .open = dac960_initial_status_proc_open,
6481 .read = seq_read,
6482 .llseek = seq_lseek,
6483 .release = single_release,
6484 };
6485
6486 static int dac960_current_status_proc_show(struct seq_file *m, void *v)
6487 {
6488 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
6489 unsigned char *StatusMessage =
6490 "No Rebuild or Consistency Check in Progress\n";
6491 int ProgressMessageLength = strlen(StatusMessage);
6492 if (jiffies != Controller->LastCurrentStatusTime)
6493 {
6494 Controller->CurrentStatusLength = 0;
6495 DAC960_AnnounceDriver(Controller);
6496 DAC960_ReportControllerConfiguration(Controller);
6497 DAC960_ReportDeviceConfiguration(Controller);
6498 if (Controller->ProgressBufferLength > 0)
6499 ProgressMessageLength = Controller->ProgressBufferLength;
6500 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6501 {
6502 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6503 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6504 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6505 if (Controller->ProgressBufferLength > 0)
6506 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6507 Controller->ProgressBuffer);
6508 else
6509 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6510 StatusMessage);
6511 Controller->CurrentStatusLength += ProgressMessageLength;
6512 }
6513 Controller->LastCurrentStatusTime = jiffies;
6514 }
6515 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6516 return 0;
6517 }
6518
6519 static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6520 {
6521 return single_open(file, dac960_current_status_proc_show, PDE(inode)->data);
6522 }
6523
6524 static const struct file_operations dac960_current_status_proc_fops = {
6525 .owner = THIS_MODULE,
6526 .open = dac960_current_status_proc_open,
6527 .read = seq_read,
6528 .llseek = seq_lseek,
6529 .release = single_release,
6530 };
6531
6532 static int dac960_user_command_proc_show(struct seq_file *m, void *v)
6533 {
6534 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6535
6536 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6537 return 0;
6538 }
6539
6540 static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6541 {
6542 return single_open(file, dac960_user_command_proc_show, PDE(inode)->data);
6543 }
6544
6545 static ssize_t dac960_user_command_proc_write(struct file *file,
6546 const char __user *Buffer,
6547 size_t Count, loff_t *pos)
6548 {
6549 DAC960_Controller_T *Controller = (DAC960_Controller_T *) PDE(file->f_path.dentry->d_inode)->data;
6550 unsigned char CommandBuffer[80];
6551 int Length;
6552 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6553 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6554 CommandBuffer[Count] = '\0';
6555 Length = strlen(CommandBuffer);
6556 if (Length > 0 && CommandBuffer[Length-1] == '\n')
6557 CommandBuffer[--Length] = '\0';
6558 if (Controller->FirmwareType == DAC960_V1_Controller)
6559 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6560 ? Count : -EBUSY);
6561 else
6562 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6563 ? Count : -EBUSY);
6564 }
6565
6566 static const struct file_operations dac960_user_command_proc_fops = {
6567 .owner = THIS_MODULE,
6568 .open = dac960_user_command_proc_open,
6569 .read = seq_read,
6570 .llseek = seq_lseek,
6571 .release = single_release,
6572 .write = dac960_user_command_proc_write,
6573 };
6574
6575 /*
6576 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6577 DAC960 Driver.
6578 */
6579
6580 static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6581 {
6582 struct proc_dir_entry *StatusProcEntry;
6583 struct proc_dir_entry *ControllerProcEntry;
6584 struct proc_dir_entry *UserCommandProcEntry;
6585
6586 if (DAC960_ProcDirectoryEntry == NULL) {
6587 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6588 StatusProcEntry = proc_create("status", 0,
6589 DAC960_ProcDirectoryEntry,
6590 &dac960_proc_fops);
6591 }
6592
6593 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6594 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6595 DAC960_ProcDirectoryEntry);
6596 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6597 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6598 UserCommandProcEntry = proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6599 Controller->ControllerProcEntry = ControllerProcEntry;
6600 }
6601
6602
6603 /*
6604 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6605 DAC960 Driver.
6606 */
6607
6608 static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6609 {
6610 if (Controller->ControllerProcEntry == NULL)
6611 return;
6612 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6613 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6614 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6615 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6616 Controller->ControllerProcEntry = NULL;
6617 }
6618
6619 #ifdef DAC960_GAM_MINOR
6620
6621 /*
6622 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6623 */
6624
6625 static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
6626 unsigned long Argument)
6627 {
6628 long ErrorCode = 0;
6629 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
6630
6631 mutex_lock(&DAC960_mutex);
6632 switch (Request)
6633 {
6634 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
6635 ErrorCode = DAC960_ControllerCount;
6636 break;
6637 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6638 {
6639 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6640 (DAC960_ControllerInfo_T __user *) Argument;
6641 DAC960_ControllerInfo_T ControllerInfo;
6642 DAC960_Controller_T *Controller;
6643 int ControllerNumber;
6644 if (UserSpaceControllerInfo == NULL)
6645 ErrorCode = -EINVAL;
6646 else ErrorCode = get_user(ControllerNumber,
6647 &UserSpaceControllerInfo->ControllerNumber);
6648 if (ErrorCode != 0)
6649 break;
6650 ErrorCode = -ENXIO;
6651 if (ControllerNumber < 0 ||
6652 ControllerNumber > DAC960_ControllerCount - 1) {
6653 break;
6654 }
6655 Controller = DAC960_Controllers[ControllerNumber];
6656 if (Controller == NULL)
6657 break;
6658 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6659 ControllerInfo.ControllerNumber = ControllerNumber;
6660 ControllerInfo.FirmwareType = Controller->FirmwareType;
6661 ControllerInfo.Channels = Controller->Channels;
6662 ControllerInfo.Targets = Controller->Targets;
6663 ControllerInfo.PCI_Bus = Controller->Bus;
6664 ControllerInfo.PCI_Device = Controller->Device;
6665 ControllerInfo.PCI_Function = Controller->Function;
6666 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6667 ControllerInfo.PCI_Address = Controller->PCI_Address;
6668 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6669 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6670 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6671 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6672 break;
6673 }
6674 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6675 {
6676 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6677 (DAC960_V1_UserCommand_T __user *) Argument;
6678 DAC960_V1_UserCommand_T UserCommand;
6679 DAC960_Controller_T *Controller;
6680 DAC960_Command_T *Command = NULL;
6681 DAC960_V1_CommandOpcode_T CommandOpcode;
6682 DAC960_V1_CommandStatus_T CommandStatus;
6683 DAC960_V1_DCDB_T DCDB;
6684 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6685 dma_addr_t DCDB_IOBUFDMA;
6686 unsigned long flags;
6687 int ControllerNumber, DataTransferLength;
6688 unsigned char *DataTransferBuffer = NULL;
6689 dma_addr_t DataTransferBufferDMA;
6690 if (UserSpaceUserCommand == NULL) {
6691 ErrorCode = -EINVAL;
6692 break;
6693 }
6694 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6695 sizeof(DAC960_V1_UserCommand_T))) {
6696 ErrorCode = -EFAULT;
6697 break;
6698 }
6699 ControllerNumber = UserCommand.ControllerNumber;
6700 ErrorCode = -ENXIO;
6701 if (ControllerNumber < 0 ||
6702 ControllerNumber > DAC960_ControllerCount - 1)
6703 break;
6704 Controller = DAC960_Controllers[ControllerNumber];
6705 if (Controller == NULL)
6706 break;
6707 ErrorCode = -EINVAL;
6708 if (Controller->FirmwareType != DAC960_V1_Controller)
6709 break;
6710 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6711 DataTransferLength = UserCommand.DataTransferLength;
6712 if (CommandOpcode & 0x80)
6713 break;
6714 if (CommandOpcode == DAC960_V1_DCDB)
6715 {
6716 if (copy_from_user(&DCDB, UserCommand.DCDB,
6717 sizeof(DAC960_V1_DCDB_T))) {
6718 ErrorCode = -EFAULT;
6719 break;
6720 }
6721 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6722 break;
6723 if (!((DataTransferLength == 0 &&
6724 DCDB.Direction
6725 == DAC960_V1_DCDB_NoDataTransfer) ||
6726 (DataTransferLength > 0 &&
6727 DCDB.Direction
6728 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6729 (DataTransferLength < 0 &&
6730 DCDB.Direction
6731 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6732 break;
6733 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6734 != abs(DataTransferLength))
6735 break;
6736 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6737 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6738 if (DCDB_IOBUF == NULL) {
6739 ErrorCode = -ENOMEM;
6740 break;
6741 }
6742 }
6743 ErrorCode = -ENOMEM;
6744 if (DataTransferLength > 0)
6745 {
6746 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6747 DataTransferLength, &DataTransferBufferDMA);
6748 if (DataTransferBuffer == NULL)
6749 break;
6750 memset(DataTransferBuffer, 0, DataTransferLength);
6751 }
6752 else if (DataTransferLength < 0)
6753 {
6754 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6755 -DataTransferLength, &DataTransferBufferDMA);
6756 if (DataTransferBuffer == NULL)
6757 break;
6758 if (copy_from_user(DataTransferBuffer,
6759 UserCommand.DataTransferBuffer,
6760 -DataTransferLength)) {
6761 ErrorCode = -EFAULT;
6762 break;
6763 }
6764 }
6765 if (CommandOpcode == DAC960_V1_DCDB)
6766 {
6767 spin_lock_irqsave(&Controller->queue_lock, flags);
6768 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6769 DAC960_WaitForCommand(Controller);
6770 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6771 [DCDB.TargetID])
6772 {
6773 spin_unlock_irq(&Controller->queue_lock);
6774 __wait_event(Controller->CommandWaitQueue,
6775 !Controller->V1.DirectCommandActive
6776 [DCDB.Channel][DCDB.TargetID]);
6777 spin_lock_irq(&Controller->queue_lock);
6778 }
6779 Controller->V1.DirectCommandActive[DCDB.Channel]
6780 [DCDB.TargetID] = true;
6781 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6782 DAC960_V1_ClearCommand(Command);
6783 Command->CommandType = DAC960_ImmediateCommand;
6784 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6785 sizeof(DAC960_V1_CommandMailbox_T));
6786 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6787 DCDB.BusAddress = DataTransferBufferDMA;
6788 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6789 }
6790 else
6791 {
6792 spin_lock_irqsave(&Controller->queue_lock, flags);
6793 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6794 DAC960_WaitForCommand(Controller);
6795 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6796 DAC960_V1_ClearCommand(Command);
6797 Command->CommandType = DAC960_ImmediateCommand;
6798 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6799 sizeof(DAC960_V1_CommandMailbox_T));
6800 if (DataTransferBuffer != NULL)
6801 Command->V1.CommandMailbox.Type3.BusAddress =
6802 DataTransferBufferDMA;
6803 }
6804 DAC960_ExecuteCommand(Command);
6805 CommandStatus = Command->V1.CommandStatus;
6806 spin_lock_irqsave(&Controller->queue_lock, flags);
6807 DAC960_DeallocateCommand(Command);
6808 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6809 if (DataTransferLength > 0)
6810 {
6811 if (copy_to_user(UserCommand.DataTransferBuffer,
6812 DataTransferBuffer, DataTransferLength)) {
6813 ErrorCode = -EFAULT;
6814 goto Failure1;
6815 }
6816 }
6817 if (CommandOpcode == DAC960_V1_DCDB)
6818 {
6819 /*
6820 I don't believe Target or Channel in the DCDB_IOBUF
6821 should be any different from the contents of DCDB.
6822 */
6823 Controller->V1.DirectCommandActive[DCDB.Channel]
6824 [DCDB.TargetID] = false;
6825 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6826 sizeof(DAC960_V1_DCDB_T))) {
6827 ErrorCode = -EFAULT;
6828 goto Failure1;
6829 }
6830 }
6831 ErrorCode = CommandStatus;
6832 Failure1:
6833 if (DataTransferBuffer != NULL)
6834 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6835 DataTransferBuffer, DataTransferBufferDMA);
6836 if (DCDB_IOBUF != NULL)
6837 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6838 DCDB_IOBUF, DCDB_IOBUFDMA);
6839 break;
6840 }
6841 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6842 {
6843 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6844 (DAC960_V2_UserCommand_T __user *) Argument;
6845 DAC960_V2_UserCommand_T UserCommand;
6846 DAC960_Controller_T *Controller;
6847 DAC960_Command_T *Command = NULL;
6848 DAC960_V2_CommandMailbox_T *CommandMailbox;
6849 DAC960_V2_CommandStatus_T CommandStatus;
6850 unsigned long flags;
6851 int ControllerNumber, DataTransferLength;
6852 int DataTransferResidue, RequestSenseLength;
6853 unsigned char *DataTransferBuffer = NULL;
6854 dma_addr_t DataTransferBufferDMA;
6855 unsigned char *RequestSenseBuffer = NULL;
6856 dma_addr_t RequestSenseBufferDMA;
6857
6858 ErrorCode = -EINVAL;
6859 if (UserSpaceUserCommand == NULL)
6860 break;
6861 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6862 sizeof(DAC960_V2_UserCommand_T))) {
6863 ErrorCode = -EFAULT;
6864 break;
6865 }
6866 ErrorCode = -ENXIO;
6867 ControllerNumber = UserCommand.ControllerNumber;
6868 if (ControllerNumber < 0 ||
6869 ControllerNumber > DAC960_ControllerCount - 1)
6870 break;
6871 Controller = DAC960_Controllers[ControllerNumber];
6872 if (Controller == NULL)
6873 break;
6874 if (Controller->FirmwareType != DAC960_V2_Controller){
6875 ErrorCode = -EINVAL;
6876 break;
6877 }
6878 DataTransferLength = UserCommand.DataTransferLength;
6879 ErrorCode = -ENOMEM;
6880 if (DataTransferLength > 0)
6881 {
6882 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6883 DataTransferLength, &DataTransferBufferDMA);
6884 if (DataTransferBuffer == NULL)
6885 break;
6886 memset(DataTransferBuffer, 0, DataTransferLength);
6887 }
6888 else if (DataTransferLength < 0)
6889 {
6890 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6891 -DataTransferLength, &DataTransferBufferDMA);
6892 if (DataTransferBuffer == NULL)
6893 break;
6894 if (copy_from_user(DataTransferBuffer,
6895 UserCommand.DataTransferBuffer,
6896 -DataTransferLength)) {
6897 ErrorCode = -EFAULT;
6898 goto Failure2;
6899 }
6900 }
6901 RequestSenseLength = UserCommand.RequestSenseLength;
6902 if (RequestSenseLength > 0)
6903 {
6904 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6905 RequestSenseLength, &RequestSenseBufferDMA);
6906 if (RequestSenseBuffer == NULL)
6907 {
6908 ErrorCode = -ENOMEM;
6909 goto Failure2;
6910 }
6911 memset(RequestSenseBuffer, 0, RequestSenseLength);
6912 }
6913 spin_lock_irqsave(&Controller->queue_lock, flags);
6914 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6915 DAC960_WaitForCommand(Controller);
6916 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6917 DAC960_V2_ClearCommand(Command);
6918 Command->CommandType = DAC960_ImmediateCommand;
6919 CommandMailbox = &Command->V2.CommandMailbox;
6920 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6921 sizeof(DAC960_V2_CommandMailbox_T));
6922 CommandMailbox->Common.CommandControlBits
6923 .AdditionalScatterGatherListMemory = false;
6924 CommandMailbox->Common.CommandControlBits
6925 .NoAutoRequestSense = true;
6926 CommandMailbox->Common.DataTransferSize = 0;
6927 CommandMailbox->Common.DataTransferPageNumber = 0;
6928 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6929 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6930 if (DataTransferLength != 0)
6931 {
6932 if (DataTransferLength > 0)
6933 {
6934 CommandMailbox->Common.CommandControlBits
6935 .DataTransferControllerToHost = true;
6936 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6937 }
6938 else
6939 {
6940 CommandMailbox->Common.CommandControlBits
6941 .DataTransferControllerToHost = false;
6942 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6943 }
6944 CommandMailbox->Common.DataTransferMemoryAddress
6945 .ScatterGatherSegments[0]
6946 .SegmentDataPointer = DataTransferBufferDMA;
6947 CommandMailbox->Common.DataTransferMemoryAddress
6948 .ScatterGatherSegments[0]
6949 .SegmentByteCount =
6950 CommandMailbox->Common.DataTransferSize;
6951 }
6952 if (RequestSenseLength > 0)
6953 {
6954 CommandMailbox->Common.CommandControlBits
6955 .NoAutoRequestSense = false;
6956 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6957 CommandMailbox->Common.RequestSenseBusAddress =
6958 RequestSenseBufferDMA;
6959 }
6960 DAC960_ExecuteCommand(Command);
6961 CommandStatus = Command->V2.CommandStatus;
6962 RequestSenseLength = Command->V2.RequestSenseLength;
6963 DataTransferResidue = Command->V2.DataTransferResidue;
6964 spin_lock_irqsave(&Controller->queue_lock, flags);
6965 DAC960_DeallocateCommand(Command);
6966 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6967 if (RequestSenseLength > UserCommand.RequestSenseLength)
6968 RequestSenseLength = UserCommand.RequestSenseLength;
6969 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6970 &DataTransferResidue,
6971 sizeof(DataTransferResidue))) {
6972 ErrorCode = -EFAULT;
6973 goto Failure2;
6974 }
6975 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6976 &RequestSenseLength, sizeof(RequestSenseLength))) {
6977 ErrorCode = -EFAULT;
6978 goto Failure2;
6979 }
6980 if (DataTransferLength > 0)
6981 {
6982 if (copy_to_user(UserCommand.DataTransferBuffer,
6983 DataTransferBuffer, DataTransferLength)) {
6984 ErrorCode = -EFAULT;
6985 goto Failure2;
6986 }
6987 }
6988 if (RequestSenseLength > 0)
6989 {
6990 if (copy_to_user(UserCommand.RequestSenseBuffer,
6991 RequestSenseBuffer, RequestSenseLength)) {
6992 ErrorCode = -EFAULT;
6993 goto Failure2;
6994 }
6995 }
6996 ErrorCode = CommandStatus;
6997 Failure2:
6998 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6999 DataTransferBuffer, DataTransferBufferDMA);
7000 if (RequestSenseBuffer != NULL)
7001 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
7002 RequestSenseBuffer, RequestSenseBufferDMA);
7003 break;
7004 }
7005 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7006 {
7007 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
7008 (DAC960_V2_GetHealthStatus_T __user *) Argument;
7009 DAC960_V2_GetHealthStatus_T GetHealthStatus;
7010 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7011 DAC960_Controller_T *Controller;
7012 int ControllerNumber;
7013 if (UserSpaceGetHealthStatus == NULL) {
7014 ErrorCode = -EINVAL;
7015 break;
7016 }
7017 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
7018 sizeof(DAC960_V2_GetHealthStatus_T))) {
7019 ErrorCode = -EFAULT;
7020 break;
7021 }
7022 ErrorCode = -ENXIO;
7023 ControllerNumber = GetHealthStatus.ControllerNumber;
7024 if (ControllerNumber < 0 ||
7025 ControllerNumber > DAC960_ControllerCount - 1)
7026 break;
7027 Controller = DAC960_Controllers[ControllerNumber];
7028 if (Controller == NULL)
7029 break;
7030 if (Controller->FirmwareType != DAC960_V2_Controller) {
7031 ErrorCode = -EINVAL;
7032 break;
7033 }
7034 if (copy_from_user(&HealthStatusBuffer,
7035 GetHealthStatus.HealthStatusBuffer,
7036 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7037 ErrorCode = -EFAULT;
7038 break;
7039 }
7040 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7041 == HealthStatusBuffer.StatusChangeCounter &&
7042 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7043 == HealthStatusBuffer.NextEventSequenceNumber)
7044 {
7045 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7046 DAC960_MonitoringTimerInterval);
7047 if (signal_pending(current)) {
7048 ErrorCode = -EINTR;
7049 break;
7050 }
7051 }
7052 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7053 Controller->V2.HealthStatusBuffer,
7054 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7055 ErrorCode = -EFAULT;
7056 else
7057 ErrorCode = 0;
7058 }
7059 default:
7060 ErrorCode = -ENOTTY;
7061 }
7062 mutex_unlock(&DAC960_mutex);
7063 return ErrorCode;
7064 }
7065
7066 static const struct file_operations DAC960_gam_fops = {
7067 .owner = THIS_MODULE,
7068 .unlocked_ioctl = DAC960_gam_ioctl,
7069 .llseek = noop_llseek,
7070 };
7071
7072 static struct miscdevice DAC960_gam_dev = {
7073 DAC960_GAM_MINOR,
7074 "dac960_gam",
7075 &DAC960_gam_fops
7076 };
7077
7078 static int DAC960_gam_init(void)
7079 {
7080 int ret;
7081
7082 ret = misc_register(&DAC960_gam_dev);
7083 if (ret)
7084 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7085 return ret;
7086 }
7087
7088 static void DAC960_gam_cleanup(void)
7089 {
7090 misc_deregister(&DAC960_gam_dev);
7091 }
7092
7093 #endif /* DAC960_GAM_MINOR */
7094
7095 static struct DAC960_privdata DAC960_GEM_privdata = {
7096 .HardwareType = DAC960_GEM_Controller,
7097 .FirmwareType = DAC960_V2_Controller,
7098 .InterruptHandler = DAC960_GEM_InterruptHandler,
7099 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7100 };
7101
7102
7103 static struct DAC960_privdata DAC960_BA_privdata = {
7104 .HardwareType = DAC960_BA_Controller,
7105 .FirmwareType = DAC960_V2_Controller,
7106 .InterruptHandler = DAC960_BA_InterruptHandler,
7107 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7108 };
7109
7110 static struct DAC960_privdata DAC960_LP_privdata = {
7111 .HardwareType = DAC960_LP_Controller,
7112 .FirmwareType = DAC960_V2_Controller,
7113 .InterruptHandler = DAC960_LP_InterruptHandler,
7114 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7115 };
7116
7117 static struct DAC960_privdata DAC960_LA_privdata = {
7118 .HardwareType = DAC960_LA_Controller,
7119 .FirmwareType = DAC960_V1_Controller,
7120 .InterruptHandler = DAC960_LA_InterruptHandler,
7121 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7122 };
7123
7124 static struct DAC960_privdata DAC960_PG_privdata = {
7125 .HardwareType = DAC960_PG_Controller,
7126 .FirmwareType = DAC960_V1_Controller,
7127 .InterruptHandler = DAC960_PG_InterruptHandler,
7128 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7129 };
7130
7131 static struct DAC960_privdata DAC960_PD_privdata = {
7132 .HardwareType = DAC960_PD_Controller,
7133 .FirmwareType = DAC960_V1_Controller,
7134 .InterruptHandler = DAC960_PD_InterruptHandler,
7135 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7136 };
7137
7138 static struct DAC960_privdata DAC960_P_privdata = {
7139 .HardwareType = DAC960_P_Controller,
7140 .FirmwareType = DAC960_V1_Controller,
7141 .InterruptHandler = DAC960_P_InterruptHandler,
7142 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7143 };
7144
7145 static const struct pci_device_id DAC960_id_table[] = {
7146 {
7147 .vendor = PCI_VENDOR_ID_MYLEX,
7148 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7149 .subvendor = PCI_VENDOR_ID_MYLEX,
7150 .subdevice = PCI_ANY_ID,
7151 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7152 },
7153 {
7154 .vendor = PCI_VENDOR_ID_MYLEX,
7155 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7156 .subvendor = PCI_ANY_ID,
7157 .subdevice = PCI_ANY_ID,
7158 .driver_data = (unsigned long) &DAC960_BA_privdata,
7159 },
7160 {
7161 .vendor = PCI_VENDOR_ID_MYLEX,
7162 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7163 .subvendor = PCI_ANY_ID,
7164 .subdevice = PCI_ANY_ID,
7165 .driver_data = (unsigned long) &DAC960_LP_privdata,
7166 },
7167 {
7168 .vendor = PCI_VENDOR_ID_DEC,
7169 .device = PCI_DEVICE_ID_DEC_21285,
7170 .subvendor = PCI_VENDOR_ID_MYLEX,
7171 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7172 .driver_data = (unsigned long) &DAC960_LA_privdata,
7173 },
7174 {
7175 .vendor = PCI_VENDOR_ID_MYLEX,
7176 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7177 .subvendor = PCI_ANY_ID,
7178 .subdevice = PCI_ANY_ID,
7179 .driver_data = (unsigned long) &DAC960_PG_privdata,
7180 },
7181 {
7182 .vendor = PCI_VENDOR_ID_MYLEX,
7183 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7184 .subvendor = PCI_ANY_ID,
7185 .subdevice = PCI_ANY_ID,
7186 .driver_data = (unsigned long) &DAC960_PD_privdata,
7187 },
7188 {
7189 .vendor = PCI_VENDOR_ID_MYLEX,
7190 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7191 .subvendor = PCI_ANY_ID,
7192 .subdevice = PCI_ANY_ID,
7193 .driver_data = (unsigned long) &DAC960_P_privdata,
7194 },
7195 {0, },
7196 };
7197
7198 MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7199
7200 static struct pci_driver DAC960_pci_driver = {
7201 .name = "DAC960",
7202 .id_table = DAC960_id_table,
7203 .probe = DAC960_Probe,
7204 .remove = DAC960_Remove,
7205 };
7206
7207 static int __init DAC960_init_module(void)
7208 {
7209 int ret;
7210
7211 ret = pci_register_driver(&DAC960_pci_driver);
7212 #ifdef DAC960_GAM_MINOR
7213 if (!ret)
7214 DAC960_gam_init();
7215 #endif
7216 return ret;
7217 }
7218
7219 static void __exit DAC960_cleanup_module(void)
7220 {
7221 int i;
7222
7223 #ifdef DAC960_GAM_MINOR
7224 DAC960_gam_cleanup();
7225 #endif
7226
7227 for (i = 0; i < DAC960_ControllerCount; i++) {
7228 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7229 if (Controller == NULL)
7230 continue;
7231 DAC960_FinalizeController(Controller);
7232 }
7233 if (DAC960_ProcDirectoryEntry != NULL) {
7234 remove_proc_entry("rd/status", NULL);
7235 remove_proc_entry("rd", NULL);
7236 }
7237 DAC960_ControllerCount = 0;
7238 pci_unregister_driver(&DAC960_pci_driver);
7239 }
7240
7241 module_init(DAC960_init_module);
7242 module_exit(DAC960_cleanup_module);
7243
7244 MODULE_LICENSE("GPL");