ACPICA: Lint changes
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / acpi / processor_idle.c
1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42
43 #include <asm/io.h>
44 #include <asm/uaccess.h>
45
46 #include <acpi/acpi_bus.h>
47 #include <acpi/processor.h>
48
49 #define ACPI_PROCESSOR_COMPONENT 0x01000000
50 #define ACPI_PROCESSOR_CLASS "processor"
51 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
52 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
53 ACPI_MODULE_NAME("acpi_processor")
54 #define ACPI_PROCESSOR_FILE_POWER "power"
55 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
56 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
58 static void (*pm_idle_save) (void) __read_mostly;
59 module_param(max_cstate, uint, 0644);
60
61 static unsigned int nocst __read_mostly;
62 module_param(nocst, uint, 0000);
63
64 /*
65 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
66 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
67 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
68 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
69 * reduce history for more aggressive entry into C3
70 */
71 static unsigned int bm_history __read_mostly =
72 (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
73 module_param(bm_history, uint, 0644);
74 /* --------------------------------------------------------------------------
75 Power Management
76 -------------------------------------------------------------------------- */
77
78 /*
79 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
80 * For now disable this. Probably a bug somewhere else.
81 *
82 * To skip this limit, boot/load with a large max_cstate limit.
83 */
84 static int set_max_cstate(struct dmi_system_id *id)
85 {
86 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
87 return 0;
88
89 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
90 " Override with \"processor.max_cstate=%d\"\n", id->ident,
91 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
92
93 max_cstate = (long)id->driver_data;
94
95 return 0;
96 }
97
98 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
99 callers to only run once -AK */
100 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
101 { set_max_cstate, "IBM ThinkPad R40e", {
102 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
103 DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
104 { set_max_cstate, "IBM ThinkPad R40e", {
105 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
106 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
107 { set_max_cstate, "IBM ThinkPad R40e", {
108 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
109 DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
110 { set_max_cstate, "IBM ThinkPad R40e", {
111 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
112 DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
113 { set_max_cstate, "IBM ThinkPad R40e", {
114 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
115 DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
116 { set_max_cstate, "IBM ThinkPad R40e", {
117 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
118 DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
119 { set_max_cstate, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
122 { set_max_cstate, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
125 { set_max_cstate, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
128 { set_max_cstate, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
131 { set_max_cstate, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
134 { set_max_cstate, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
137 { set_max_cstate, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
140 { set_max_cstate, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
143 { set_max_cstate, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
146 { set_max_cstate, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
149 { set_max_cstate, "Medion 41700", {
150 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
151 DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
152 { set_max_cstate, "Clevo 5600D", {
153 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
154 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
155 (void *)2},
156 {},
157 };
158
159 static inline u32 ticks_elapsed(u32 t1, u32 t2)
160 {
161 if (t2 >= t1)
162 return (t2 - t1);
163 else if (!acpi_fadt.tmr_val_ext)
164 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
165 else
166 return ((0xFFFFFFFF - t1) + t2);
167 }
168
169 static void
170 acpi_processor_power_activate(struct acpi_processor *pr,
171 struct acpi_processor_cx *new)
172 {
173 struct acpi_processor_cx *old;
174
175 if (!pr || !new)
176 return;
177
178 old = pr->power.state;
179
180 if (old)
181 old->promotion.count = 0;
182 new->demotion.count = 0;
183
184 /* Cleanup from old state. */
185 if (old) {
186 switch (old->type) {
187 case ACPI_STATE_C3:
188 /* Disable bus master reload */
189 if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
190 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0,
191 ACPI_MTX_DO_NOT_LOCK);
192 break;
193 }
194 }
195
196 /* Prepare to use new state. */
197 switch (new->type) {
198 case ACPI_STATE_C3:
199 /* Enable bus master reload */
200 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1,
202 ACPI_MTX_DO_NOT_LOCK);
203 break;
204 }
205
206 pr->power.state = new;
207
208 return;
209 }
210
211 static void acpi_safe_halt(void)
212 {
213 current_thread_info()->status &= ~TS_POLLING;
214 /*
215 * TS_POLLING-cleared state must be visible before we
216 * test NEED_RESCHED:
217 */
218 smp_mb();
219 if (!need_resched())
220 safe_halt();
221 current_thread_info()->status |= TS_POLLING;
222 }
223
224 static atomic_t c3_cpu_count;
225
226 /* Common C-state entry for C2, C3, .. */
227 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
228 {
229 if (cstate->space_id == ACPI_CSTATE_FFH) {
230 /* Call into architectural FFH based C-state */
231 acpi_processor_ffh_cstate_enter(cstate);
232 } else {
233 int unused;
234 /* IO port based C-state */
235 inb(cstate->address);
236 /* Dummy wait op - must do something useless after P_LVL2 read
237 because chipsets cannot guarantee that STPCLK# signal
238 gets asserted in time to freeze execution properly. */
239 unused = inl(acpi_fadt.xpm_tmr_blk.address);
240 }
241 }
242
243 static void acpi_processor_idle(void)
244 {
245 struct acpi_processor *pr = NULL;
246 struct acpi_processor_cx *cx = NULL;
247 struct acpi_processor_cx *next_state = NULL;
248 int sleep_ticks = 0;
249 u32 t1, t2 = 0;
250
251 pr = processors[smp_processor_id()];
252 if (!pr)
253 return;
254
255 /*
256 * Interrupts must be disabled during bus mastering calculations and
257 * for C2/C3 transitions.
258 */
259 local_irq_disable();
260
261 /*
262 * Check whether we truly need to go idle, or should
263 * reschedule:
264 */
265 if (unlikely(need_resched())) {
266 local_irq_enable();
267 return;
268 }
269
270 cx = pr->power.state;
271 if (!cx) {
272 if (pm_idle_save)
273 pm_idle_save();
274 else
275 acpi_safe_halt();
276 return;
277 }
278
279 /*
280 * Check BM Activity
281 * -----------------
282 * Check for bus mastering activity (if required), record, and check
283 * for demotion.
284 */
285 if (pr->flags.bm_check) {
286 u32 bm_status = 0;
287 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
288
289 if (diff > 31)
290 diff = 31;
291
292 pr->power.bm_activity <<= diff;
293
294 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS,
295 &bm_status, ACPI_MTX_DO_NOT_LOCK);
296 if (bm_status) {
297 pr->power.bm_activity |= 0x1;
298 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS,
299 1, ACPI_MTX_DO_NOT_LOCK);
300 }
301 /*
302 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
303 * the true state of bus mastering activity; forcing us to
304 * manually check the BMIDEA bit of each IDE channel.
305 */
306 else if (errata.piix4.bmisx) {
307 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
308 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
309 pr->power.bm_activity |= 0x1;
310 }
311
312 pr->power.bm_check_timestamp = jiffies;
313
314 /*
315 * If bus mastering is or was active this jiffy, demote
316 * to avoid a faulty transition. Note that the processor
317 * won't enter a low-power state during this call (to this
318 * function) but should upon the next.
319 *
320 * TBD: A better policy might be to fallback to the demotion
321 * state (use it for this quantum only) istead of
322 * demoting -- and rely on duration as our sole demotion
323 * qualification. This may, however, introduce DMA
324 * issues (e.g. floppy DMA transfer overrun/underrun).
325 */
326 if ((pr->power.bm_activity & 0x1) &&
327 cx->demotion.threshold.bm) {
328 local_irq_enable();
329 next_state = cx->demotion.state;
330 goto end;
331 }
332 }
333
334 #ifdef CONFIG_HOTPLUG_CPU
335 /*
336 * Check for P_LVL2_UP flag before entering C2 and above on
337 * an SMP system. We do it here instead of doing it at _CST/P_LVL
338 * detection phase, to work cleanly with logical CPU hotplug.
339 */
340 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
341 !pr->flags.has_cst && !acpi_fadt.plvl2_up)
342 cx = &pr->power.states[ACPI_STATE_C1];
343 #endif
344
345 /*
346 * Sleep:
347 * ------
348 * Invoke the current Cx state to put the processor to sleep.
349 */
350 if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
351 current_thread_info()->status &= ~TS_POLLING;
352 /*
353 * TS_POLLING-cleared state must be visible before we
354 * test NEED_RESCHED:
355 */
356 smp_mb();
357 if (need_resched()) {
358 current_thread_info()->status |= TS_POLLING;
359 local_irq_enable();
360 return;
361 }
362 }
363
364 switch (cx->type) {
365
366 case ACPI_STATE_C1:
367 /*
368 * Invoke C1.
369 * Use the appropriate idle routine, the one that would
370 * be used without acpi C-states.
371 */
372 if (pm_idle_save)
373 pm_idle_save();
374 else
375 acpi_safe_halt();
376
377 /*
378 * TBD: Can't get time duration while in C1, as resumes
379 * go to an ISR rather than here. Need to instrument
380 * base interrupt handler.
381 */
382 sleep_ticks = 0xFFFFFFFF;
383 break;
384
385 case ACPI_STATE_C2:
386 /* Get start time (ticks) */
387 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
388 /* Invoke C2 */
389 acpi_cstate_enter(cx);
390 /* Get end time (ticks) */
391 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
392
393 #ifdef CONFIG_GENERIC_TIME
394 /* TSC halts in C2, so notify users */
395 mark_tsc_unstable();
396 #endif
397 /* Re-enable interrupts */
398 local_irq_enable();
399 current_thread_info()->status |= TS_POLLING;
400 /* Compute time (ticks) that we were actually asleep */
401 sleep_ticks =
402 ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD;
403 break;
404
405 case ACPI_STATE_C3:
406
407 if (pr->flags.bm_check) {
408 if (atomic_inc_return(&c3_cpu_count) ==
409 num_online_cpus()) {
410 /*
411 * All CPUs are trying to go to C3
412 * Disable bus master arbitration
413 */
414 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
415 ACPI_MTX_DO_NOT_LOCK);
416 }
417 } else {
418 /* SMP with no shared cache... Invalidate cache */
419 ACPI_FLUSH_CPU_CACHE();
420 }
421
422 /* Get start time (ticks) */
423 t1 = inl(acpi_fadt.xpm_tmr_blk.address);
424 /* Invoke C3 */
425 acpi_cstate_enter(cx);
426 /* Get end time (ticks) */
427 t2 = inl(acpi_fadt.xpm_tmr_blk.address);
428 if (pr->flags.bm_check) {
429 /* Enable bus master arbitration */
430 atomic_dec(&c3_cpu_count);
431 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
432 ACPI_MTX_DO_NOT_LOCK);
433 }
434
435 #ifdef CONFIG_GENERIC_TIME
436 /* TSC halts in C3, so notify users */
437 mark_tsc_unstable();
438 #endif
439 /* Re-enable interrupts */
440 local_irq_enable();
441 current_thread_info()->status |= TS_POLLING;
442 /* Compute time (ticks) that we were actually asleep */
443 sleep_ticks =
444 ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD;
445 break;
446
447 default:
448 local_irq_enable();
449 return;
450 }
451 cx->usage++;
452 if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
453 cx->time += sleep_ticks;
454
455 next_state = pr->power.state;
456
457 #ifdef CONFIG_HOTPLUG_CPU
458 /* Don't do promotion/demotion */
459 if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
460 !pr->flags.has_cst && !acpi_fadt.plvl2_up) {
461 next_state = cx;
462 goto end;
463 }
464 #endif
465
466 /*
467 * Promotion?
468 * ----------
469 * Track the number of longs (time asleep is greater than threshold)
470 * and promote when the count threshold is reached. Note that bus
471 * mastering activity may prevent promotions.
472 * Do not promote above max_cstate.
473 */
474 if (cx->promotion.state &&
475 ((cx->promotion.state - pr->power.states) <= max_cstate)) {
476 if (sleep_ticks > cx->promotion.threshold.ticks &&
477 cx->promotion.state->latency <= system_latency_constraint()) {
478 cx->promotion.count++;
479 cx->demotion.count = 0;
480 if (cx->promotion.count >=
481 cx->promotion.threshold.count) {
482 if (pr->flags.bm_check) {
483 if (!
484 (pr->power.bm_activity & cx->
485 promotion.threshold.bm)) {
486 next_state =
487 cx->promotion.state;
488 goto end;
489 }
490 } else {
491 next_state = cx->promotion.state;
492 goto end;
493 }
494 }
495 }
496 }
497
498 /*
499 * Demotion?
500 * ---------
501 * Track the number of shorts (time asleep is less than time threshold)
502 * and demote when the usage threshold is reached.
503 */
504 if (cx->demotion.state) {
505 if (sleep_ticks < cx->demotion.threshold.ticks) {
506 cx->demotion.count++;
507 cx->promotion.count = 0;
508 if (cx->demotion.count >= cx->demotion.threshold.count) {
509 next_state = cx->demotion.state;
510 goto end;
511 }
512 }
513 }
514
515 end:
516 /*
517 * Demote if current state exceeds max_cstate
518 * or if the latency of the current state is unacceptable
519 */
520 if ((pr->power.state - pr->power.states) > max_cstate ||
521 pr->power.state->latency > system_latency_constraint()) {
522 if (cx->demotion.state)
523 next_state = cx->demotion.state;
524 }
525
526 /*
527 * New Cx State?
528 * -------------
529 * If we're going to start using a new Cx state we must clean up
530 * from the previous and prepare to use the new.
531 */
532 if (next_state != pr->power.state)
533 acpi_processor_power_activate(pr, next_state);
534 }
535
536 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
537 {
538 unsigned int i;
539 unsigned int state_is_set = 0;
540 struct acpi_processor_cx *lower = NULL;
541 struct acpi_processor_cx *higher = NULL;
542 struct acpi_processor_cx *cx;
543
544
545 if (!pr)
546 return -EINVAL;
547
548 /*
549 * This function sets the default Cx state policy (OS idle handler).
550 * Our scheme is to promote quickly to C2 but more conservatively
551 * to C3. We're favoring C2 for its characteristics of low latency
552 * (quick response), good power savings, and ability to allow bus
553 * mastering activity. Note that the Cx state policy is completely
554 * customizable and can be altered dynamically.
555 */
556
557 /* startup state */
558 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
559 cx = &pr->power.states[i];
560 if (!cx->valid)
561 continue;
562
563 if (!state_is_set)
564 pr->power.state = cx;
565 state_is_set++;
566 break;
567 }
568
569 if (!state_is_set)
570 return -ENODEV;
571
572 /* demotion */
573 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
574 cx = &pr->power.states[i];
575 if (!cx->valid)
576 continue;
577
578 if (lower) {
579 cx->demotion.state = lower;
580 cx->demotion.threshold.ticks = cx->latency_ticks;
581 cx->demotion.threshold.count = 1;
582 if (cx->type == ACPI_STATE_C3)
583 cx->demotion.threshold.bm = bm_history;
584 }
585
586 lower = cx;
587 }
588
589 /* promotion */
590 for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
591 cx = &pr->power.states[i];
592 if (!cx->valid)
593 continue;
594
595 if (higher) {
596 cx->promotion.state = higher;
597 cx->promotion.threshold.ticks = cx->latency_ticks;
598 if (cx->type >= ACPI_STATE_C2)
599 cx->promotion.threshold.count = 4;
600 else
601 cx->promotion.threshold.count = 10;
602 if (higher->type == ACPI_STATE_C3)
603 cx->promotion.threshold.bm = bm_history;
604 }
605
606 higher = cx;
607 }
608
609 return 0;
610 }
611
612 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
613 {
614
615 if (!pr)
616 return -EINVAL;
617
618 if (!pr->pblk)
619 return -ENODEV;
620
621 /* if info is obtained from pblk/fadt, type equals state */
622 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
623 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
624
625 #ifndef CONFIG_HOTPLUG_CPU
626 /*
627 * Check for P_LVL2_UP flag before entering C2 and above on
628 * an SMP system.
629 */
630 if ((num_online_cpus() > 1) && !acpi_fadt.plvl2_up)
631 return -ENODEV;
632 #endif
633
634 /* determine C2 and C3 address from pblk */
635 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
636 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
637
638 /* determine latencies from FADT */
639 pr->power.states[ACPI_STATE_C2].latency = acpi_fadt.plvl2_lat;
640 pr->power.states[ACPI_STATE_C3].latency = acpi_fadt.plvl3_lat;
641
642 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
643 "lvl2[0x%08x] lvl3[0x%08x]\n",
644 pr->power.states[ACPI_STATE_C2].address,
645 pr->power.states[ACPI_STATE_C3].address));
646
647 return 0;
648 }
649
650 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
651 {
652 if (!pr->power.states[ACPI_STATE_C1].valid) {
653 /* set the first C-State to C1 */
654 /* all processors need to support C1 */
655 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
656 pr->power.states[ACPI_STATE_C1].valid = 1;
657 }
658 /* the C0 state only exists as a filler in our array */
659 pr->power.states[ACPI_STATE_C0].valid = 1;
660 return 0;
661 }
662
663 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
664 {
665 acpi_status status = 0;
666 acpi_integer count;
667 int current_count;
668 int i;
669 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
670 union acpi_object *cst;
671
672
673 if (nocst)
674 return -ENODEV;
675
676 current_count = 0;
677
678 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
679 if (ACPI_FAILURE(status)) {
680 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
681 return -ENODEV;
682 }
683
684 cst = buffer.pointer;
685
686 /* There must be at least 2 elements */
687 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
688 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
689 status = -EFAULT;
690 goto end;
691 }
692
693 count = cst->package.elements[0].integer.value;
694
695 /* Validate number of power states. */
696 if (count < 1 || count != cst->package.count - 1) {
697 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
698 status = -EFAULT;
699 goto end;
700 }
701
702 /* Tell driver that at least _CST is supported. */
703 pr->flags.has_cst = 1;
704
705 for (i = 1; i <= count; i++) {
706 union acpi_object *element;
707 union acpi_object *obj;
708 struct acpi_power_register *reg;
709 struct acpi_processor_cx cx;
710
711 memset(&cx, 0, sizeof(cx));
712
713 element = &(cst->package.elements[i]);
714 if (element->type != ACPI_TYPE_PACKAGE)
715 continue;
716
717 if (element->package.count != 4)
718 continue;
719
720 obj = &(element->package.elements[0]);
721
722 if (obj->type != ACPI_TYPE_BUFFER)
723 continue;
724
725 reg = (struct acpi_power_register *)obj->buffer.pointer;
726
727 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
728 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
729 continue;
730
731 /* There should be an easy way to extract an integer... */
732 obj = &(element->package.elements[1]);
733 if (obj->type != ACPI_TYPE_INTEGER)
734 continue;
735
736 cx.type = obj->integer.value;
737 /*
738 * Some buggy BIOSes won't list C1 in _CST -
739 * Let acpi_processor_get_power_info_default() handle them later
740 */
741 if (i == 1 && cx.type != ACPI_STATE_C1)
742 current_count++;
743
744 cx.address = reg->address;
745 cx.index = current_count + 1;
746
747 cx.space_id = ACPI_CSTATE_SYSTEMIO;
748 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
749 if (acpi_processor_ffh_cstate_probe
750 (pr->id, &cx, reg) == 0) {
751 cx.space_id = ACPI_CSTATE_FFH;
752 } else if (cx.type != ACPI_STATE_C1) {
753 /*
754 * C1 is a special case where FIXED_HARDWARE
755 * can be handled in non-MWAIT way as well.
756 * In that case, save this _CST entry info.
757 * That is, we retain space_id of SYSTEM_IO for
758 * halt based C1.
759 * Otherwise, ignore this info and continue.
760 */
761 continue;
762 }
763 }
764
765 obj = &(element->package.elements[2]);
766 if (obj->type != ACPI_TYPE_INTEGER)
767 continue;
768
769 cx.latency = obj->integer.value;
770
771 obj = &(element->package.elements[3]);
772 if (obj->type != ACPI_TYPE_INTEGER)
773 continue;
774
775 cx.power = obj->integer.value;
776
777 current_count++;
778 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
779
780 /*
781 * We support total ACPI_PROCESSOR_MAX_POWER - 1
782 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
783 */
784 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
785 printk(KERN_WARNING
786 "Limiting number of power states to max (%d)\n",
787 ACPI_PROCESSOR_MAX_POWER);
788 printk(KERN_WARNING
789 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
790 break;
791 }
792 }
793
794 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
795 current_count));
796
797 /* Validate number of power states discovered */
798 if (current_count < 2)
799 status = -EFAULT;
800
801 end:
802 kfree(buffer.pointer);
803
804 return status;
805 }
806
807 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
808 {
809
810 if (!cx->address)
811 return;
812
813 /*
814 * C2 latency must be less than or equal to 100
815 * microseconds.
816 */
817 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
818 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
819 "latency too large [%d]\n", cx->latency));
820 return;
821 }
822
823 /*
824 * Otherwise we've met all of our C2 requirements.
825 * Normalize the C2 latency to expidite policy
826 */
827 cx->valid = 1;
828 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
829
830 return;
831 }
832
833 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
834 struct acpi_processor_cx *cx)
835 {
836 static int bm_check_flag;
837
838
839 if (!cx->address)
840 return;
841
842 /*
843 * C3 latency must be less than or equal to 1000
844 * microseconds.
845 */
846 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
847 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
848 "latency too large [%d]\n", cx->latency));
849 return;
850 }
851
852 /*
853 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
854 * DMA transfers are used by any ISA device to avoid livelock.
855 * Note that we could disable Type-F DMA (as recommended by
856 * the erratum), but this is known to disrupt certain ISA
857 * devices thus we take the conservative approach.
858 */
859 else if (errata.piix4.fdma) {
860 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
861 "C3 not supported on PIIX4 with Type-F DMA\n"));
862 return;
863 }
864
865 /* All the logic here assumes flags.bm_check is same across all CPUs */
866 if (!bm_check_flag) {
867 /* Determine whether bm_check is needed based on CPU */
868 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
869 bm_check_flag = pr->flags.bm_check;
870 } else {
871 pr->flags.bm_check = bm_check_flag;
872 }
873
874 if (pr->flags.bm_check) {
875 /* bus mastering control is necessary */
876 if (!pr->flags.bm_control) {
877 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
878 "C3 support requires bus mastering control\n"));
879 return;
880 }
881 } else {
882 /*
883 * WBINVD should be set in fadt, for C3 state to be
884 * supported on when bm_check is not required.
885 */
886 if (acpi_fadt.wb_invd != 1) {
887 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
888 "Cache invalidation should work properly"
889 " for C3 to be enabled on SMP systems\n"));
890 return;
891 }
892 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
893 0, ACPI_MTX_DO_NOT_LOCK);
894 }
895
896 /*
897 * Otherwise we've met all of our C3 requirements.
898 * Normalize the C3 latency to expidite policy. Enable
899 * checking of bus mastering status (bm_check) so we can
900 * use this in our C3 policy
901 */
902 cx->valid = 1;
903 cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
904
905 return;
906 }
907
908 static int acpi_processor_power_verify(struct acpi_processor *pr)
909 {
910 unsigned int i;
911 unsigned int working = 0;
912
913 #ifdef ARCH_APICTIMER_STOPS_ON_C3
914 int timer_broadcast = 0;
915 cpumask_t mask = cpumask_of_cpu(pr->id);
916 on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1);
917 #endif
918
919 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
920 struct acpi_processor_cx *cx = &pr->power.states[i];
921
922 switch (cx->type) {
923 case ACPI_STATE_C1:
924 cx->valid = 1;
925 break;
926
927 case ACPI_STATE_C2:
928 acpi_processor_power_verify_c2(cx);
929 #ifdef ARCH_APICTIMER_STOPS_ON_C3
930 /* Some AMD systems fake C3 as C2, but still
931 have timer troubles */
932 if (cx->valid &&
933 boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
934 timer_broadcast++;
935 #endif
936 break;
937
938 case ACPI_STATE_C3:
939 acpi_processor_power_verify_c3(pr, cx);
940 #ifdef ARCH_APICTIMER_STOPS_ON_C3
941 if (cx->valid)
942 timer_broadcast++;
943 #endif
944 break;
945 }
946
947 if (cx->valid)
948 working++;
949 }
950
951 #ifdef ARCH_APICTIMER_STOPS_ON_C3
952 if (timer_broadcast)
953 on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1);
954 #endif
955
956 return (working);
957 }
958
959 static int acpi_processor_get_power_info(struct acpi_processor *pr)
960 {
961 unsigned int i;
962 int result;
963
964
965 /* NOTE: the idle thread may not be running while calling
966 * this function */
967
968 /* Zero initialize all the C-states info. */
969 memset(pr->power.states, 0, sizeof(pr->power.states));
970
971 result = acpi_processor_get_power_info_cst(pr);
972 if (result == -ENODEV)
973 result = acpi_processor_get_power_info_fadt(pr);
974
975 if (result)
976 return result;
977
978 acpi_processor_get_power_info_default(pr);
979
980 pr->power.count = acpi_processor_power_verify(pr);
981
982 /*
983 * Set Default Policy
984 * ------------------
985 * Now that we know which states are supported, set the default
986 * policy. Note that this policy can be changed dynamically
987 * (e.g. encourage deeper sleeps to conserve battery life when
988 * not on AC).
989 */
990 result = acpi_processor_set_power_policy(pr);
991 if (result)
992 return result;
993
994 /*
995 * if one state of type C2 or C3 is available, mark this
996 * CPU as being "idle manageable"
997 */
998 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
999 if (pr->power.states[i].valid) {
1000 pr->power.count = i;
1001 if (pr->power.states[i].type >= ACPI_STATE_C2)
1002 pr->flags.power = 1;
1003 }
1004 }
1005
1006 return 0;
1007 }
1008
1009 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1010 {
1011 int result = 0;
1012
1013
1014 if (!pr)
1015 return -EINVAL;
1016
1017 if (nocst) {
1018 return -ENODEV;
1019 }
1020
1021 if (!pr->flags.power_setup_done)
1022 return -ENODEV;
1023
1024 /* Fall back to the default idle loop */
1025 pm_idle = pm_idle_save;
1026 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1027
1028 pr->flags.power = 0;
1029 result = acpi_processor_get_power_info(pr);
1030 if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1031 pm_idle = acpi_processor_idle;
1032
1033 return result;
1034 }
1035
1036 /* proc interface */
1037
1038 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1039 {
1040 struct acpi_processor *pr = seq->private;
1041 unsigned int i;
1042
1043
1044 if (!pr)
1045 goto end;
1046
1047 seq_printf(seq, "active state: C%zd\n"
1048 "max_cstate: C%d\n"
1049 "bus master activity: %08x\n"
1050 "maximum allowed latency: %d usec\n",
1051 pr->power.state ? pr->power.state - pr->power.states : 0,
1052 max_cstate, (unsigned)pr->power.bm_activity,
1053 system_latency_constraint());
1054
1055 seq_puts(seq, "states:\n");
1056
1057 for (i = 1; i <= pr->power.count; i++) {
1058 seq_printf(seq, " %cC%d: ",
1059 (&pr->power.states[i] ==
1060 pr->power.state ? '*' : ' '), i);
1061
1062 if (!pr->power.states[i].valid) {
1063 seq_puts(seq, "<not supported>\n");
1064 continue;
1065 }
1066
1067 switch (pr->power.states[i].type) {
1068 case ACPI_STATE_C1:
1069 seq_printf(seq, "type[C1] ");
1070 break;
1071 case ACPI_STATE_C2:
1072 seq_printf(seq, "type[C2] ");
1073 break;
1074 case ACPI_STATE_C3:
1075 seq_printf(seq, "type[C3] ");
1076 break;
1077 default:
1078 seq_printf(seq, "type[--] ");
1079 break;
1080 }
1081
1082 if (pr->power.states[i].promotion.state)
1083 seq_printf(seq, "promotion[C%zd] ",
1084 (pr->power.states[i].promotion.state -
1085 pr->power.states));
1086 else
1087 seq_puts(seq, "promotion[--] ");
1088
1089 if (pr->power.states[i].demotion.state)
1090 seq_printf(seq, "demotion[C%zd] ",
1091 (pr->power.states[i].demotion.state -
1092 pr->power.states));
1093 else
1094 seq_puts(seq, "demotion[--] ");
1095
1096 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1097 pr->power.states[i].latency,
1098 pr->power.states[i].usage,
1099 pr->power.states[i].time);
1100 }
1101
1102 end:
1103 return 0;
1104 }
1105
1106 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1107 {
1108 return single_open(file, acpi_processor_power_seq_show,
1109 PDE(inode)->data);
1110 }
1111
1112 static const struct file_operations acpi_processor_power_fops = {
1113 .open = acpi_processor_power_open_fs,
1114 .read = seq_read,
1115 .llseek = seq_lseek,
1116 .release = single_release,
1117 };
1118
1119 #ifdef CONFIG_SMP
1120 static void smp_callback(void *v)
1121 {
1122 /* we already woke the CPU up, nothing more to do */
1123 }
1124
1125 /*
1126 * This function gets called when a part of the kernel has a new latency
1127 * requirement. This means we need to get all processors out of their C-state,
1128 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1129 * wakes them all right up.
1130 */
1131 static int acpi_processor_latency_notify(struct notifier_block *b,
1132 unsigned long l, void *v)
1133 {
1134 smp_call_function(smp_callback, NULL, 0, 1);
1135 return NOTIFY_OK;
1136 }
1137
1138 static struct notifier_block acpi_processor_latency_notifier = {
1139 .notifier_call = acpi_processor_latency_notify,
1140 };
1141 #endif
1142
1143 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1144 struct acpi_device *device)
1145 {
1146 acpi_status status = 0;
1147 static int first_run;
1148 struct proc_dir_entry *entry = NULL;
1149 unsigned int i;
1150
1151
1152 if (!first_run) {
1153 dmi_check_system(processor_power_dmi_table);
1154 if (max_cstate < ACPI_C_STATES_MAX)
1155 printk(KERN_NOTICE
1156 "ACPI: processor limited to max C-state %d\n",
1157 max_cstate);
1158 first_run++;
1159 #ifdef CONFIG_SMP
1160 register_latency_notifier(&acpi_processor_latency_notifier);
1161 #endif
1162 }
1163
1164 if (!pr)
1165 return -EINVAL;
1166
1167 if (acpi_fadt.cst_cnt && !nocst) {
1168 status =
1169 acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
1170 if (ACPI_FAILURE(status)) {
1171 ACPI_EXCEPTION((AE_INFO, status,
1172 "Notifying BIOS of _CST ability failed"));
1173 }
1174 }
1175
1176 acpi_processor_get_power_info(pr);
1177
1178 /*
1179 * Install the idle handler if processor power management is supported.
1180 * Note that we use previously set idle handler will be used on
1181 * platforms that only support C1.
1182 */
1183 if ((pr->flags.power) && (!boot_option_idle_override)) {
1184 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1185 for (i = 1; i <= pr->power.count; i++)
1186 if (pr->power.states[i].valid)
1187 printk(" C%d[C%d]", i,
1188 pr->power.states[i].type);
1189 printk(")\n");
1190
1191 if (pr->id == 0) {
1192 pm_idle_save = pm_idle;
1193 pm_idle = acpi_processor_idle;
1194 }
1195 }
1196
1197 /* 'power' [R] */
1198 entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1199 S_IRUGO, acpi_device_dir(device));
1200 if (!entry)
1201 return -EIO;
1202 else {
1203 entry->proc_fops = &acpi_processor_power_fops;
1204 entry->data = acpi_driver_data(device);
1205 entry->owner = THIS_MODULE;
1206 }
1207
1208 pr->flags.power_setup_done = 1;
1209
1210 return 0;
1211 }
1212
1213 int acpi_processor_power_exit(struct acpi_processor *pr,
1214 struct acpi_device *device)
1215 {
1216
1217 pr->flags.power_setup_done = 0;
1218
1219 if (acpi_device_dir(device))
1220 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1221 acpi_device_dir(device));
1222
1223 /* Unregister the idle handler when processor #0 is removed. */
1224 if (pr->id == 0) {
1225 pm_idle = pm_idle_save;
1226
1227 /*
1228 * We are about to unload the current idle thread pm callback
1229 * (pm_idle), Wait for all processors to update cached/local
1230 * copies of pm_idle before proceeding.
1231 */
1232 cpu_idle_wait();
1233 #ifdef CONFIG_SMP
1234 unregister_latency_notifier(&acpi_processor_latency_notifier);
1235 #endif
1236 }
1237
1238 return 0;
1239 }