Merge tag 'pci-v3.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / pci / common.c
1 /*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12 #include <linux/slab.h>
13
14 #include <asm-generic/pci-bridge.h>
15 #include <asm/acpi.h>
16 #include <asm/segment.h>
17 #include <asm/io.h>
18 #include <asm/smp.h>
19 #include <asm/pci_x86.h>
20 #include <asm/setup.h>
21
22 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
23 PCI_PROBE_MMCONF;
24
25 unsigned int pci_early_dump_regs;
26 static int pci_bf_sort;
27 static int smbios_type_b1_flag;
28 int pci_routeirq;
29 int noioapicquirk;
30 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
31 int noioapicreroute = 0;
32 #else
33 int noioapicreroute = 1;
34 #endif
35 int pcibios_last_bus = -1;
36 unsigned long pirq_table_addr;
37 const struct pci_raw_ops *__read_mostly raw_pci_ops;
38 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
39
40 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
41 int reg, int len, u32 *val)
42 {
43 if (domain == 0 && reg < 256 && raw_pci_ops)
44 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
45 if (raw_pci_ext_ops)
46 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
47 return -EINVAL;
48 }
49
50 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
51 int reg, int len, u32 val)
52 {
53 if (domain == 0 && reg < 256 && raw_pci_ops)
54 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
55 if (raw_pci_ext_ops)
56 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
57 return -EINVAL;
58 }
59
60 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
61 {
62 return raw_pci_read(pci_domain_nr(bus), bus->number,
63 devfn, where, size, value);
64 }
65
66 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
67 {
68 return raw_pci_write(pci_domain_nr(bus), bus->number,
69 devfn, where, size, value);
70 }
71
72 struct pci_ops pci_root_ops = {
73 .read = pci_read,
74 .write = pci_write,
75 };
76
77 /*
78 * This interrupt-safe spinlock protects all accesses to PCI
79 * configuration space.
80 */
81 DEFINE_RAW_SPINLOCK(pci_config_lock);
82
83 static int can_skip_ioresource_align(const struct dmi_system_id *d)
84 {
85 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
86 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
87 return 0;
88 }
89
90 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] = {
91 /*
92 * Systems where PCI IO resource ISA alignment can be skipped
93 * when the ISA enable bit in the bridge control is not set
94 */
95 {
96 .callback = can_skip_ioresource_align,
97 .ident = "IBM System x3800",
98 .matches = {
99 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
100 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
101 },
102 },
103 {
104 .callback = can_skip_ioresource_align,
105 .ident = "IBM System x3850",
106 .matches = {
107 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
108 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
109 },
110 },
111 {
112 .callback = can_skip_ioresource_align,
113 .ident = "IBM System x3950",
114 .matches = {
115 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
116 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
117 },
118 },
119 {}
120 };
121
122 void __init dmi_check_skip_isa_align(void)
123 {
124 dmi_check_system(can_skip_pciprobe_dmi_table);
125 }
126
127 static void pcibios_fixup_device_resources(struct pci_dev *dev)
128 {
129 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
130 struct resource *bar_r;
131 int bar;
132
133 if (pci_probe & PCI_NOASSIGN_BARS) {
134 /*
135 * If the BIOS did not assign the BAR, zero out the
136 * resource so the kernel doesn't attmept to assign
137 * it later on in pci_assign_unassigned_resources
138 */
139 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
140 bar_r = &dev->resource[bar];
141 if (bar_r->start == 0 && bar_r->end != 0) {
142 bar_r->flags = 0;
143 bar_r->end = 0;
144 }
145 }
146 }
147
148 if (pci_probe & PCI_NOASSIGN_ROMS) {
149 if (rom_r->parent)
150 return;
151 if (rom_r->start) {
152 /* we deal with BIOS assigned ROM later */
153 return;
154 }
155 rom_r->start = rom_r->end = rom_r->flags = 0;
156 }
157 }
158
159 /*
160 * Called after each bus is probed, but before its children
161 * are examined.
162 */
163
164 void pcibios_fixup_bus(struct pci_bus *b)
165 {
166 struct pci_dev *dev;
167
168 pci_read_bridge_bases(b);
169 list_for_each_entry(dev, &b->devices, bus_list)
170 pcibios_fixup_device_resources(dev);
171 }
172
173 /*
174 * Only use DMI information to set this if nothing was passed
175 * on the kernel command line (which was parsed earlier).
176 */
177
178 static int set_bf_sort(const struct dmi_system_id *d)
179 {
180 if (pci_bf_sort == pci_bf_sort_default) {
181 pci_bf_sort = pci_dmi_bf;
182 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
183 }
184 return 0;
185 }
186
187 static void read_dmi_type_b1(const struct dmi_header *dm,
188 void *private_data)
189 {
190 u8 *d = (u8 *)dm + 4;
191
192 if (dm->type != 0xB1)
193 return;
194 switch (((*(u32 *)d) >> 9) & 0x03) {
195 case 0x00:
196 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
197 break;
198 case 0x01: /* set pci=bfsort */
199 smbios_type_b1_flag = 1;
200 break;
201 case 0x02: /* do not set pci=bfsort */
202 smbios_type_b1_flag = 2;
203 break;
204 default:
205 break;
206 }
207 }
208
209 static int find_sort_method(const struct dmi_system_id *d)
210 {
211 dmi_walk(read_dmi_type_b1, NULL);
212
213 if (smbios_type_b1_flag == 1) {
214 set_bf_sort(d);
215 return 0;
216 }
217 return -1;
218 }
219
220 /*
221 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
222 */
223 #ifdef __i386__
224 static int assign_all_busses(const struct dmi_system_id *d)
225 {
226 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
227 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
228 " (pci=assign-busses)\n", d->ident);
229 return 0;
230 }
231 #endif
232
233 static int set_scan_all(const struct dmi_system_id *d)
234 {
235 printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
236 d->ident);
237 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
238 return 0;
239 }
240
241 static const struct dmi_system_id pciprobe_dmi_table[] = {
242 #ifdef __i386__
243 /*
244 * Laptops which need pci=assign-busses to see Cardbus cards
245 */
246 {
247 .callback = assign_all_busses,
248 .ident = "Samsung X20 Laptop",
249 .matches = {
250 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
251 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
252 },
253 },
254 #endif /* __i386__ */
255 {
256 .callback = set_bf_sort,
257 .ident = "Dell PowerEdge 1950",
258 .matches = {
259 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
260 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
261 },
262 },
263 {
264 .callback = set_bf_sort,
265 .ident = "Dell PowerEdge 1955",
266 .matches = {
267 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
268 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
269 },
270 },
271 {
272 .callback = set_bf_sort,
273 .ident = "Dell PowerEdge 2900",
274 .matches = {
275 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
276 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
277 },
278 },
279 {
280 .callback = set_bf_sort,
281 .ident = "Dell PowerEdge 2950",
282 .matches = {
283 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
284 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
285 },
286 },
287 {
288 .callback = set_bf_sort,
289 .ident = "Dell PowerEdge R900",
290 .matches = {
291 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
292 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
293 },
294 },
295 {
296 .callback = find_sort_method,
297 .ident = "Dell System",
298 .matches = {
299 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
300 },
301 },
302 {
303 .callback = set_bf_sort,
304 .ident = "HP ProLiant BL20p G3",
305 .matches = {
306 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
307 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
308 },
309 },
310 {
311 .callback = set_bf_sort,
312 .ident = "HP ProLiant BL20p G4",
313 .matches = {
314 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
315 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
316 },
317 },
318 {
319 .callback = set_bf_sort,
320 .ident = "HP ProLiant BL30p G1",
321 .matches = {
322 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
323 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
324 },
325 },
326 {
327 .callback = set_bf_sort,
328 .ident = "HP ProLiant BL25p G1",
329 .matches = {
330 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
331 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
332 },
333 },
334 {
335 .callback = set_bf_sort,
336 .ident = "HP ProLiant BL35p G1",
337 .matches = {
338 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
339 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
340 },
341 },
342 {
343 .callback = set_bf_sort,
344 .ident = "HP ProLiant BL45p G1",
345 .matches = {
346 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
347 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
348 },
349 },
350 {
351 .callback = set_bf_sort,
352 .ident = "HP ProLiant BL45p G2",
353 .matches = {
354 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
355 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
356 },
357 },
358 {
359 .callback = set_bf_sort,
360 .ident = "HP ProLiant BL460c G1",
361 .matches = {
362 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
363 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
364 },
365 },
366 {
367 .callback = set_bf_sort,
368 .ident = "HP ProLiant BL465c G1",
369 .matches = {
370 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
371 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
372 },
373 },
374 {
375 .callback = set_bf_sort,
376 .ident = "HP ProLiant BL480c G1",
377 .matches = {
378 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
379 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
380 },
381 },
382 {
383 .callback = set_bf_sort,
384 .ident = "HP ProLiant BL685c G1",
385 .matches = {
386 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
387 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
388 },
389 },
390 {
391 .callback = set_bf_sort,
392 .ident = "HP ProLiant DL360",
393 .matches = {
394 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
395 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
396 },
397 },
398 {
399 .callback = set_bf_sort,
400 .ident = "HP ProLiant DL380",
401 .matches = {
402 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
403 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
404 },
405 },
406 #ifdef __i386__
407 {
408 .callback = assign_all_busses,
409 .ident = "Compaq EVO N800c",
410 .matches = {
411 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
412 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
413 },
414 },
415 #endif
416 {
417 .callback = set_bf_sort,
418 .ident = "HP ProLiant DL385 G2",
419 .matches = {
420 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
421 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
422 },
423 },
424 {
425 .callback = set_bf_sort,
426 .ident = "HP ProLiant DL585 G2",
427 .matches = {
428 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
429 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
430 },
431 },
432 {
433 .callback = set_scan_all,
434 .ident = "Stratus/NEC ftServer",
435 .matches = {
436 DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
437 DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
438 },
439 },
440 {}
441 };
442
443 void __init dmi_check_pciprobe(void)
444 {
445 dmi_check_system(pciprobe_dmi_table);
446 }
447
448 struct pci_bus *pcibios_scan_root(int busnum)
449 {
450 struct pci_bus *bus = NULL;
451
452 while ((bus = pci_find_next_bus(bus)) != NULL) {
453 if (bus->number == busnum) {
454 /* Already scanned */
455 return bus;
456 }
457 }
458
459 return pci_scan_bus_on_node(busnum, &pci_root_ops,
460 get_mp_bus_to_node(busnum));
461 }
462
463 void __init pcibios_set_cache_line_size(void)
464 {
465 struct cpuinfo_x86 *c = &boot_cpu_data;
466
467 /*
468 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
469 * (For older CPUs that don't support cpuid, we se it to 32 bytes
470 * It's also good for 386/486s (which actually have 16)
471 * as quite a few PCI devices do not support smaller values.
472 */
473 if (c->x86_clflush_size > 0) {
474 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
475 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
476 pci_dfl_cache_line_size << 2);
477 } else {
478 pci_dfl_cache_line_size = 32 >> 2;
479 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
480 }
481 }
482
483 int __init pcibios_init(void)
484 {
485 if (!raw_pci_ops) {
486 printk(KERN_WARNING "PCI: System does not support PCI\n");
487 return 0;
488 }
489
490 pcibios_set_cache_line_size();
491 pcibios_resource_survey();
492
493 if (pci_bf_sort >= pci_force_bf)
494 pci_sort_breadthfirst();
495 return 0;
496 }
497
498 char * __init pcibios_setup(char *str)
499 {
500 if (!strcmp(str, "off")) {
501 pci_probe = 0;
502 return NULL;
503 } else if (!strcmp(str, "bfsort")) {
504 pci_bf_sort = pci_force_bf;
505 return NULL;
506 } else if (!strcmp(str, "nobfsort")) {
507 pci_bf_sort = pci_force_nobf;
508 return NULL;
509 }
510 #ifdef CONFIG_PCI_BIOS
511 else if (!strcmp(str, "bios")) {
512 pci_probe = PCI_PROBE_BIOS;
513 return NULL;
514 } else if (!strcmp(str, "nobios")) {
515 pci_probe &= ~PCI_PROBE_BIOS;
516 return NULL;
517 } else if (!strcmp(str, "biosirq")) {
518 pci_probe |= PCI_BIOS_IRQ_SCAN;
519 return NULL;
520 } else if (!strncmp(str, "pirqaddr=", 9)) {
521 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
522 return NULL;
523 }
524 #endif
525 #ifdef CONFIG_PCI_DIRECT
526 else if (!strcmp(str, "conf1")) {
527 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
528 return NULL;
529 }
530 else if (!strcmp(str, "conf2")) {
531 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
532 return NULL;
533 }
534 #endif
535 #ifdef CONFIG_PCI_MMCONFIG
536 else if (!strcmp(str, "nommconf")) {
537 pci_probe &= ~PCI_PROBE_MMCONF;
538 return NULL;
539 }
540 else if (!strcmp(str, "check_enable_amd_mmconf")) {
541 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
542 return NULL;
543 }
544 #endif
545 else if (!strcmp(str, "noacpi")) {
546 acpi_noirq_set();
547 return NULL;
548 }
549 else if (!strcmp(str, "noearly")) {
550 pci_probe |= PCI_PROBE_NOEARLY;
551 return NULL;
552 }
553 #ifndef CONFIG_X86_VISWS
554 else if (!strcmp(str, "usepirqmask")) {
555 pci_probe |= PCI_USE_PIRQ_MASK;
556 return NULL;
557 } else if (!strncmp(str, "irqmask=", 8)) {
558 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
559 return NULL;
560 } else if (!strncmp(str, "lastbus=", 8)) {
561 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
562 return NULL;
563 }
564 #endif
565 else if (!strcmp(str, "rom")) {
566 pci_probe |= PCI_ASSIGN_ROMS;
567 return NULL;
568 } else if (!strcmp(str, "norom")) {
569 pci_probe |= PCI_NOASSIGN_ROMS;
570 return NULL;
571 } else if (!strcmp(str, "nobar")) {
572 pci_probe |= PCI_NOASSIGN_BARS;
573 return NULL;
574 } else if (!strcmp(str, "assign-busses")) {
575 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
576 return NULL;
577 } else if (!strcmp(str, "use_crs")) {
578 pci_probe |= PCI_USE__CRS;
579 return NULL;
580 } else if (!strcmp(str, "nocrs")) {
581 pci_probe |= PCI_ROOT_NO_CRS;
582 return NULL;
583 } else if (!strcmp(str, "earlydump")) {
584 pci_early_dump_regs = 1;
585 return NULL;
586 } else if (!strcmp(str, "routeirq")) {
587 pci_routeirq = 1;
588 return NULL;
589 } else if (!strcmp(str, "skip_isa_align")) {
590 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
591 return NULL;
592 } else if (!strcmp(str, "noioapicquirk")) {
593 noioapicquirk = 1;
594 return NULL;
595 } else if (!strcmp(str, "ioapicreroute")) {
596 if (noioapicreroute != -1)
597 noioapicreroute = 0;
598 return NULL;
599 } else if (!strcmp(str, "noioapicreroute")) {
600 if (noioapicreroute != -1)
601 noioapicreroute = 1;
602 return NULL;
603 }
604 return str;
605 }
606
607 unsigned int pcibios_assign_all_busses(void)
608 {
609 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
610 }
611
612 int pcibios_add_device(struct pci_dev *dev)
613 {
614 struct setup_data *data;
615 struct pci_setup_rom *rom;
616 u64 pa_data;
617
618 pa_data = boot_params.hdr.setup_data;
619 while (pa_data) {
620 data = phys_to_virt(pa_data);
621
622 if (data->type == SETUP_PCI) {
623 rom = (struct pci_setup_rom *)data;
624
625 if ((pci_domain_nr(dev->bus) == rom->segment) &&
626 (dev->bus->number == rom->bus) &&
627 (PCI_SLOT(dev->devfn) == rom->device) &&
628 (PCI_FUNC(dev->devfn) == rom->function) &&
629 (dev->vendor == rom->vendor) &&
630 (dev->device == rom->devid)) {
631 dev->rom = pa_data +
632 offsetof(struct pci_setup_rom, romdata);
633 dev->romlen = rom->pcilen;
634 }
635 }
636 pa_data = data->next;
637 }
638 return 0;
639 }
640
641 int pcibios_enable_device(struct pci_dev *dev, int mask)
642 {
643 int err;
644
645 if ((err = pci_enable_resources(dev, mask)) < 0)
646 return err;
647
648 if (!pci_dev_msi_enabled(dev))
649 return pcibios_enable_irq(dev);
650 return 0;
651 }
652
653 void pcibios_disable_device (struct pci_dev *dev)
654 {
655 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
656 pcibios_disable_irq(dev);
657 }
658
659 int pci_ext_cfg_avail(void)
660 {
661 if (raw_pci_ext_ops)
662 return 1;
663 else
664 return 0;
665 }
666
667 struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
668 {
669 LIST_HEAD(resources);
670 struct pci_bus *bus = NULL;
671 struct pci_sysdata *sd;
672
673 /*
674 * Allocate per-root-bus (not per bus) arch-specific data.
675 * TODO: leak; this memory is never freed.
676 * It's arguable whether it's worth the trouble to care.
677 */
678 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
679 if (!sd) {
680 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
681 return NULL;
682 }
683 sd->node = node;
684 x86_pci_root_bus_resources(busno, &resources);
685 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);
686 bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
687 if (!bus) {
688 pci_free_resource_list(&resources);
689 kfree(sd);
690 }
691
692 return bus;
693 }
694
695 struct pci_bus *pci_scan_bus_with_sysdata(int busno)
696 {
697 return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
698 }
699
700 /*
701 * NUMA info for PCI busses
702 *
703 * Early arch code is responsible for filling in reasonable values here.
704 * A node id of "-1" means "use current node". In other words, if a bus
705 * has a -1 node id, it's not tightly coupled to any particular chunk
706 * of memory (as is the case on some Nehalem systems).
707 */
708 #ifdef CONFIG_NUMA
709
710 #define BUS_NR 256
711
712 #ifdef CONFIG_X86_64
713
714 static int mp_bus_to_node[BUS_NR] = {
715 [0 ... BUS_NR - 1] = -1
716 };
717
718 void set_mp_bus_to_node(int busnum, int node)
719 {
720 if (busnum >= 0 && busnum < BUS_NR)
721 mp_bus_to_node[busnum] = node;
722 }
723
724 int get_mp_bus_to_node(int busnum)
725 {
726 int node = -1;
727
728 if (busnum < 0 || busnum > (BUS_NR - 1))
729 return node;
730
731 node = mp_bus_to_node[busnum];
732
733 /*
734 * let numa_node_id to decide it later in dma_alloc_pages
735 * if there is no ram on that node
736 */
737 if (node != -1 && !node_online(node))
738 node = -1;
739
740 return node;
741 }
742
743 #else /* CONFIG_X86_32 */
744
745 static int mp_bus_to_node[BUS_NR] = {
746 [0 ... BUS_NR - 1] = -1
747 };
748
749 void set_mp_bus_to_node(int busnum, int node)
750 {
751 if (busnum >= 0 && busnum < BUS_NR)
752 mp_bus_to_node[busnum] = (unsigned char) node;
753 }
754
755 int get_mp_bus_to_node(int busnum)
756 {
757 int node;
758
759 if (busnum < 0 || busnum > (BUS_NR - 1))
760 return 0;
761 node = mp_bus_to_node[busnum];
762 return node;
763 }
764
765 #endif /* CONFIG_X86_32 */
766
767 #endif /* CONFIG_NUMA */