1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/slab.h>
8 #include <linux/hpet.h>
9 #include <linux/init.h>
10 #include <linux/cpu.h>
14 #include <asm/fixmap.h>
15 #include <asm/i8253.h>
18 #define HPET_MASK CLOCKSOURCE_MASK(32)
23 #define FSEC_PER_NSEC 1000000L
25 #define HPET_DEV_USED_BIT 2
26 #define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
27 #define HPET_DEV_VALID 0x8
28 #define HPET_DEV_FSB_CAP 0x1000
29 #define HPET_DEV_PERI_CAP 0x2000
31 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
34 * HPET address is set in acpi/boot.c, when an ACPI entry exists
36 unsigned long hpet_address
;
37 u8 hpet_blockid
; /* OS timer block num */
41 static unsigned long hpet_num_timers
;
43 static void __iomem
*hpet_virt_address
;
46 struct clock_event_device evt
;
54 inline unsigned int hpet_readl(unsigned int a
)
56 return readl(hpet_virt_address
+ a
);
59 static inline void hpet_writel(unsigned int d
, unsigned int a
)
61 writel(d
, hpet_virt_address
+ a
);
65 #include <asm/pgtable.h>
68 static inline void hpet_set_mapping(void)
70 hpet_virt_address
= ioremap_nocache(hpet_address
, HPET_MMAP_SIZE
);
72 __set_fixmap(VSYSCALL_HPET
, hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
76 static inline void hpet_clear_mapping(void)
78 iounmap(hpet_virt_address
);
79 hpet_virt_address
= NULL
;
83 * HPET command line enable / disable
85 static int boot_hpet_disable
;
87 static int hpet_verbose
;
89 static int __init
hpet_setup(char *str
)
92 if (!strncmp("disable", str
, 7))
93 boot_hpet_disable
= 1;
94 if (!strncmp("force", str
, 5))
96 if (!strncmp("verbose", str
, 7))
101 __setup("hpet=", hpet_setup
);
103 static int __init
disable_hpet(char *str
)
105 boot_hpet_disable
= 1;
108 __setup("nohpet", disable_hpet
);
110 static inline int is_hpet_capable(void)
112 return !boot_hpet_disable
&& hpet_address
;
116 * HPET timer interrupt enable / disable
118 static int hpet_legacy_int_enabled
;
121 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
123 int is_hpet_enabled(void)
125 return is_hpet_capable() && hpet_legacy_int_enabled
;
127 EXPORT_SYMBOL_GPL(is_hpet_enabled
);
129 static void _hpet_print_config(const char *function
, int line
)
132 printk(KERN_INFO
"hpet: %s(%d):\n", function
, line
);
133 l
= hpet_readl(HPET_ID
);
134 h
= hpet_readl(HPET_PERIOD
);
135 timers
= ((l
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
136 printk(KERN_INFO
"hpet: ID: 0x%x, PERIOD: 0x%x\n", l
, h
);
137 l
= hpet_readl(HPET_CFG
);
138 h
= hpet_readl(HPET_STATUS
);
139 printk(KERN_INFO
"hpet: CFG: 0x%x, STATUS: 0x%x\n", l
, h
);
140 l
= hpet_readl(HPET_COUNTER
);
141 h
= hpet_readl(HPET_COUNTER
+4);
142 printk(KERN_INFO
"hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l
, h
);
144 for (i
= 0; i
< timers
; i
++) {
145 l
= hpet_readl(HPET_Tn_CFG(i
));
146 h
= hpet_readl(HPET_Tn_CFG(i
)+4);
147 printk(KERN_INFO
"hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
149 l
= hpet_readl(HPET_Tn_CMP(i
));
150 h
= hpet_readl(HPET_Tn_CMP(i
)+4);
151 printk(KERN_INFO
"hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
153 l
= hpet_readl(HPET_Tn_ROUTE(i
));
154 h
= hpet_readl(HPET_Tn_ROUTE(i
)+4);
155 printk(KERN_INFO
"hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
160 #define hpet_print_config() \
163 _hpet_print_config(__FUNCTION__, __LINE__); \
167 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
168 * timer 0 and timer 1 in case of RTC emulation.
172 static void hpet_reserve_msi_timers(struct hpet_data
*hd
);
174 static void hpet_reserve_platform_timers(unsigned int id
)
176 struct hpet __iomem
*hpet
= hpet_virt_address
;
177 struct hpet_timer __iomem
*timer
= &hpet
->hpet_timers
[2];
178 unsigned int nrtimers
, i
;
181 nrtimers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
183 memset(&hd
, 0, sizeof(hd
));
184 hd
.hd_phys_address
= hpet_address
;
185 hd
.hd_address
= hpet
;
186 hd
.hd_nirqs
= nrtimers
;
187 hpet_reserve_timer(&hd
, 0);
189 #ifdef CONFIG_HPET_EMULATE_RTC
190 hpet_reserve_timer(&hd
, 1);
194 * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
195 * is wrong for i8259!) not the output IRQ. Many BIOS writers
196 * don't bother configuring *any* comparator interrupts.
198 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
199 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
201 for (i
= 2; i
< nrtimers
; timer
++, i
++) {
202 hd
.hd_irq
[i
] = (readl(&timer
->hpet_config
) &
203 Tn_INT_ROUTE_CNF_MASK
) >> Tn_INT_ROUTE_CNF_SHIFT
;
206 hpet_reserve_msi_timers(&hd
);
212 static void hpet_reserve_platform_timers(unsigned int id
) { }
218 static unsigned long hpet_period
;
220 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
221 struct clock_event_device
*evt
);
222 static int hpet_legacy_next_event(unsigned long delta
,
223 struct clock_event_device
*evt
);
226 * The hpet clock event device
228 static struct clock_event_device hpet_clockevent
= {
230 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
231 .set_mode
= hpet_legacy_set_mode
,
232 .set_next_event
= hpet_legacy_next_event
,
238 static void hpet_stop_counter(void)
240 unsigned long cfg
= hpet_readl(HPET_CFG
);
241 cfg
&= ~HPET_CFG_ENABLE
;
242 hpet_writel(cfg
, HPET_CFG
);
245 static void hpet_reset_counter(void)
247 hpet_writel(0, HPET_COUNTER
);
248 hpet_writel(0, HPET_COUNTER
+ 4);
251 static void hpet_start_counter(void)
253 unsigned int cfg
= hpet_readl(HPET_CFG
);
254 cfg
|= HPET_CFG_ENABLE
;
255 hpet_writel(cfg
, HPET_CFG
);
258 static void hpet_restart_counter(void)
261 hpet_reset_counter();
262 hpet_start_counter();
265 static void hpet_resume_device(void)
270 static void hpet_resume_counter(struct clocksource
*cs
)
272 hpet_resume_device();
273 hpet_restart_counter();
276 static void hpet_enable_legacy_int(void)
278 unsigned int cfg
= hpet_readl(HPET_CFG
);
280 cfg
|= HPET_CFG_LEGACY
;
281 hpet_writel(cfg
, HPET_CFG
);
282 hpet_legacy_int_enabled
= 1;
285 static void hpet_legacy_clockevent_register(void)
287 /* Start HPET legacy interrupts */
288 hpet_enable_legacy_int();
291 * The mult factor is defined as (include/linux/clockchips.h)
292 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
293 * hpet_period is in units of femtoseconds (per cycle), so
294 * mult/2^shift = cyc/ns = 10^6/hpet_period
295 * mult = (10^6 * 2^shift)/hpet_period
296 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
298 hpet_clockevent
.mult
= div_sc((unsigned long) FSEC_PER_NSEC
,
299 hpet_period
, hpet_clockevent
.shift
);
300 /* Calculate the min / max delta */
301 hpet_clockevent
.max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF,
303 /* 5 usec minimum reprogramming delta. */
304 hpet_clockevent
.min_delta_ns
= 5000;
307 * Start hpet with the boot cpu mask and make it
308 * global after the IO_APIC has been initialized.
310 hpet_clockevent
.cpumask
= cpumask_of(smp_processor_id());
311 clockevents_register_device(&hpet_clockevent
);
312 global_clock_event
= &hpet_clockevent
;
313 printk(KERN_DEBUG
"hpet clockevent registered\n");
316 static int hpet_setup_msi_irq(unsigned int irq
);
318 static void hpet_set_mode(enum clock_event_mode mode
,
319 struct clock_event_device
*evt
, int timer
)
321 unsigned int cfg
, cmp
, now
;
325 case CLOCK_EVT_MODE_PERIODIC
:
327 delta
= ((uint64_t)(NSEC_PER_SEC
/HZ
)) * evt
->mult
;
328 delta
>>= evt
->shift
;
329 now
= hpet_readl(HPET_COUNTER
);
330 cmp
= now
+ (unsigned int) delta
;
331 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
332 /* Make sure we use edge triggered interrupts */
333 cfg
&= ~HPET_TN_LEVEL
;
334 cfg
|= HPET_TN_ENABLE
| HPET_TN_PERIODIC
|
335 HPET_TN_SETVAL
| HPET_TN_32BIT
;
336 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
337 hpet_writel(cmp
, HPET_Tn_CMP(timer
));
340 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
341 * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
342 * bit is automatically cleared after the first write.
343 * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
344 * Publication # 24674)
346 hpet_writel((unsigned int) delta
, HPET_Tn_CMP(timer
));
347 hpet_start_counter();
351 case CLOCK_EVT_MODE_ONESHOT
:
352 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
353 cfg
&= ~HPET_TN_PERIODIC
;
354 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
355 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
358 case CLOCK_EVT_MODE_UNUSED
:
359 case CLOCK_EVT_MODE_SHUTDOWN
:
360 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
361 cfg
&= ~HPET_TN_ENABLE
;
362 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
365 case CLOCK_EVT_MODE_RESUME
:
367 hpet_enable_legacy_int();
369 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
370 hpet_setup_msi_irq(hdev
->irq
);
371 disable_irq(hdev
->irq
);
372 irq_set_affinity(hdev
->irq
, cpumask_of(hdev
->cpu
));
373 enable_irq(hdev
->irq
);
380 static int hpet_next_event(unsigned long delta
,
381 struct clock_event_device
*evt
, int timer
)
385 cnt
= hpet_readl(HPET_COUNTER
);
387 hpet_writel(cnt
, HPET_Tn_CMP(timer
));
390 * We need to read back the CMP register on certain HPET
391 * implementations (ATI chipsets) which seem to delay the
392 * transfer of the compare register into the internal compare
393 * logic. With small deltas this might actually be too late as
394 * the counter could already be higher than the compare value
395 * at that point and we would wait for the next hpet interrupt
396 * forever. We found out that reading the CMP register back
397 * forces the transfer so we can rely on the comparison with
398 * the counter register below. If the read back from the
399 * compare register does not match the value we programmed
400 * then we might have a real hardware problem. We can not do
401 * much about it here, but at least alert the user/admin with
402 * a prominent warning.
404 WARN_ONCE(hpet_readl(HPET_Tn_CMP(timer
)) != cnt
,
405 KERN_WARNING
"hpet: compare register read back failed.\n");
407 return (s32
)(hpet_readl(HPET_COUNTER
) - cnt
) >= 0 ? -ETIME
: 0;
410 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
411 struct clock_event_device
*evt
)
413 hpet_set_mode(mode
, evt
, 0);
416 static int hpet_legacy_next_event(unsigned long delta
,
417 struct clock_event_device
*evt
)
419 return hpet_next_event(delta
, evt
, 0);
425 #ifdef CONFIG_PCI_MSI
427 static DEFINE_PER_CPU(struct hpet_dev
*, cpu_hpet_dev
);
428 static struct hpet_dev
*hpet_devs
;
430 void hpet_msi_unmask(unsigned int irq
)
432 struct hpet_dev
*hdev
= get_irq_data(irq
);
436 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
438 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
441 void hpet_msi_mask(unsigned int irq
)
444 struct hpet_dev
*hdev
= get_irq_data(irq
);
447 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
449 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
452 void hpet_msi_write(unsigned int irq
, struct msi_msg
*msg
)
454 struct hpet_dev
*hdev
= get_irq_data(irq
);
456 hpet_writel(msg
->data
, HPET_Tn_ROUTE(hdev
->num
));
457 hpet_writel(msg
->address_lo
, HPET_Tn_ROUTE(hdev
->num
) + 4);
460 void hpet_msi_read(unsigned int irq
, struct msi_msg
*msg
)
462 struct hpet_dev
*hdev
= get_irq_data(irq
);
464 msg
->data
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
));
465 msg
->address_lo
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
) + 4);
469 static void hpet_msi_set_mode(enum clock_event_mode mode
,
470 struct clock_event_device
*evt
)
472 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
473 hpet_set_mode(mode
, evt
, hdev
->num
);
476 static int hpet_msi_next_event(unsigned long delta
,
477 struct clock_event_device
*evt
)
479 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
480 return hpet_next_event(delta
, evt
, hdev
->num
);
483 static int hpet_setup_msi_irq(unsigned int irq
)
485 if (arch_setup_hpet_msi(irq
, hpet_blockid
)) {
492 static int hpet_assign_irq(struct hpet_dev
*dev
)
500 set_irq_data(irq
, dev
);
502 if (hpet_setup_msi_irq(irq
))
509 static irqreturn_t
hpet_interrupt_handler(int irq
, void *data
)
511 struct hpet_dev
*dev
= (struct hpet_dev
*)data
;
512 struct clock_event_device
*hevt
= &dev
->evt
;
514 if (!hevt
->event_handler
) {
515 printk(KERN_INFO
"Spurious HPET timer interrupt on HPET timer %d\n",
520 hevt
->event_handler(hevt
);
524 static int hpet_setup_irq(struct hpet_dev
*dev
)
527 if (request_irq(dev
->irq
, hpet_interrupt_handler
,
528 IRQF_TIMER
| IRQF_DISABLED
| IRQF_NOBALANCING
,
532 disable_irq(dev
->irq
);
533 irq_set_affinity(dev
->irq
, cpumask_of(dev
->cpu
));
534 enable_irq(dev
->irq
);
536 printk(KERN_DEBUG
"hpet: %s irq %d for MSI\n",
537 dev
->name
, dev
->irq
);
542 /* This should be called in specific @cpu */
543 static void init_one_hpet_msi_clockevent(struct hpet_dev
*hdev
, int cpu
)
545 struct clock_event_device
*evt
= &hdev
->evt
;
548 WARN_ON(cpu
!= smp_processor_id());
549 if (!(hdev
->flags
& HPET_DEV_VALID
))
552 if (hpet_setup_msi_irq(hdev
->irq
))
556 per_cpu(cpu_hpet_dev
, cpu
) = hdev
;
557 evt
->name
= hdev
->name
;
558 hpet_setup_irq(hdev
);
559 evt
->irq
= hdev
->irq
;
562 evt
->features
= CLOCK_EVT_FEAT_ONESHOT
;
563 if (hdev
->flags
& HPET_DEV_PERI_CAP
)
564 evt
->features
|= CLOCK_EVT_FEAT_PERIODIC
;
566 evt
->set_mode
= hpet_msi_set_mode
;
567 evt
->set_next_event
= hpet_msi_next_event
;
571 * The period is a femto seconds value. We need to calculate the
572 * scaled math multiplication factor for nanosecond to hpet tick
575 hpet_freq
= 1000000000000000ULL;
576 do_div(hpet_freq
, hpet_period
);
577 evt
->mult
= div_sc((unsigned long) hpet_freq
,
578 NSEC_PER_SEC
, evt
->shift
);
579 /* Calculate the max delta */
580 evt
->max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF, evt
);
581 /* 5 usec minimum reprogramming delta. */
582 evt
->min_delta_ns
= 5000;
584 evt
->cpumask
= cpumask_of(hdev
->cpu
);
585 clockevents_register_device(evt
);
589 /* Reserve at least one timer for userspace (/dev/hpet) */
590 #define RESERVE_TIMERS 1
592 #define RESERVE_TIMERS 0
595 static void hpet_msi_capability_lookup(unsigned int start_timer
)
598 unsigned int num_timers
;
599 unsigned int num_timers_used
= 0;
602 if (hpet_msi_disable
)
605 if (boot_cpu_has(X86_FEATURE_ARAT
))
607 id
= hpet_readl(HPET_ID
);
609 num_timers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
);
610 num_timers
++; /* Value read out starts from 0 */
613 hpet_devs
= kzalloc(sizeof(struct hpet_dev
) * num_timers
, GFP_KERNEL
);
617 hpet_num_timers
= num_timers
;
619 for (i
= start_timer
; i
< num_timers
- RESERVE_TIMERS
; i
++) {
620 struct hpet_dev
*hdev
= &hpet_devs
[num_timers_used
];
621 unsigned int cfg
= hpet_readl(HPET_Tn_CFG(i
));
623 /* Only consider HPET timer with MSI support */
624 if (!(cfg
& HPET_TN_FSB_CAP
))
628 if (cfg
& HPET_TN_PERIODIC_CAP
)
629 hdev
->flags
|= HPET_DEV_PERI_CAP
;
632 sprintf(hdev
->name
, "hpet%d", i
);
633 if (hpet_assign_irq(hdev
))
636 hdev
->flags
|= HPET_DEV_FSB_CAP
;
637 hdev
->flags
|= HPET_DEV_VALID
;
639 if (num_timers_used
== num_possible_cpus())
643 printk(KERN_INFO
"HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
644 num_timers
, num_timers_used
);
648 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
655 for (i
= 0; i
< hpet_num_timers
; i
++) {
656 struct hpet_dev
*hdev
= &hpet_devs
[i
];
658 if (!(hdev
->flags
& HPET_DEV_VALID
))
661 hd
->hd_irq
[hdev
->num
] = hdev
->irq
;
662 hpet_reserve_timer(hd
, hdev
->num
);
667 static struct hpet_dev
*hpet_get_unused_timer(void)
674 for (i
= 0; i
< hpet_num_timers
; i
++) {
675 struct hpet_dev
*hdev
= &hpet_devs
[i
];
677 if (!(hdev
->flags
& HPET_DEV_VALID
))
679 if (test_and_set_bit(HPET_DEV_USED_BIT
,
680 (unsigned long *)&hdev
->flags
))
687 struct hpet_work_struct
{
688 struct delayed_work work
;
689 struct completion complete
;
692 static void hpet_work(struct work_struct
*w
)
694 struct hpet_dev
*hdev
;
695 int cpu
= smp_processor_id();
696 struct hpet_work_struct
*hpet_work
;
698 hpet_work
= container_of(w
, struct hpet_work_struct
, work
.work
);
700 hdev
= hpet_get_unused_timer();
702 init_one_hpet_msi_clockevent(hdev
, cpu
);
704 complete(&hpet_work
->complete
);
707 static int hpet_cpuhp_notify(struct notifier_block
*n
,
708 unsigned long action
, void *hcpu
)
710 unsigned long cpu
= (unsigned long)hcpu
;
711 struct hpet_work_struct work
;
712 struct hpet_dev
*hdev
= per_cpu(cpu_hpet_dev
, cpu
);
714 switch (action
& 0xf) {
716 INIT_DELAYED_WORK_ON_STACK(&work
.work
, hpet_work
);
717 init_completion(&work
.complete
);
718 /* FIXME: add schedule_work_on() */
719 schedule_delayed_work_on(cpu
, &work
.work
, 0);
720 wait_for_completion(&work
.complete
);
721 destroy_timer_on_stack(&work
.work
.timer
);
725 free_irq(hdev
->irq
, hdev
);
726 hdev
->flags
&= ~HPET_DEV_USED
;
727 per_cpu(cpu_hpet_dev
, cpu
) = NULL
;
735 static int hpet_setup_msi_irq(unsigned int irq
)
739 static void hpet_msi_capability_lookup(unsigned int start_timer
)
745 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
751 static int hpet_cpuhp_notify(struct notifier_block
*n
,
752 unsigned long action
, void *hcpu
)
760 * Clock source related code
762 static cycle_t
read_hpet(struct clocksource
*cs
)
764 return (cycle_t
)hpet_readl(HPET_COUNTER
);
768 static cycle_t __vsyscall_fn
vread_hpet(void)
770 return readl((const void __iomem
*)fix_to_virt(VSYSCALL_HPET
) + 0xf0);
774 static struct clocksource clocksource_hpet
= {
780 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
781 .resume
= hpet_resume_counter
,
787 static int hpet_clocksource_register(void)
792 /* Start the counter */
793 hpet_restart_counter();
795 /* Verify whether hpet counter works */
796 t1
= hpet_readl(HPET_COUNTER
);
800 * We don't know the TSC frequency yet, but waiting for
801 * 200000 TSC cycles is safe:
808 } while ((now
- start
) < 200000UL);
810 if (t1
== hpet_readl(HPET_COUNTER
)) {
812 "HPET counter not counting. HPET disabled\n");
817 * The definition of mult is (include/linux/clocksource.h)
818 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
819 * so we first need to convert hpet_period to ns/cyc units:
820 * mult/2^shift = ns/cyc = hpet_period/10^6
821 * mult = (hpet_period * 2^shift)/10^6
822 * mult = (hpet_period << shift)/FSEC_PER_NSEC
824 clocksource_hpet
.mult
= div_sc(hpet_period
, FSEC_PER_NSEC
, HPET_SHIFT
);
826 clocksource_register(&clocksource_hpet
);
832 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
834 int __init
hpet_enable(void)
839 if (!is_hpet_capable())
845 * Read the period and check for a sane value:
847 hpet_period
= hpet_readl(HPET_PERIOD
);
850 * AMD SB700 based systems with spread spectrum enabled use a
851 * SMM based HPET emulation to provide proper frequency
852 * setting. The SMM code is initialized with the first HPET
853 * register access and takes some time to complete. During
854 * this time the config register reads 0xffffffff. We check
855 * for max. 1000 loops whether the config register reads a non
856 * 0xffffffff value to make sure that HPET is up and running
857 * before we go further. A counting loop is safe, as the HPET
858 * access takes thousands of CPU cycles. On non SB700 based
859 * machines this check is only done once and has no side
862 for (i
= 0; hpet_readl(HPET_CFG
) == 0xFFFFFFFF; i
++) {
865 "HPET config register value = 0xFFFFFFFF. "
871 if (hpet_period
< HPET_MIN_PERIOD
|| hpet_period
> HPET_MAX_PERIOD
)
875 * Read the HPET ID register to retrieve the IRQ routing
876 * information and the number of channels
878 id
= hpet_readl(HPET_ID
);
881 #ifdef CONFIG_HPET_EMULATE_RTC
883 * The legacy routing mode needs at least two channels, tick timer
884 * and the rtc emulation channel.
886 if (!(id
& HPET_ID_NUMBER
))
890 if (hpet_clocksource_register())
893 if (id
& HPET_ID_LEGSUP
) {
894 hpet_legacy_clockevent_register();
900 hpet_clear_mapping();
906 * Needs to be late, as the reserve_timer code calls kalloc !
908 * Not a problem on i386 as hpet_enable is called from late_time_init,
909 * but on x86_64 it is necessary !
911 static __init
int hpet_late_init(void)
915 if (boot_hpet_disable
)
919 if (!force_hpet_address
)
922 hpet_address
= force_hpet_address
;
926 if (!hpet_virt_address
)
929 if (hpet_readl(HPET_ID
) & HPET_ID_LEGSUP
)
930 hpet_msi_capability_lookup(2);
932 hpet_msi_capability_lookup(0);
934 hpet_reserve_platform_timers(hpet_readl(HPET_ID
));
937 if (hpet_msi_disable
)
940 if (boot_cpu_has(X86_FEATURE_ARAT
))
943 for_each_online_cpu(cpu
) {
944 hpet_cpuhp_notify(NULL
, CPU_ONLINE
, (void *)(long)cpu
);
947 /* This notifier should be called after workqueue is ready */
948 hotcpu_notifier(hpet_cpuhp_notify
, -20);
952 fs_initcall(hpet_late_init
);
954 void hpet_disable(void)
956 if (is_hpet_capable()) {
957 unsigned int cfg
= hpet_readl(HPET_CFG
);
959 if (hpet_legacy_int_enabled
) {
960 cfg
&= ~HPET_CFG_LEGACY
;
961 hpet_legacy_int_enabled
= 0;
963 cfg
&= ~HPET_CFG_ENABLE
;
964 hpet_writel(cfg
, HPET_CFG
);
968 #ifdef CONFIG_HPET_EMULATE_RTC
970 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
971 * is enabled, we support RTC interrupt functionality in software.
972 * RTC has 3 kinds of interrupts:
973 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
975 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
976 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
977 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
978 * (1) and (2) above are implemented using polling at a frequency of
979 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
980 * overhead. (DEFAULT_RTC_INT_FREQ)
981 * For (3), we use interrupts at 64Hz or user specified periodic
982 * frequency, whichever is higher.
984 #include <linux/mc146818rtc.h>
985 #include <linux/rtc.h>
988 #define DEFAULT_RTC_INT_FREQ 64
989 #define DEFAULT_RTC_SHIFT 6
990 #define RTC_NUM_INTS 1
992 static unsigned long hpet_rtc_flags
;
993 static int hpet_prev_update_sec
;
994 static struct rtc_time hpet_alarm_time
;
995 static unsigned long hpet_pie_count
;
996 static u32 hpet_t1_cmp
;
997 static u32 hpet_default_delta
;
998 static u32 hpet_pie_delta
;
999 static unsigned long hpet_pie_limit
;
1001 static rtc_irq_handler irq_handler
;
1004 * Check that the hpet counter c1 is ahead of the c2
1006 static inline int hpet_cnt_ahead(u32 c1
, u32 c2
)
1008 return (s32
)(c2
- c1
) < 0;
1012 * Registers a IRQ handler.
1014 int hpet_register_irq_handler(rtc_irq_handler handler
)
1016 if (!is_hpet_enabled())
1021 irq_handler
= handler
;
1025 EXPORT_SYMBOL_GPL(hpet_register_irq_handler
);
1028 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
1031 void hpet_unregister_irq_handler(rtc_irq_handler handler
)
1033 if (!is_hpet_enabled())
1039 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler
);
1042 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
1043 * is not supported by all HPET implementations for timer 1.
1045 * hpet_rtc_timer_init() is called when the rtc is initialized.
1047 int hpet_rtc_timer_init(void)
1049 unsigned int cfg
, cnt
, delta
;
1050 unsigned long flags
;
1052 if (!is_hpet_enabled())
1055 if (!hpet_default_delta
) {
1058 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1059 clc
>>= hpet_clockevent
.shift
+ DEFAULT_RTC_SHIFT
;
1060 hpet_default_delta
= clc
;
1063 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1064 delta
= hpet_default_delta
;
1066 delta
= hpet_pie_delta
;
1068 local_irq_save(flags
);
1070 cnt
= delta
+ hpet_readl(HPET_COUNTER
);
1071 hpet_writel(cnt
, HPET_T1_CMP
);
1074 cfg
= hpet_readl(HPET_T1_CFG
);
1075 cfg
&= ~HPET_TN_PERIODIC
;
1076 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
1077 hpet_writel(cfg
, HPET_T1_CFG
);
1079 local_irq_restore(flags
);
1083 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init
);
1086 * The functions below are called from rtc driver.
1087 * Return 0 if HPET is not being used.
1088 * Otherwise do the necessary changes and return 1.
1090 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
1092 if (!is_hpet_enabled())
1095 hpet_rtc_flags
&= ~bit_mask
;
1098 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit
);
1100 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
1102 unsigned long oldbits
= hpet_rtc_flags
;
1104 if (!is_hpet_enabled())
1107 hpet_rtc_flags
|= bit_mask
;
1109 if ((bit_mask
& RTC_UIE
) && !(oldbits
& RTC_UIE
))
1110 hpet_prev_update_sec
= -1;
1113 hpet_rtc_timer_init();
1117 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit
);
1119 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
,
1122 if (!is_hpet_enabled())
1125 hpet_alarm_time
.tm_hour
= hrs
;
1126 hpet_alarm_time
.tm_min
= min
;
1127 hpet_alarm_time
.tm_sec
= sec
;
1131 EXPORT_SYMBOL_GPL(hpet_set_alarm_time
);
1133 int hpet_set_periodic_freq(unsigned long freq
)
1137 if (!is_hpet_enabled())
1140 if (freq
<= DEFAULT_RTC_INT_FREQ
)
1141 hpet_pie_limit
= DEFAULT_RTC_INT_FREQ
/ freq
;
1143 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1145 clc
>>= hpet_clockevent
.shift
;
1146 hpet_pie_delta
= clc
;
1150 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq
);
1152 int hpet_rtc_dropped_irq(void)
1154 return is_hpet_enabled();
1156 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq
);
1158 static void hpet_rtc_timer_reinit(void)
1160 unsigned int cfg
, delta
;
1163 if (unlikely(!hpet_rtc_flags
)) {
1164 cfg
= hpet_readl(HPET_T1_CFG
);
1165 cfg
&= ~HPET_TN_ENABLE
;
1166 hpet_writel(cfg
, HPET_T1_CFG
);
1170 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1171 delta
= hpet_default_delta
;
1173 delta
= hpet_pie_delta
;
1176 * Increment the comparator value until we are ahead of the
1180 hpet_t1_cmp
+= delta
;
1181 hpet_writel(hpet_t1_cmp
, HPET_T1_CMP
);
1183 } while (!hpet_cnt_ahead(hpet_t1_cmp
, hpet_readl(HPET_COUNTER
)));
1186 if (hpet_rtc_flags
& RTC_PIE
)
1187 hpet_pie_count
+= lost_ints
;
1188 if (printk_ratelimit())
1189 printk(KERN_WARNING
"hpet1: lost %d rtc interrupts\n",
1194 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
)
1196 struct rtc_time curr_time
;
1197 unsigned long rtc_int_flag
= 0;
1199 hpet_rtc_timer_reinit();
1200 memset(&curr_time
, 0, sizeof(struct rtc_time
));
1202 if (hpet_rtc_flags
& (RTC_UIE
| RTC_AIE
))
1203 get_rtc_time(&curr_time
);
1205 if (hpet_rtc_flags
& RTC_UIE
&&
1206 curr_time
.tm_sec
!= hpet_prev_update_sec
) {
1207 if (hpet_prev_update_sec
>= 0)
1208 rtc_int_flag
= RTC_UF
;
1209 hpet_prev_update_sec
= curr_time
.tm_sec
;
1212 if (hpet_rtc_flags
& RTC_PIE
&&
1213 ++hpet_pie_count
>= hpet_pie_limit
) {
1214 rtc_int_flag
|= RTC_PF
;
1218 if (hpet_rtc_flags
& RTC_AIE
&&
1219 (curr_time
.tm_sec
== hpet_alarm_time
.tm_sec
) &&
1220 (curr_time
.tm_min
== hpet_alarm_time
.tm_min
) &&
1221 (curr_time
.tm_hour
== hpet_alarm_time
.tm_hour
))
1222 rtc_int_flag
|= RTC_AF
;
1225 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
1227 irq_handler(rtc_int_flag
, dev_id
);
1231 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt
);