arch/x86/include/asm/io_apic.h

   1 #ifndef _ASM_X86_IO_APIC_H
   2 #define _ASM_X86_IO_APIC_H
   3
   4 #include <linux/types.h>
   5 #include <asm/mpspec.h>
   6 #include <asm/apicdef.h>
   7 #include <asm/irq_vectors.h>
   8
   9 /*
  10  * Intel IO-APIC support for SMP and UP systems.
  11  *
  12  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
  13  */
  14
  15 /* I/O Unit Redirection Table */
  16 #define IO_APIC_REDIR_VECTOR_MASK       0x000FF
  17 #define IO_APIC_REDIR_DEST_LOGICAL      0x00800
  18 #define IO_APIC_REDIR_DEST_PHYSICAL     0x00000
  19 #define IO_APIC_REDIR_SEND_PENDING      (1 << 12)
  20 #define IO_APIC_REDIR_REMOTE_IRR        (1 << 14)
  21 #define IO_APIC_REDIR_LEVEL_TRIGGER     (1 << 15)
  22 #define IO_APIC_REDIR_MASKED            (1 << 16)
  23
  24 /*
  25  * The structure of the IO-APIC:
  26  */
  27 union IO_APIC_reg_00 {
  28         u32     raw;
  29         struct {
  30                 u32     __reserved_2    : 14,
  31                         LTS             :  1,
  32                         delivery_type   :  1,
  33                         __reserved_1    :  8,
  34                         ID              :  8;
  35         } __attribute__ ((packed)) bits;
  36 };
  37
  38 union IO_APIC_reg_01 {
  39         u32     raw;
  40         struct {
  41                 u32     version         :  8,
  42                         __reserved_2    :  7,
  43                         PRQ             :  1,
  44                         entries         :  8,
  45                         __reserved_1    :  8;
  46         } __attribute__ ((packed)) bits;
  47 };
  48
  49 union IO_APIC_reg_02 {
  50         u32     raw;
  51         struct {
  52                 u32     __reserved_2    : 24,
  53                         arbitration     :  4,
  54                         __reserved_1    :  4;
  55         } __attribute__ ((packed)) bits;
  56 };
  57
  58 union IO_APIC_reg_03 {
  59         u32     raw;
  60         struct {
  61                 u32     boot_DT         :  1,
  62                         __reserved_1    : 31;
  63         } __attribute__ ((packed)) bits;
  64 };
  65
  66 enum ioapic_irq_destination_types {
  67         dest_Fixed = 0,
  68         dest_LowestPrio = 1,
  69         dest_SMI = 2,
  70         dest__reserved_1 = 3,
  71         dest_NMI = 4,
  72         dest_INIT = 5,
  73         dest__reserved_2 = 6,
  74         dest_ExtINT = 7
  75 };
  76
  77 struct IO_APIC_route_entry {
  78         __u32   vector          :  8,
  79                 delivery_mode   :  3,   /* 000: FIXED
  80                                          * 001: lowest prio
  81                                          * 111: ExtINT
  82                                          */
  83                 dest_mode       :  1,   /* 0: physical, 1: logical */
  84                 delivery_status :  1,
  85                 polarity        :  1,
  86                 irr             :  1,
  87                 trigger         :  1,   /* 0: edge, 1: level */
  88                 mask            :  1,   /* 0: enabled, 1: disabled */
  89                 __reserved_2    : 15;
  90
  91         __u32   __reserved_3    : 24,
  92                 dest            :  8;
  93 } __attribute__ ((packed));
  94
  95 struct IR_IO_APIC_route_entry {
  96         __u64   vector          : 8,
  97                 zero            : 3,
  98                 index2          : 1,
  99                 delivery_status : 1,
 100                 polarity        : 1,
 101                 irr             : 1,
 102                 trigger         : 1,
 103                 mask            : 1,
 104                 reserved        : 31,
 105                 format          : 1,
 106                 index           : 15;
 107 } __attribute__ ((packed));
 108
 109 #ifdef CONFIG_X86_IO_APIC
 110
 111 /*
 112  * # of IO-APICs and # of IRQ routing registers
 113  */
 114 extern int nr_ioapics;
 115 extern int nr_ioapic_registers[MAX_IO_APICS];
 116
 117 #define MP_MAX_IOAPIC_PIN 127
 118
 119 /* I/O APIC entries */
 120 extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
 121
 122 /* # of MP IRQ source entries */
 123 extern int mp_irq_entries;
 124
 125 /* MP IRQ source entries */
 126 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
 127
 128 /* non-0 if default (table-less) MP configuration */
 129 extern int mpc_default_type;
 130
 131 /* Older SiS APIC requires we rewrite the index register */
 132 extern int sis_apic_bug;
 133
 134 /* 1 if "noapic" boot option passed */
 135 extern int skip_ioapic_setup;
 136
 137 /* 1 if "noapic" boot option passed */
 138 extern int noioapicquirk;
 139
 140 /* -1 if "noapic" boot option passed */
 141 extern int noioapicreroute;
 142
 143 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 144 extern int timer_through_8259;
 145
 146 /*
 147  * If we use the IO-APIC for IRQ routing, disable automatic
 148  * assignment of PCI IRQ's.
 149  */
 150 #define io_apic_assign_pci_irqs \
 151         (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
 152
 153 extern u8 io_apic_unique_id(u8 id);
 154 extern int io_apic_get_unique_id(int ioapic, int apic_id);
 155 extern int io_apic_get_version(int ioapic);
 156 extern int io_apic_get_redir_entries(int ioapic);
 157
 158 struct io_apic_irq_attr;
 159 extern int io_apic_set_pci_routing(struct device *dev, int irq,
 160                  struct io_apic_irq_attr *irq_attr);
 161 void setup_IO_APIC_irq_extra(u32 gsi);
 162 extern void ioapic_and_gsi_init(void);
 163 extern void ioapic_insert_resources(void);
 164
 165 extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
 166 extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
 167 extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
 168 extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
 169 extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
 170
 171 extern void setup_ioapic_ids_from_mpc(void);
 172 extern void setup_ioapic_ids_from_mpc_nocheck(void);
 173
 174 struct mp_ioapic_gsi{
 175         u32 gsi_base;
 176         u32 gsi_end;
 177 };
 178 extern struct mp_ioapic_gsi  mp_gsi_routing[];
 179 extern u32 gsi_top;
 180 int mp_find_ioapic(u32 gsi);
 181 int mp_find_ioapic_pin(int ioapic, u32 gsi);
 182 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
 183 extern void __init pre_init_apic_IRQ0(void);
 184
 185 #else  /* !CONFIG_X86_IO_APIC */
 186
 187 #define io_apic_assign_pci_irqs 0
 188 #define setup_ioapic_ids_from_mpc x86_init_noop
 189 static const int timer_through_8259 = 0;
 190 static inline void ioapic_and_gsi_init(void) { }
 191 static inline void ioapic_insert_resources(void) { }
 192 #define gsi_top (NR_IRQS_LEGACY)
 193 static inline int mp_find_ioapic(u32 gsi) { return 0; }
 194
 195 struct io_apic_irq_attr;
 196 static inline int io_apic_set_pci_routing(struct device *dev, int irq,
 197                  struct io_apic_irq_attr *irq_attr) { return 0; }
 198 #endif
 199
 200 #endif /* _ASM_X86_IO_APIC_H */