2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
14 * From i386 code copyright (C) 1995 Linus Torvalds
17 #include <linux/signal.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/types.h>
23 #include <linux/ptrace.h>
24 #include <linux/mman.h>
26 #include <linux/smp.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/tty.h>
30 #include <linux/vt_kern.h> /* For unblank_screen() */
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/kprobes.h>
34 #include <linux/hugetlb.h>
35 #include <linux/syscalls.h>
36 #include <linux/uaccess.h>
38 #include <asm/pgalloc.h>
39 #include <asm/sections.h>
40 #include <asm/traps.h>
41 #include <asm/syscalls.h>
43 #include <arch/interrupts.h>
45 static noinline
void force_sig_info_fault(const char *type
, int si_signo
,
46 int si_code
, unsigned long address
,
48 struct task_struct
*tsk
,
53 if (unlikely(tsk
->pid
< 2)) {
54 panic("Signal %d (code %d) at %#lx sent to %s!",
55 si_signo
, si_code
& 0xffff, address
,
56 is_idle_task(tsk
) ? "the idle task" : "init");
59 info
.si_signo
= si_signo
;
61 info
.si_code
= si_code
;
62 info
.si_addr
= (void __user
*)address
;
63 info
.si_trapno
= fault_num
;
64 trace_unhandled_signal(type
, regs
, address
, si_signo
);
65 force_sig_info(si_signo
, &info
, tsk
);
70 * Synthesize the fault a PL0 process would get by doing a word-load of
71 * an unaligned address or a high kernel address.
73 SYSCALL_DEFINE1(cmpxchg_badaddr
, unsigned long, address
)
75 struct pt_regs
*regs
= current_pt_regs();
77 if (address
>= PAGE_OFFSET
)
78 force_sig_info_fault("atomic segfault", SIGSEGV
, SEGV_MAPERR
,
79 address
, INT_DTLB_MISS
, current
, regs
);
81 force_sig_info_fault("atomic alignment fault", SIGBUS
,
83 INT_UNALIGN_DATA
, current
, regs
);
86 * Adjust pc to point at the actual instruction, which is unusual
87 * for syscalls normally, but is appropriate when we are claiming
88 * that a syscall swint1 caused a page fault or bus error.
93 * Mark this as a caller-save interrupt, like a normal page fault,
94 * so that when we go through the signal handler path we will
95 * properly restore r0, r1, and r2 for the signal handler arguments.
97 regs
->flags
|= PT_FLAGS_CALLER_SAVES
;
103 static inline pmd_t
*vmalloc_sync_one(pgd_t
*pgd
, unsigned long address
)
105 unsigned index
= pgd_index(address
);
111 pgd_k
= init_mm
.pgd
+ index
;
113 if (!pgd_present(*pgd_k
))
116 pud
= pud_offset(pgd
, address
);
117 pud_k
= pud_offset(pgd_k
, address
);
118 if (!pud_present(*pud_k
))
121 pmd
= pmd_offset(pud
, address
);
122 pmd_k
= pmd_offset(pud_k
, address
);
123 if (!pmd_present(*pmd_k
))
125 if (!pmd_present(*pmd
)) {
126 set_pmd(pmd
, *pmd_k
);
127 arch_flush_lazy_mmu_mode();
129 BUG_ON(pmd_ptfn(*pmd
) != pmd_ptfn(*pmd_k
));
134 * Handle a fault on the vmalloc area.
136 static inline int vmalloc_fault(pgd_t
*pgd
, unsigned long address
)
141 /* Make sure we are in vmalloc area */
142 if (!(address
>= VMALLOC_START
&& address
< VMALLOC_END
))
146 * Synchronize this task's top level page-table
147 * with the 'reference' page table.
149 pmd_k
= vmalloc_sync_one(pgd
, address
);
152 if (pmd_huge(*pmd_k
))
153 return 0; /* support TILE huge_vmap() API */
154 pte_k
= pte_offset_kernel(pmd_k
, address
);
155 if (!pte_present(*pte_k
))
160 /* Wait until this PTE has completed migration. */
161 static void wait_for_migration(pte_t
*pte
)
163 if (pte_migrating(*pte
)) {
165 * Wait until the migrater fixes up this pte.
166 * We scale the loop count by the clock rate so we'll wait for
167 * a few seconds here.
170 int bound
= get_clock_rate();
171 while (pte_migrating(*pte
)) {
173 if (++retries
> bound
)
174 panic("Hit migrating PTE (%#llx) and"
175 " page PFN %#lx still migrating",
176 pte
->val
, pte_pfn(*pte
));
182 * It's not generally safe to use "current" to get the page table pointer,
183 * since we might be running an oprofile interrupt in the middle of a
186 static pgd_t
*get_current_pgd(void)
188 HV_Context ctx
= hv_inquire_context();
189 unsigned long pgd_pfn
= ctx
.page_table
>> PAGE_SHIFT
;
190 struct page
*pgd_page
= pfn_to_page(pgd_pfn
);
191 BUG_ON(PageHighMem(pgd_page
));
192 return (pgd_t
*) __va(ctx
.page_table
);
196 * We can receive a page fault from a migrating PTE at any time.
197 * Handle it by just waiting until the fault resolves.
199 * It's also possible to get a migrating kernel PTE that resolves
200 * itself during the downcall from hypervisor to Linux. We just check
201 * here to see if the PTE seems valid, and if so we retry it.
203 * NOTE! We MUST NOT take any locks for this case. We may be in an
204 * interrupt or a critical region, and must do as little as possible.
205 * Similarly, we can't use atomic ops here, since we may be handling a
206 * fault caused by an atomic op access.
208 * If we find a migrating PTE while we're in an NMI context, and we're
209 * at a PC that has a registered exception handler, we don't wait,
210 * since this thread may (e.g.) have been interrupted while migrating
211 * its own stack, which would then cause us to self-deadlock.
213 static int handle_migrating_pte(pgd_t
*pgd
, int fault_num
,
214 unsigned long address
, unsigned long pc
,
215 int is_kernel_mode
, int write
)
222 if (pgd_addr_invalid(address
))
225 pgd
+= pgd_index(address
);
226 pud
= pud_offset(pgd
, address
);
227 if (!pud
|| !pud_present(*pud
))
229 pmd
= pmd_offset(pud
, address
);
230 if (!pmd
|| !pmd_present(*pmd
))
232 pte
= pmd_huge_page(*pmd
) ? ((pte_t
*)pmd
) :
233 pte_offset_kernel(pmd
, address
);
235 if (pte_migrating(pteval
)) {
236 if (in_nmi() && search_exception_tables(pc
))
238 wait_for_migration(pte
);
242 if (!is_kernel_mode
|| !pte_present(pteval
))
244 if (fault_num
== INT_ITLB_MISS
) {
245 if (pte_exec(pteval
))
248 if (pte_write(pteval
))
251 if (pte_read(pteval
))
259 * This routine is responsible for faulting in user pages.
260 * It passes the work off to one of the appropriate routines.
261 * It returns true if the fault was successfully handled.
263 static int handle_page_fault(struct pt_regs
*regs
,
266 unsigned long address
,
269 struct task_struct
*tsk
;
270 struct mm_struct
*mm
;
271 struct vm_area_struct
*vma
;
272 unsigned long stack_offset
;
279 /* on TILE, protection faults are always writes */
283 flags
= FAULT_FLAG_ALLOW_RETRY
| FAULT_FLAG_KILLABLE
;
285 is_kernel_mode
= (EX1_PL(regs
->ex1
) != USER_PL
);
287 tsk
= validate_current();
290 * Check to see if we might be overwriting the stack, and bail
291 * out if so. The page fault code is a relatively likely
292 * place to get trapped in an infinite regress, and once we
293 * overwrite the whole stack, it becomes very hard to recover.
295 stack_offset
= stack_pointer
& (THREAD_SIZE
-1);
296 if (stack_offset
< THREAD_SIZE
/ 8) {
297 pr_alert("Potential stack overrun: sp %#lx\n",
300 pr_alert("Killing current process %d/%s\n",
301 tsk
->pid
, tsk
->comm
);
302 do_group_exit(SIGKILL
);
306 * Early on, we need to check for migrating PTE entries;
307 * see homecache.c. If we find a migrating PTE, we wait until
308 * the backing page claims to be done migrating, then we proceed.
309 * For kernel PTEs, we rewrite the PTE and return and retry.
310 * Otherwise, we treat the fault like a normal "no PTE" fault,
311 * rather than trying to patch up the existing PTE.
313 pgd
= get_current_pgd();
314 if (handle_migrating_pte(pgd
, fault_num
, address
, regs
->pc
,
315 is_kernel_mode
, write
))
318 si_code
= SEGV_MAPERR
;
321 * We fault-in kernel-space virtual memory on-demand. The
322 * 'reference' page table is init_mm.pgd.
324 * NOTE! We MUST NOT take any locks for this case. We may
325 * be in an interrupt or a critical region, and should
326 * only copy the information from the master page table,
329 * This verifies that the fault happens in kernel space
330 * and that the fault was not a protection fault.
332 if (unlikely(address
>= TASK_SIZE
&&
333 !is_arch_mappable_range(address
, 0))) {
334 if (is_kernel_mode
&& is_page_fault
&&
335 vmalloc_fault(pgd
, address
) >= 0)
338 * Don't take the mm semaphore here. If we fixup a prefetch
339 * fault we could otherwise deadlock.
341 mm
= NULL
; /* happy compiler */
343 goto bad_area_nosemaphore
;
347 * If we're trying to touch user-space addresses, we must
348 * be either at PL0, or else with interrupts enabled in the
349 * kernel, so either way we can re-enable interrupts here
350 * unless we are doing atomic access to user space with
351 * interrupts disabled.
353 if (!(regs
->flags
& PT_FLAGS_DISABLE_IRQ
))
359 * If we're in an interrupt, have no user context or are running in an
360 * atomic region then we must not take the fault.
362 if (in_atomic() || !mm
) {
363 vma
= NULL
; /* happy compiler */
364 goto bad_area_nosemaphore
;
368 flags
|= FAULT_FLAG_USER
;
371 * When running in the kernel we expect faults to occur only to
372 * addresses in user space. All other faults represent errors in the
373 * kernel and should generate an OOPS. Unfortunately, in the case of an
374 * erroneous fault occurring in a code path which already holds mmap_sem
375 * we will deadlock attempting to validate the fault against the
376 * address space. Luckily the kernel only validly references user
377 * space from well defined areas of code, which are listed in the
380 * As the vast majority of faults will be valid we will only perform
381 * the source reference check when there is a possibility of a deadlock.
382 * Attempt to lock the address space, if we cannot we then validate the
383 * source. If this is invalid we can skip the address space check,
384 * thus avoiding the deadlock.
386 if (!down_read_trylock(&mm
->mmap_sem
)) {
387 if (is_kernel_mode
&&
388 !search_exception_tables(regs
->pc
)) {
389 vma
= NULL
; /* happy compiler */
390 goto bad_area_nosemaphore
;
394 down_read(&mm
->mmap_sem
);
397 vma
= find_vma(mm
, address
);
400 if (vma
->vm_start
<= address
)
402 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
404 if (regs
->sp
< PAGE_OFFSET
) {
406 * accessing the stack below sp is always a bug.
408 if (address
< regs
->sp
)
411 if (expand_stack(vma
, address
))
415 * Ok, we have a good vm_area for this memory access, so
419 si_code
= SEGV_ACCERR
;
420 if (fault_num
== INT_ITLB_MISS
) {
421 if (!(vma
->vm_flags
& VM_EXEC
))
424 #ifdef TEST_VERIFY_AREA
425 if (!is_page_fault
&& regs
->cs
== KERNEL_CS
)
426 pr_err("WP fault at "REGFMT
"\n", regs
->eip
);
428 if (!(vma
->vm_flags
& VM_WRITE
))
430 flags
|= FAULT_FLAG_WRITE
;
432 if (!is_page_fault
|| !(vma
->vm_flags
& VM_READ
))
437 * If for any reason at all we couldn't handle the fault,
438 * make sure we exit gracefully rather than endlessly redo
441 fault
= handle_mm_fault(mm
, vma
, address
, flags
);
443 if ((fault
& VM_FAULT_RETRY
) && fatal_signal_pending(current
))
446 if (unlikely(fault
& VM_FAULT_ERROR
)) {
447 if (fault
& VM_FAULT_OOM
)
449 else if (fault
& VM_FAULT_SIGSEGV
)
451 else if (fault
& VM_FAULT_SIGBUS
)
455 if (flags
& FAULT_FLAG_ALLOW_RETRY
) {
456 if (fault
& VM_FAULT_MAJOR
)
460 if (fault
& VM_FAULT_RETRY
) {
461 flags
&= ~FAULT_FLAG_ALLOW_RETRY
;
462 flags
|= FAULT_FLAG_TRIED
;
465 * No need to up_read(&mm->mmap_sem) as we would
466 * have already released it in __lock_page_or_retry
473 #if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
475 * If this was an asynchronous fault,
476 * restart the appropriate engine.
479 #if CHIP_HAS_TILE_DMA()
480 case INT_DMATLB_MISS
:
481 case INT_DMATLB_MISS_DWNCL
:
482 case INT_DMATLB_ACCESS
:
483 case INT_DMATLB_ACCESS_DWNCL
:
484 __insn_mtspr(SPR_DMA_CTR
, SPR_DMA_CTR__REQUEST_MASK
);
487 #if CHIP_HAS_SN_PROC()
488 case INT_SNITLB_MISS
:
489 case INT_SNITLB_MISS_DWNCL
:
490 __insn_mtspr(SPR_SNCTL
,
491 __insn_mfspr(SPR_SNCTL
) &
492 ~SPR_SNCTL__FRZPROC_MASK
);
498 up_read(&mm
->mmap_sem
);
502 * Something tried to access memory that isn't in our memory map..
503 * Fix it, but check if it's kernel or user first..
506 up_read(&mm
->mmap_sem
);
508 bad_area_nosemaphore
:
509 /* User mode accesses just cause a SIGSEGV */
510 if (!is_kernel_mode
) {
512 * It's possible to have interrupts off here.
516 force_sig_info_fault("segfault", SIGSEGV
, si_code
, address
,
517 fault_num
, tsk
, regs
);
522 /* Are we prepared to handle this kernel fault? */
523 if (fixup_exception(regs
))
527 * Oops. The kernel tried to access some bad page. We'll have to
528 * terminate things with extreme prejudice.
533 /* FIXME: no lookup_address() yet */
534 #ifdef SUPPORT_LOOKUP_ADDRESS
535 if (fault_num
== INT_ITLB_MISS
) {
536 pte_t
*pte
= lookup_address(address
);
538 if (pte
&& pte_present(*pte
) && !pte_exec_kernel(*pte
))
539 pr_crit("kernel tried to execute"
540 " non-executable page - exploit attempt?"
541 " (uid: %d)\n", current
->uid
);
544 if (address
< PAGE_SIZE
)
545 pr_alert("Unable to handle kernel NULL pointer dereference\n");
547 pr_alert("Unable to handle kernel paging request\n");
548 pr_alert(" at virtual address "REGFMT
", pc "REGFMT
"\n",
553 if (unlikely(tsk
->pid
< 2)) {
554 panic("Kernel page fault running %s!",
555 is_idle_task(tsk
) ? "the idle task" : "init");
559 * More FIXME: we should probably copy the i386 here and
560 * implement a generic die() routine. Not today.
567 do_group_exit(SIGKILL
);
570 * We ran out of memory, or some other thing happened to us that made
571 * us unable to handle the page fault gracefully.
574 up_read(&mm
->mmap_sem
);
577 pagefault_out_of_memory();
581 up_read(&mm
->mmap_sem
);
583 /* Kernel mode? Handle exceptions or die */
587 force_sig_info_fault("bus error", SIGBUS
, BUS_ADRERR
, address
,
588 fault_num
, tsk
, regs
);
594 /* We must release ICS before panicking or we won't get anywhere. */
595 #define ics_panic(fmt, ...) do { \
596 __insn_mtspr(SPR_INTERRUPT_CRITICAL_SECTION, 0); \
597 panic(fmt, __VA_ARGS__); \
601 * When we take an ITLB or DTLB fault or access violation in the
602 * supervisor while the critical section bit is set, the hypervisor is
603 * reluctant to write new values into the EX_CONTEXT_K_x registers,
604 * since that might indicate we have not yet squirreled the SPR
605 * contents away and can thus safely take a recursive interrupt.
606 * Accordingly, the hypervisor passes us the PC via SYSTEM_SAVE_K_2.
608 * Note that this routine is called before homecache_tlb_defer_enter(),
609 * which means that we can properly unlock any atomics that might
610 * be used there (good), but also means we must be very sensitive
611 * to not touch any data structures that might be located in memory
612 * that could migrate, as we could be entering the kernel on a dataplane
613 * cpu that has been deferring kernel TLB updates. This means, for
614 * example, that we can't migrate init_mm or its pgd.
616 struct intvec_state
do_page_fault_ics(struct pt_regs
*regs
, int fault_num
,
617 unsigned long address
,
620 unsigned long pc
= info
& ~1;
621 int write
= info
& 1;
622 pgd_t
*pgd
= get_current_pgd();
624 /* Retval is 1 at first since we will handle the fault fully. */
625 struct intvec_state state
= {
626 do_page_fault
, fault_num
, address
, write
, 1
629 /* Validate that we are plausibly in the right routine. */
630 if ((pc
& 0x7) != 0 || pc
< PAGE_OFFSET
||
631 (fault_num
!= INT_DTLB_MISS
&&
632 fault_num
!= INT_DTLB_ACCESS
)) {
633 unsigned long old_pc
= regs
->pc
;
635 ics_panic("Bad ICS page fault args:"
636 " old PC %#lx, fault %d/%d at %#lx\n",
637 old_pc
, fault_num
, write
, address
);
640 /* We might be faulting on a vmalloc page, so check that first. */
641 if (fault_num
!= INT_DTLB_ACCESS
&& vmalloc_fault(pgd
, address
) >= 0)
645 * If we faulted with ICS set in sys_cmpxchg, we are providing
646 * a user syscall service that should generate a signal on
647 * fault. We didn't set up a kernel stack on initial entry to
648 * sys_cmpxchg, but instead had one set up by the fault, which
649 * (because sys_cmpxchg never releases ICS) came to us via the
650 * SYSTEM_SAVE_K_2 mechanism, and thus EX_CONTEXT_K_[01] are
651 * still referencing the original user code. We release the
652 * atomic lock and rewrite pt_regs so that it appears that we
653 * came from user-space directly, and after we finish the
654 * fault we'll go back to user space and re-issue the swint.
655 * This way the backtrace information is correct if we need to
656 * emit a stack dump at any point while handling this.
658 * Must match register use in sys_cmpxchg().
660 if (pc
>= (unsigned long) sys_cmpxchg
&&
661 pc
< (unsigned long) __sys_cmpxchg_end
) {
663 /* Don't unlock before we could have locked. */
664 if (pc
>= (unsigned long)__sys_cmpxchg_grab_lock
) {
665 int *lock_ptr
= (int *)(regs
->regs
[ATOMIC_LOCK_REG
]);
666 __atomic_fault_unlock(lock_ptr
);
669 regs
->sp
= regs
->regs
[27];
673 * We can also fault in the atomic assembly, in which
674 * case we use the exception table to do the first-level fixup.
675 * We may re-fixup again in the real fault handler if it
676 * turns out the faulting address is just bad, and not,
677 * for example, migrating.
679 else if (pc
>= (unsigned long) __start_atomic_asm_code
&&
680 pc
< (unsigned long) __end_atomic_asm_code
) {
681 const struct exception_table_entry
*fixup
;
683 /* Unlock the atomic lock. */
684 int *lock_ptr
= (int *)(regs
->regs
[ATOMIC_LOCK_REG
]);
685 __atomic_fault_unlock(lock_ptr
);
687 fixup
= search_exception_tables(pc
);
689 ics_panic("ICS atomic fault not in table:"
690 " PC %#lx, fault %d", pc
, fault_num
);
691 regs
->pc
= fixup
->fixup
;
692 regs
->ex1
= PL_ICS_EX1(KERNEL_PL
, 0);
696 * Now that we have released the atomic lock (if necessary),
697 * it's safe to spin if the PTE that caused the fault was migrating.
699 if (fault_num
== INT_DTLB_ACCESS
)
701 if (handle_migrating_pte(pgd
, fault_num
, address
, pc
, 1, write
))
704 /* Return zero so that we continue on with normal fault handling. */
709 #endif /* !__tilegx__ */
712 * This routine handles page faults. It determines the address, and the
713 * problem, and then passes it handle_page_fault() for normal DTLB and
714 * ITLB issues, and for DMA or SN processor faults when we are in user
715 * space. For the latter, if we're in kernel mode, we just save the
716 * interrupt away appropriately and return immediately. We can't do
717 * page faults for user code while in kernel mode.
719 void do_page_fault(struct pt_regs
*regs
, int fault_num
,
720 unsigned long address
, unsigned long write
)
724 /* This case should have been handled by do_page_fault_ics(). */
727 #if CHIP_HAS_TILE_DMA()
729 * If it's a DMA fault, suspend the transfer while we're
730 * handling the miss; we'll restart after it's handled. If we
731 * don't suspend, it's possible that this process could swap
732 * out and back in, and restart the engine since the DMA is
735 if (fault_num
== INT_DMATLB_MISS
||
736 fault_num
== INT_DMATLB_ACCESS
||
737 fault_num
== INT_DMATLB_MISS_DWNCL
||
738 fault_num
== INT_DMATLB_ACCESS_DWNCL
) {
739 __insn_mtspr(SPR_DMA_CTR
, SPR_DMA_CTR__SUSPEND_MASK
);
740 while (__insn_mfspr(SPR_DMA_USER_STATUS
) &
741 SPR_DMA_STATUS__BUSY_MASK
)
746 /* Validate fault num and decide if this is a first-time page fault. */
750 #if CHIP_HAS_TILE_DMA()
751 case INT_DMATLB_MISS
:
752 case INT_DMATLB_MISS_DWNCL
:
754 #if CHIP_HAS_SN_PROC()
755 case INT_SNITLB_MISS
:
756 case INT_SNITLB_MISS_DWNCL
:
761 case INT_DTLB_ACCESS
:
762 #if CHIP_HAS_TILE_DMA()
763 case INT_DMATLB_ACCESS
:
764 case INT_DMATLB_ACCESS_DWNCL
:
770 panic("Bad fault number %d in do_page_fault", fault_num
);
773 #if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
774 if (EX1_PL(regs
->ex1
) != USER_PL
) {
775 struct async_tlb
*async
;
777 #if CHIP_HAS_TILE_DMA()
778 case INT_DMATLB_MISS
:
779 case INT_DMATLB_ACCESS
:
780 case INT_DMATLB_MISS_DWNCL
:
781 case INT_DMATLB_ACCESS_DWNCL
:
782 async
= ¤t
->thread
.dma_async_tlb
;
785 #if CHIP_HAS_SN_PROC()
786 case INT_SNITLB_MISS
:
787 case INT_SNITLB_MISS_DWNCL
:
788 async
= ¤t
->thread
.sn_async_tlb
;
797 * No vmalloc check required, so we can allow
798 * interrupts immediately at this point.
802 set_thread_flag(TIF_ASYNC_TLB
);
803 if (async
->fault_num
!= 0) {
804 panic("Second async fault %d;"
805 " old fault was %d (%#lx/%ld)",
806 fault_num
, async
->fault_num
,
809 BUG_ON(fault_num
== 0);
810 async
->fault_num
= fault_num
;
811 async
->is_fault
= is_page_fault
;
812 async
->is_write
= write
;
813 async
->address
= address
;
819 handle_page_fault(regs
, fault_num
, is_page_fault
, address
, write
);
823 #if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
825 * Check an async_tlb structure to see if a deferred fault is waiting,
826 * and if so pass it to the page-fault code.
828 static void handle_async_page_fault(struct pt_regs
*regs
,
829 struct async_tlb
*async
)
831 if (async
->fault_num
) {
833 * Clear async->fault_num before calling the page-fault
834 * handler so that if we re-interrupt before returning
835 * from the function we have somewhere to put the
836 * information from the new interrupt.
838 int fault_num
= async
->fault_num
;
839 async
->fault_num
= 0;
840 handle_page_fault(regs
, fault_num
, async
->is_fault
,
841 async
->address
, async
->is_write
);
846 * This routine effectively re-issues asynchronous page faults
847 * when we are returning to user space.
849 void do_async_page_fault(struct pt_regs
*regs
)
852 * Clear thread flag early. If we re-interrupt while processing
853 * code here, we will reset it and recall this routine before
854 * returning to user space.
856 clear_thread_flag(TIF_ASYNC_TLB
);
858 #if CHIP_HAS_TILE_DMA()
859 handle_async_page_fault(regs
, ¤t
->thread
.dma_async_tlb
);
861 #if CHIP_HAS_SN_PROC()
862 handle_async_page_fault(regs
, ¤t
->thread
.sn_async_tlb
);
865 #endif /* CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC() */
868 void vmalloc_sync_all(void)
871 /* Currently all L1 kernel pmd's are static and shared. */
872 BUG_ON(pgd_index(VMALLOC_END
) != pgd_index(VMALLOC_START
));
875 * Note that races in the updates of insync and start aren't
876 * problematic: insync can only get set bits added, and updates to
877 * start are only improving performance (without affecting correctness
880 static DECLARE_BITMAP(insync
, PTRS_PER_PGD
);
881 static unsigned long start
= PAGE_OFFSET
;
882 unsigned long address
;
884 BUILD_BUG_ON(PAGE_OFFSET
& ~PGDIR_MASK
);
885 for (address
= start
; address
>= PAGE_OFFSET
; address
+= PGDIR_SIZE
) {
886 if (!test_bit(pgd_index(address
), insync
)) {
888 struct list_head
*pos
;
890 spin_lock_irqsave(&pgd_lock
, flags
);
891 list_for_each(pos
, &pgd_list
)
892 if (!vmalloc_sync_one(list_to_pgd(pos
),
894 /* Must be at first entry in list. */
895 BUG_ON(pos
!= pgd_list
.next
);
898 spin_unlock_irqrestore(&pgd_lock
, flags
);
899 if (pos
!= pgd_list
.next
)
900 set_bit(pgd_index(address
), insync
);
902 if (address
== start
&& test_bit(pgd_index(address
), insync
))
903 start
= address
+ PGDIR_SIZE
;