[PATCH] capable/capability.h (arch/)
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ppc / kernel / ppc_htab.c
1 /*
2 * PowerPC hash table management proc entry. Will show information
3 * about the current hash table and will allow changes to it.
4 *
5 * Written by Cort Dougan (cort@cs.nmt.edu)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/stat.h>
18 #include <linux/sysctl.h>
19 #include <linux/capability.h>
20 #include <linux/ctype.h>
21 #include <linux/threads.h>
22 #include <linux/smp_lock.h>
23 #include <linux/seq_file.h>
24 #include <linux/init.h>
25 #include <linux/bitops.h>
26
27 #include <asm/uaccess.h>
28 #include <asm/mmu.h>
29 #include <asm/residual.h>
30 #include <asm/io.h>
31 #include <asm/pgtable.h>
32 #include <asm/cputable.h>
33 #include <asm/system.h>
34 #include <asm/reg.h>
35
36 static int ppc_htab_show(struct seq_file *m, void *v);
37 static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
38 size_t count, loff_t *ppos);
39 extern PTE *Hash, *Hash_end;
40 extern unsigned long Hash_size, Hash_mask;
41 extern unsigned long _SDR1;
42 extern unsigned long htab_reloads;
43 extern unsigned long htab_preloads;
44 extern unsigned long htab_evicts;
45 extern unsigned long pte_misses;
46 extern unsigned long pte_errors;
47 extern unsigned int primary_pteg_full;
48 extern unsigned int htab_hash_searches;
49
50 static int ppc_htab_open(struct inode *inode, struct file *file)
51 {
52 return single_open(file, ppc_htab_show, NULL);
53 }
54
55 struct file_operations ppc_htab_operations = {
56 .open = ppc_htab_open,
57 .read = seq_read,
58 .llseek = seq_lseek,
59 .write = ppc_htab_write,
60 .release = single_release,
61 };
62
63 static char *pmc1_lookup(unsigned long mmcr0)
64 {
65 switch ( mmcr0 & (0x7f<<7) )
66 {
67 case 0x0:
68 return "none";
69 case MMCR0_PMC1_CYCLES:
70 return "cycles";
71 case MMCR0_PMC1_ICACHEMISS:
72 return "ic miss";
73 case MMCR0_PMC1_DTLB:
74 return "dtlb miss";
75 default:
76 return "unknown";
77 }
78 }
79
80 static char *pmc2_lookup(unsigned long mmcr0)
81 {
82 switch ( mmcr0 & 0x3f )
83 {
84 case 0x0:
85 return "none";
86 case MMCR0_PMC2_CYCLES:
87 return "cycles";
88 case MMCR0_PMC2_DCACHEMISS:
89 return "dc miss";
90 case MMCR0_PMC2_ITLB:
91 return "itlb miss";
92 case MMCR0_PMC2_LOADMISSTIME:
93 return "load miss time";
94 default:
95 return "unknown";
96 }
97 }
98
99 /*
100 * print some useful info about the hash table. This function
101 * is _REALLY_ slow (see the nested for loops below) but nothing
102 * in here should be really timing critical. -- Cort
103 */
104 static int ppc_htab_show(struct seq_file *m, void *v)
105 {
106 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
107 #if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
108 unsigned int kptes = 0, uptes = 0;
109 PTE *ptr;
110 #endif /* CONFIG_PPC_STD_MMU */
111
112 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
113 mmcr0 = mfspr(SPRN_MMCR0);
114 pmc1 = mfspr(SPRN_PMC1);
115 pmc2 = mfspr(SPRN_PMC2);
116 seq_printf(m,
117 "604 Performance Monitoring\n"
118 "MMCR0\t\t: %08lx %s%s ",
119 mmcr0,
120 ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
121 ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
122 seq_printf(m,
123 "\nPMC1\t\t: %08lx (%s)\n"
124 "PMC2\t\t: %08lx (%s)\n",
125 pmc1, pmc1_lookup(mmcr0),
126 pmc2, pmc2_lookup(mmcr0));
127 }
128
129 #ifdef CONFIG_PPC_STD_MMU
130 /* if we don't have a htab */
131 if ( Hash_size == 0 ) {
132 seq_printf(m, "No Hash Table used\n");
133 return 0;
134 }
135
136 #ifndef CONFIG_PPC64BRIDGE
137 for (ptr = Hash; ptr < Hash_end; ptr++) {
138 unsigned int mctx, vsid;
139
140 if (!ptr->v)
141 continue;
142 /* undo the esid skew */
143 vsid = ptr->vsid;
144 mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
145 if (mctx == 0)
146 kptes++;
147 else
148 uptes++;
149 }
150 #endif
151
152 seq_printf(m,
153 "PTE Hash Table Information\n"
154 "Size\t\t: %luKb\n"
155 "Buckets\t\t: %lu\n"
156 "Address\t\t: %08lx\n"
157 "Entries\t\t: %lu\n"
158 #ifndef CONFIG_PPC64BRIDGE
159 "User ptes\t: %u\n"
160 "Kernel ptes\t: %u\n"
161 "Percent full\t: %lu%%\n"
162 #endif
163 , (unsigned long)(Hash_size>>10),
164 (Hash_size/(sizeof(PTE)*8)),
165 (unsigned long)Hash,
166 Hash_size/sizeof(PTE)
167 #ifndef CONFIG_PPC64BRIDGE
168 , uptes,
169 kptes,
170 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
171 #endif
172 );
173
174 seq_printf(m,
175 "Reloads\t\t: %lu\n"
176 "Preloads\t: %lu\n"
177 "Searches\t: %u\n"
178 "Overflows\t: %u\n"
179 "Evicts\t\t: %lu\n",
180 htab_reloads, htab_preloads, htab_hash_searches,
181 primary_pteg_full, htab_evicts);
182 #endif /* CONFIG_PPC_STD_MMU */
183
184 seq_printf(m,
185 "Non-error misses: %lu\n"
186 "Error misses\t: %lu\n",
187 pte_misses, pte_errors);
188 return 0;
189 }
190
191 /*
192 * Allow user to define performance counters and resize the hash table
193 */
194 static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
195 size_t count, loff_t *ppos)
196 {
197 #ifdef CONFIG_PPC_STD_MMU
198 unsigned long tmp;
199 char buffer[16];
200
201 if (!capable(CAP_SYS_ADMIN))
202 return -EACCES;
203 if (strncpy_from_user(buffer, ubuffer, 15))
204 return -EFAULT;
205 buffer[15] = 0;
206
207 /* don't set the htab size for now */
208 if ( !strncmp( buffer, "size ", 5) )
209 return -EBUSY;
210
211 if ( !strncmp( buffer, "reset", 5) )
212 {
213 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
214 /* reset PMC1 and PMC2 */
215 mtspr(SPRN_PMC1, 0);
216 mtspr(SPRN_PMC2, 0);
217 }
218 htab_reloads = 0;
219 htab_evicts = 0;
220 pte_misses = 0;
221 pte_errors = 0;
222 }
223
224 /* Everything below here requires the performance monitor feature. */
225 if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
226 return count;
227
228 /* turn off performance monitoring */
229 if ( !strncmp( buffer, "off", 3) )
230 {
231 mtspr(SPRN_MMCR0, 0);
232 mtspr(SPRN_PMC1, 0);
233 mtspr(SPRN_PMC2, 0);
234 }
235
236 if ( !strncmp( buffer, "user", 4) )
237 {
238 /* setup mmcr0 and clear the correct pmc */
239 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
240 mtspr(SPRN_MMCR0, tmp);
241 mtspr(SPRN_PMC1, 0);
242 mtspr(SPRN_PMC2, 0);
243 }
244
245 if ( !strncmp( buffer, "kernel", 6) )
246 {
247 /* setup mmcr0 and clear the correct pmc */
248 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
249 mtspr(SPRN_MMCR0, tmp);
250 mtspr(SPRN_PMC1, 0);
251 mtspr(SPRN_PMC2, 0);
252 }
253
254 /* PMC1 values */
255 if ( !strncmp( buffer, "dtlb", 4) )
256 {
257 /* setup mmcr0 and clear the correct pmc */
258 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
259 mtspr(SPRN_MMCR0, tmp);
260 mtspr(SPRN_PMC1, 0);
261 }
262
263 if ( !strncmp( buffer, "ic miss", 7) )
264 {
265 /* setup mmcr0 and clear the correct pmc */
266 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
267 mtspr(SPRN_MMCR0, tmp);
268 mtspr(SPRN_PMC1, 0);
269 }
270
271 /* PMC2 values */
272 if ( !strncmp( buffer, "load miss time", 14) )
273 {
274 /* setup mmcr0 and clear the correct pmc */
275 asm volatile(
276 "mfspr %0,%1\n\t" /* get current mccr0 */
277 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
278 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
279 "mtspr %1,%0 \n\t" /* set new mccr0 */
280 "mtspr %3,%4 \n\t" /* reset the pmc */
281 : "=r" (tmp)
282 : "i" (SPRN_MMCR0),
283 "i" (MMCR0_PMC2_LOADMISSTIME),
284 "i" (SPRN_PMC2), "r" (0) );
285 }
286
287 if ( !strncmp( buffer, "itlb", 4) )
288 {
289 /* setup mmcr0 and clear the correct pmc */
290 asm volatile(
291 "mfspr %0,%1\n\t" /* get current mccr0 */
292 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
293 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
294 "mtspr %1,%0 \n\t" /* set new mccr0 */
295 "mtspr %3,%4 \n\t" /* reset the pmc */
296 : "=r" (tmp)
297 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
298 "i" (SPRN_PMC2), "r" (0) );
299 }
300
301 if ( !strncmp( buffer, "dc miss", 7) )
302 {
303 /* setup mmcr0 and clear the correct pmc */
304 asm volatile(
305 "mfspr %0,%1\n\t" /* get current mccr0 */
306 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
307 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
308 "mtspr %1,%0 \n\t" /* set new mccr0 */
309 "mtspr %3,%4 \n\t" /* reset the pmc */
310 : "=r" (tmp)
311 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
312 "i" (SPRN_PMC2), "r" (0) );
313 }
314
315 return count;
316 #else /* CONFIG_PPC_STD_MMU */
317 return 0;
318 #endif /* CONFIG_PPC_STD_MMU */
319 }
320
321 int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
322 void __user *buffer_arg, size_t *lenp, loff_t *ppos)
323 {
324 int vleft, first=1, len, left, val;
325 char __user *buffer = (char __user *) buffer_arg;
326 #define TMPBUFLEN 256
327 char buf[TMPBUFLEN], *p;
328 static const char *sizestrings[4] = {
329 "2MB", "256KB", "512KB", "1MB"
330 };
331 static const char *clockstrings[8] = {
332 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
333 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
334 };
335 static const char *typestrings[4] = {
336 "flow-through burst SRAM", "reserved SRAM",
337 "pipelined burst SRAM", "pipelined late-write SRAM"
338 };
339 static const char *holdstrings[4] = {
340 "0.5", "1.0", "(reserved2)", "(reserved3)"
341 };
342
343 if (!cpu_has_feature(CPU_FTR_L2CR))
344 return -EFAULT;
345
346 if ( /*!table->maxlen ||*/ (*ppos && !write)) {
347 *lenp = 0;
348 return 0;
349 }
350
351 vleft = table->maxlen / sizeof(int);
352 left = *lenp;
353
354 for (; left /*&& vleft--*/; first=0) {
355 if (write) {
356 while (left) {
357 char c;
358 if(get_user(c, buffer))
359 return -EFAULT;
360 if (!isspace(c))
361 break;
362 left--;
363 buffer++;
364 }
365 if (!left)
366 break;
367 len = left;
368 if (len > TMPBUFLEN-1)
369 len = TMPBUFLEN-1;
370 if(copy_from_user(buf, buffer, len))
371 return -EFAULT;
372 buf[len] = 0;
373 p = buf;
374 if (*p < '0' || *p > '9')
375 break;
376 val = simple_strtoul(p, &p, 0);
377 len = p-buf;
378 if ((len < left) && *p && !isspace(*p))
379 break;
380 buffer += len;
381 left -= len;
382 _set_L2CR(val);
383 } else {
384 p = buf;
385 if (!first)
386 *p++ = '\t';
387 val = _get_L2CR();
388 p += sprintf(p, "0x%08x: ", val);
389 p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
390 "disabled");
391 p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
392 p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
393 p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
394 p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
395 p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
396 p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
397 p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
398 "copy-back");
399 p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
400 p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
401 p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
402 p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
403 p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
404
405 p += sprintf(p,"\n");
406
407 len = strlen(buf);
408 if (len > left)
409 len = left;
410 if (copy_to_user(buffer, buf, len))
411 return -EFAULT;
412 left -= len;
413 buffer += len;
414 break;
415 }
416 }
417
418 if (!write && !first && left) {
419 if(put_user('\n', (char __user *) buffer))
420 return -EFAULT;
421 left--, buffer++;
422 }
423 if (write) {
424 char __user *s = (char __user *) buffer;
425 while (left) {
426 char c;
427 if(get_user(c, s++))
428 return -EFAULT;
429 if (!isspace(c))
430 break;
431 left--;
432 }
433 }
434 if (write && first)
435 return -EINVAL;
436 *lenp -= left;
437 *ppos += *lenp;
438 return 0;
439 }
440
441 #ifdef CONFIG_SYSCTL
442 /*
443 * Register our sysctl.
444 */
445 static ctl_table htab_ctl_table[]={
446 {
447 .ctl_name = KERN_PPC_L2CR,
448 .procname = "l2cr",
449 .mode = 0644,
450 .proc_handler = &proc_dol2crvec,
451 },
452 { 0, },
453 };
454 static ctl_table htab_sysctl_root[] = {
455 { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
456 { 0,},
457 };
458
459 static int __init
460 register_ppc_htab_sysctl(void)
461 {
462 register_sysctl_table(htab_sysctl_root, 0);
463
464 return 0;
465 }
466
467 __initcall(register_ppc_htab_sysctl);
468 #endif