d9196c9f93d9dd7c1cb075fa3e0b732cd0ba9993
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / mm / fault.c
1 /*
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/i386/mm/fault.c"
6 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
7 *
8 * Modified by Cort Dougan and Paul Mackerras.
9 *
10 * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18 #include <linux/signal.h>
19 #include <linux/sched.h>
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/string.h>
23 #include <linux/types.h>
24 #include <linux/ptrace.h>
25 #include <linux/mman.h>
26 #include <linux/mm.h>
27 #include <linux/interrupt.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/kprobes.h>
31 #include <linux/kdebug.h>
32 #include <linux/perf_event.h>
33 #include <linux/magic.h>
34 #include <linux/ratelimit.h>
35 #include <linux/context_tracking.h>
36
37 #include <asm/firmware.h>
38 #include <asm/page.h>
39 #include <asm/pgtable.h>
40 #include <asm/mmu.h>
41 #include <asm/mmu_context.h>
42 #include <asm/uaccess.h>
43 #include <asm/tlbflush.h>
44 #include <asm/siginfo.h>
45 #include <asm/debug.h>
46 #include <mm/mmu_decl.h>
47
48 #include "icswx.h"
49
50 #ifdef CONFIG_KPROBES
51 static inline int notify_page_fault(struct pt_regs *regs)
52 {
53 int ret = 0;
54
55 /* kprobe_running() needs smp_processor_id() */
56 if (!user_mode(regs)) {
57 preempt_disable();
58 if (kprobe_running() && kprobe_fault_handler(regs, 11))
59 ret = 1;
60 preempt_enable();
61 }
62
63 return ret;
64 }
65 #else
66 static inline int notify_page_fault(struct pt_regs *regs)
67 {
68 return 0;
69 }
70 #endif
71
72 /*
73 * Check whether the instruction at regs->nip is a store using
74 * an update addressing form which will update r1.
75 */
76 static int store_updates_sp(struct pt_regs *regs)
77 {
78 unsigned int inst;
79
80 if (get_user(inst, (unsigned int __user *)regs->nip))
81 return 0;
82 /* check for 1 in the rA field */
83 if (((inst >> 16) & 0x1f) != 1)
84 return 0;
85 /* check major opcode */
86 switch (inst >> 26) {
87 case 37: /* stwu */
88 case 39: /* stbu */
89 case 45: /* sthu */
90 case 53: /* stfsu */
91 case 55: /* stfdu */
92 return 1;
93 case 62: /* std or stdu */
94 return (inst & 3) == 1;
95 case 31:
96 /* check minor opcode */
97 switch ((inst >> 1) & 0x3ff) {
98 case 181: /* stdux */
99 case 183: /* stwux */
100 case 247: /* stbux */
101 case 439: /* sthux */
102 case 695: /* stfsux */
103 case 759: /* stfdux */
104 return 1;
105 }
106 }
107 return 0;
108 }
109 /*
110 * do_page_fault error handling helpers
111 */
112
113 #define MM_FAULT_RETURN 0
114 #define MM_FAULT_CONTINUE -1
115 #define MM_FAULT_ERR(sig) (sig)
116
117 static int do_sigbus(struct pt_regs *regs, unsigned long address)
118 {
119 siginfo_t info;
120
121 up_read(&current->mm->mmap_sem);
122
123 if (user_mode(regs)) {
124 current->thread.trap_nr = BUS_ADRERR;
125 info.si_signo = SIGBUS;
126 info.si_errno = 0;
127 info.si_code = BUS_ADRERR;
128 info.si_addr = (void __user *)address;
129 force_sig_info(SIGBUS, &info, current);
130 return MM_FAULT_RETURN;
131 }
132 return MM_FAULT_ERR(SIGBUS);
133 }
134
135 static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault)
136 {
137 /*
138 * Pagefault was interrupted by SIGKILL. We have no reason to
139 * continue the pagefault.
140 */
141 if (fatal_signal_pending(current)) {
142 /*
143 * If we have retry set, the mmap semaphore will have
144 * alrady been released in __lock_page_or_retry(). Else
145 * we release it now.
146 */
147 if (!(fault & VM_FAULT_RETRY))
148 up_read(&current->mm->mmap_sem);
149 /* Coming from kernel, we need to deal with uaccess fixups */
150 if (user_mode(regs))
151 return MM_FAULT_RETURN;
152 return MM_FAULT_ERR(SIGKILL);
153 }
154
155 /* No fault: be happy */
156 if (!(fault & VM_FAULT_ERROR))
157 return MM_FAULT_CONTINUE;
158
159 /* Out of memory */
160 if (fault & VM_FAULT_OOM) {
161 up_read(&current->mm->mmap_sem);
162
163 /*
164 * We ran out of memory, or some other thing happened to us that
165 * made us unable to handle the page fault gracefully.
166 */
167 if (!user_mode(regs))
168 return MM_FAULT_ERR(SIGKILL);
169 pagefault_out_of_memory();
170 return MM_FAULT_RETURN;
171 }
172
173 /* Bus error. x86 handles HWPOISON here, we'll add this if/when
174 * we support the feature in HW
175 */
176 if (fault & VM_FAULT_SIGBUS)
177 return do_sigbus(regs, addr);
178
179 /* We don't understand the fault code, this is fatal */
180 BUG();
181 return MM_FAULT_CONTINUE;
182 }
183
184 /*
185 * For 600- and 800-family processors, the error_code parameter is DSISR
186 * for a data fault, SRR1 for an instruction fault. For 400-family processors
187 * the error_code parameter is ESR for a data fault, 0 for an instruction
188 * fault.
189 * For 64-bit processors, the error_code parameter is
190 * - DSISR for a non-SLB data access fault,
191 * - SRR1 & 0x08000000 for a non-SLB instruction access fault
192 * - 0 any SLB fault.
193 *
194 * The return value is 0 if the fault was handled, or the signal
195 * number if this is a kernel fault that can't be handled here.
196 */
197 int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
198 unsigned long error_code)
199 {
200 enum ctx_state prev_state = exception_enter();
201 struct vm_area_struct * vma;
202 struct mm_struct *mm = current->mm;
203 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
204 int code = SEGV_MAPERR;
205 int is_write = 0;
206 int trap = TRAP(regs);
207 int is_exec = trap == 0x400;
208 int fault;
209 int rc = 0;
210
211 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
212 /*
213 * Fortunately the bit assignments in SRR1 for an instruction
214 * fault and DSISR for a data fault are mostly the same for the
215 * bits we are interested in. But there are some bits which
216 * indicate errors in DSISR but can validly be set in SRR1.
217 */
218 if (trap == 0x400)
219 error_code &= 0x48200000;
220 else
221 is_write = error_code & DSISR_ISSTORE;
222 #else
223 is_write = error_code & ESR_DST;
224 #endif /* CONFIG_4xx || CONFIG_BOOKE */
225
226 #ifdef CONFIG_PPC_ICSWX
227 /*
228 * we need to do this early because this "data storage
229 * interrupt" does not update the DAR/DEAR so we don't want to
230 * look at it
231 */
232 if (error_code & ICSWX_DSI_UCT) {
233 rc = acop_handle_fault(regs, address, error_code);
234 if (rc)
235 goto bail;
236 }
237 #endif /* CONFIG_PPC_ICSWX */
238
239 if (notify_page_fault(regs))
240 goto bail;
241
242 if (unlikely(debugger_fault_handler(regs)))
243 goto bail;
244
245 /* On a kernel SLB miss we can only check for a valid exception entry */
246 if (!user_mode(regs) && (address >= TASK_SIZE)) {
247 rc = SIGSEGV;
248 goto bail;
249 }
250
251 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
252 defined(CONFIG_PPC_BOOK3S_64))
253 if (error_code & DSISR_DABRMATCH) {
254 /* breakpoint match */
255 do_break(regs, address, error_code);
256 goto bail;
257 }
258 #endif
259
260 /* We restore the interrupt state now */
261 if (!arch_irq_disabled_regs(regs))
262 local_irq_enable();
263
264 if (in_atomic() || mm == NULL) {
265 if (!user_mode(regs)) {
266 rc = SIGSEGV;
267 goto bail;
268 }
269 /* in_atomic() in user mode is really bad,
270 as is current->mm == NULL. */
271 printk(KERN_EMERG "Page fault in user mode with "
272 "in_atomic() = %d mm = %p\n", in_atomic(), mm);
273 printk(KERN_EMERG "NIP = %lx MSR = %lx\n",
274 regs->nip, regs->msr);
275 die("Weird page fault", regs, SIGSEGV);
276 }
277
278 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
279
280 if (user_mode(regs))
281 flags |= FAULT_FLAG_USER;
282
283 /* When running in the kernel we expect faults to occur only to
284 * addresses in user space. All other faults represent errors in the
285 * kernel and should generate an OOPS. Unfortunately, in the case of an
286 * erroneous fault occurring in a code path which already holds mmap_sem
287 * we will deadlock attempting to validate the fault against the
288 * address space. Luckily the kernel only validly references user
289 * space from well defined areas of code, which are listed in the
290 * exceptions table.
291 *
292 * As the vast majority of faults will be valid we will only perform
293 * the source reference check when there is a possibility of a deadlock.
294 * Attempt to lock the address space, if we cannot we then validate the
295 * source. If this is invalid we can skip the address space check,
296 * thus avoiding the deadlock.
297 */
298 if (!down_read_trylock(&mm->mmap_sem)) {
299 if (!user_mode(regs) && !search_exception_tables(regs->nip))
300 goto bad_area_nosemaphore;
301
302 retry:
303 down_read(&mm->mmap_sem);
304 } else {
305 /*
306 * The above down_read_trylock() might have succeeded in
307 * which case we'll have missed the might_sleep() from
308 * down_read():
309 */
310 might_sleep();
311 }
312
313 vma = find_vma(mm, address);
314 if (!vma)
315 goto bad_area;
316 if (vma->vm_start <= address)
317 goto good_area;
318 if (!(vma->vm_flags & VM_GROWSDOWN))
319 goto bad_area;
320
321 /*
322 * N.B. The POWER/Open ABI allows programs to access up to
323 * 288 bytes below the stack pointer.
324 * The kernel signal delivery code writes up to about 1.5kB
325 * below the stack pointer (r1) before decrementing it.
326 * The exec code can write slightly over 640kB to the stack
327 * before setting the user r1. Thus we allow the stack to
328 * expand to 1MB without further checks.
329 */
330 if (address + 0x100000 < vma->vm_end) {
331 /* get user regs even if this fault is in kernel mode */
332 struct pt_regs *uregs = current->thread.regs;
333 if (uregs == NULL)
334 goto bad_area;
335
336 /*
337 * A user-mode access to an address a long way below
338 * the stack pointer is only valid if the instruction
339 * is one which would update the stack pointer to the
340 * address accessed if the instruction completed,
341 * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
342 * (or the byte, halfword, float or double forms).
343 *
344 * If we don't check this then any write to the area
345 * between the last mapped region and the stack will
346 * expand the stack rather than segfaulting.
347 */
348 if (address + 2048 < uregs->gpr[1]
349 && (!user_mode(regs) || !store_updates_sp(regs)))
350 goto bad_area;
351 }
352 if (expand_stack(vma, address))
353 goto bad_area;
354
355 good_area:
356 code = SEGV_ACCERR;
357 #if defined(CONFIG_6xx)
358 if (error_code & 0x95700000)
359 /* an error such as lwarx to I/O controller space,
360 address matching DABR, eciwx, etc. */
361 goto bad_area;
362 #endif /* CONFIG_6xx */
363 #if defined(CONFIG_8xx)
364 /* 8xx sometimes need to load a invalid/non-present TLBs.
365 * These must be invalidated separately as linux mm don't.
366 */
367 if (error_code & 0x40000000) /* no translation? */
368 _tlbil_va(address, 0, 0, 0);
369
370 /* The MPC8xx seems to always set 0x80000000, which is
371 * "undefined". Of those that can be set, this is the only
372 * one which seems bad.
373 */
374 if (error_code & 0x10000000)
375 /* Guarded storage error. */
376 goto bad_area;
377 #endif /* CONFIG_8xx */
378
379 if (is_exec) {
380 #ifdef CONFIG_PPC_STD_MMU
381 /* Protection fault on exec go straight to failure on
382 * Hash based MMUs as they either don't support per-page
383 * execute permission, or if they do, it's handled already
384 * at the hash level. This test would probably have to
385 * be removed if we change the way this works to make hash
386 * processors use the same I/D cache coherency mechanism
387 * as embedded.
388 */
389 if (error_code & DSISR_PROTFAULT)
390 goto bad_area;
391 #endif /* CONFIG_PPC_STD_MMU */
392
393 /*
394 * Allow execution from readable areas if the MMU does not
395 * provide separate controls over reading and executing.
396 *
397 * Note: That code used to not be enabled for 4xx/BookE.
398 * It is now as I/D cache coherency for these is done at
399 * set_pte_at() time and I see no reason why the test
400 * below wouldn't be valid on those processors. This -may-
401 * break programs compiled with a really old ABI though.
402 */
403 if (!(vma->vm_flags & VM_EXEC) &&
404 (cpu_has_feature(CPU_FTR_NOEXECUTE) ||
405 !(vma->vm_flags & (VM_READ | VM_WRITE))))
406 goto bad_area;
407 /* a write */
408 } else if (is_write) {
409 if (!(vma->vm_flags & VM_WRITE))
410 goto bad_area;
411 flags |= FAULT_FLAG_WRITE;
412 /* a read */
413 } else {
414 /* protection fault */
415 if (error_code & 0x08000000)
416 goto bad_area;
417 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
418 goto bad_area;
419 }
420
421 /*
422 * If for any reason at all we couldn't handle the fault,
423 * make sure we exit gracefully rather than endlessly redo
424 * the fault.
425 */
426 fault = handle_mm_fault(mm, vma, address, flags);
427 if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) {
428 rc = mm_fault_error(regs, address, fault);
429 if (rc >= MM_FAULT_RETURN)
430 goto bail;
431 else
432 rc = 0;
433 }
434
435 /*
436 * Major/minor page fault accounting is only done on the
437 * initial attempt. If we go through a retry, it is extremely
438 * likely that the page will be found in page cache at that point.
439 */
440 if (flags & FAULT_FLAG_ALLOW_RETRY) {
441 if (fault & VM_FAULT_MAJOR) {
442 current->maj_flt++;
443 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
444 regs, address);
445 #ifdef CONFIG_PPC_SMLPAR
446 if (firmware_has_feature(FW_FEATURE_CMO)) {
447 preempt_disable();
448 get_lppaca()->page_ins += (1 << PAGE_FACTOR);
449 preempt_enable();
450 }
451 #endif /* CONFIG_PPC_SMLPAR */
452 } else {
453 current->min_flt++;
454 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
455 regs, address);
456 }
457 if (fault & VM_FAULT_RETRY) {
458 /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
459 * of starvation. */
460 flags &= ~FAULT_FLAG_ALLOW_RETRY;
461 flags |= FAULT_FLAG_TRIED;
462 goto retry;
463 }
464 }
465
466 up_read(&mm->mmap_sem);
467 goto bail;
468
469 bad_area:
470 up_read(&mm->mmap_sem);
471
472 bad_area_nosemaphore:
473 /* User mode accesses cause a SIGSEGV */
474 if (user_mode(regs)) {
475 _exception(SIGSEGV, regs, code, address);
476 goto bail;
477 }
478
479 if (is_exec && (error_code & DSISR_PROTFAULT))
480 printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
481 " page (%lx) - exploit attempt? (uid: %d)\n",
482 address, from_kuid(&init_user_ns, current_uid()));
483
484 rc = SIGSEGV;
485
486 bail:
487 exception_exit(prev_state);
488 return rc;
489
490 }
491
492 /*
493 * bad_page_fault is called when we have a bad access from the kernel.
494 * It is called from the DSI and ISI handlers in head.S and from some
495 * of the procedures in traps.c.
496 */
497 void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
498 {
499 const struct exception_table_entry *entry;
500 unsigned long *stackend;
501
502 /* Are we prepared to handle this fault? */
503 if ((entry = search_exception_tables(regs->nip)) != NULL) {
504 regs->nip = entry->fixup;
505 return;
506 }
507
508 /* kernel has accessed a bad area */
509
510 switch (regs->trap) {
511 case 0x300:
512 case 0x380:
513 printk(KERN_ALERT "Unable to handle kernel paging request for "
514 "data at address 0x%08lx\n", regs->dar);
515 break;
516 case 0x400:
517 case 0x480:
518 printk(KERN_ALERT "Unable to handle kernel paging request for "
519 "instruction fetch\n");
520 break;
521 default:
522 printk(KERN_ALERT "Unable to handle kernel paging request for "
523 "unknown fault\n");
524 break;
525 }
526 printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
527 regs->nip);
528
529 stackend = end_of_stack(current);
530 if (current != &init_task && *stackend != STACK_END_MAGIC)
531 printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
532
533 die("Kernel access of bad area", regs, sig);
534 }