arch/powerpc/kernel/power7-pmu.c

   1 /*
   2  * Performance counter support for POWER7 processors.
   3  *
   4  * Copyright 2009 Paul Mackerras, IBM Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/perf_counter.h>
  13 #include <asm/reg.h>
  14
  15 /*
  16  * Bits in event code for POWER7
  17  */
  18 #define PM_PMC_SH       16      /* PMC number (1-based) for direct events */
  19 #define PM_PMC_MSK      0xf
  20 #define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
  21 #define PM_UNIT_SH      12      /* TTMMUX number and setting - unit select */
  22 #define PM_UNIT_MSK     0xf
  23 #define PM_COMBINE_SH   11      /* Combined event bit */
  24 #define PM_COMBINE_MSK  1
  25 #define PM_COMBINE_MSKS 0x800
  26 #define PM_L2SEL_SH     8       /* L2 event select */
  27 #define PM_L2SEL_MSK    7
  28 #define PM_PMCSEL_MSK   0xff
  29
  30 /*
  31  * Bits in MMCR1 for POWER7
  32  */
  33 #define MMCR1_TTM0SEL_SH        60
  34 #define MMCR1_TTM1SEL_SH        56
  35 #define MMCR1_TTM2SEL_SH        52
  36 #define MMCR1_TTM3SEL_SH        48
  37 #define MMCR1_TTMSEL_MSK        0xf
  38 #define MMCR1_L2SEL_SH          45
  39 #define MMCR1_L2SEL_MSK         7
  40 #define MMCR1_PMC1_COMBINE_SH   35
  41 #define MMCR1_PMC2_COMBINE_SH   34
  42 #define MMCR1_PMC3_COMBINE_SH   33
  43 #define MMCR1_PMC4_COMBINE_SH   32
  44 #define MMCR1_PMC1SEL_SH        24
  45 #define MMCR1_PMC2SEL_SH        16
  46 #define MMCR1_PMC3SEL_SH        8
  47 #define MMCR1_PMC4SEL_SH        0
  48 #define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
  49 #define MMCR1_PMCSEL_MSK        0xff
  50
  51 /*
  52  * Bits in MMCRA
  53  */
  54
  55 /*
  56  * Layout of constraint bits:
  57  * 6666555555555544444444443333333333222222222211111111110000000000
  58  * 3210987654321098765432109876543210987654321098765432109876543210
  59  *                                                 [  ><><><><><><>
  60  *                                                  NC P6P5P4P3P2P1
  61  *
  62  * NC - number of counters
  63  *     15: NC error 0x8000
  64  *     12-14: number of events needing PMC1-4 0x7000
  65  *
  66  * P6
  67  *     11: P6 error 0x800
  68  *     10-11: Count of events needing PMC6
  69  *
  70  * P1..P5
  71  *     0-9: Count of events needing PMC1..PMC5
  72  */
  73
  74 static int power7_get_constraint(u64 event, u64 *maskp, u64 *valp)
  75 {
  76         int pmc, sh;
  77         u64 mask = 0, value = 0;
  78
  79         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
  80         if (pmc) {
  81                 if (pmc > 6)
  82                         return -1;
  83                 sh = (pmc - 1) * 2;
  84                 mask |= 2 << sh;
  85                 value |= 1 << sh;
  86                 if (pmc >= 5 && !(event == 0x500fa || event == 0x600f4))
  87                         return -1;
  88         }
  89         if (pmc < 5) {
  90                 /* need a counter from PMC1-4 set */
  91                 mask  |= 0x8000;
  92                 value |= 0x1000;
  93         }
  94         *maskp = mask;
  95         *valp = value;
  96         return 0;
  97 }
  98
  99 #define MAX_ALT 2       /* at most 2 alternatives for any event */
 100
 101 static const unsigned int event_alternatives[][MAX_ALT] = {
 102         { 0x200f2, 0x300f2 },           /* PM_INST_DISP */
 103         { 0x200f4, 0x600f4 },           /* PM_RUN_CYC */
 104         { 0x400fa, 0x500fa },           /* PM_RUN_INST_CMPL */
 105 };
 106
 107 /*
 108  * Scan the alternatives table for a match and return the
 109  * index into the alternatives table if found, else -1.
 110  */
 111 static int find_alternative(u64 event)
 112 {
 113         int i, j;
 114
 115         for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
 116                 if (event < event_alternatives[i][0])
 117                         break;
 118                 for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
 119                         if (event == event_alternatives[i][j])
 120                                 return i;
 121         }
 122         return -1;
 123 }
 124
 125 static s64 find_alternative_decode(u64 event)
 126 {
 127         int pmc, psel;
 128
 129         /* this only handles the 4x decode events */
 130         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
 131         psel = event & PM_PMCSEL_MSK;
 132         if ((pmc == 2 || pmc == 4) && (psel & ~7) == 0x40)
 133                 return event - (1 << PM_PMC_SH) + 8;
 134         if ((pmc == 1 || pmc == 3) && (psel & ~7) == 0x48)
 135                 return event + (1 << PM_PMC_SH) - 8;
 136         return -1;
 137 }
 138
 139 static int power7_get_alternatives(u64 event, unsigned int flags, u64 alt[])
 140 {
 141         int i, j, nalt = 1;
 142         s64 ae;
 143
 144         alt[0] = event;
 145         nalt = 1;
 146         i = find_alternative(event);
 147         if (i >= 0) {
 148                 for (j = 0; j < MAX_ALT; ++j) {
 149                         ae = event_alternatives[i][j];
 150                         if (ae && ae != event)
 151                                 alt[nalt++] = ae;
 152                 }
 153         } else {
 154                 ae = find_alternative_decode(event);
 155                 if (ae > 0)
 156                         alt[nalt++] = ae;
 157         }
 158
 159         if (flags & PPMU_ONLY_COUNT_RUN) {
 160                 /*
 161                  * We're only counting in RUN state,
 162                  * so PM_CYC is equivalent to PM_RUN_CYC
 163                  * and PM_INST_CMPL === PM_RUN_INST_CMPL.
 164                  * This doesn't include alternatives that don't provide
 165                  * any extra flexibility in assigning PMCs.
 166                  */
 167                 j = nalt;
 168                 for (i = 0; i < nalt; ++i) {
 169                         switch (alt[i]) {
 170                         case 0x1e:      /* PM_CYC */
 171                                 alt[j++] = 0x600f4;     /* PM_RUN_CYC */
 172                                 break;
 173                         case 0x600f4:   /* PM_RUN_CYC */
 174                                 alt[j++] = 0x1e;
 175                                 break;
 176                         case 0x2:       /* PM_PPC_CMPL */
 177                                 alt[j++] = 0x500fa;     /* PM_RUN_INST_CMPL */
 178                                 break;
 179                         case 0x500fa:   /* PM_RUN_INST_CMPL */
 180                                 alt[j++] = 0x2; /* PM_PPC_CMPL */
 181                                 break;
 182                         }
 183                 }
 184                 nalt = j;
 185         }
 186
 187         return nalt;
 188 }
 189
 190 /*
 191  * Returns 1 if event counts things relating to marked instructions
 192  * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
 193  */
 194 static int power7_marked_instr_event(u64 event)
 195 {
 196         int pmc, psel;
 197         int unit;
 198
 199         pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
 200         unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
 201         psel = event & PM_PMCSEL_MSK & ~1;      /* trim off edge/level bit */
 202         if (pmc >= 5)
 203                 return 0;
 204
 205         switch (psel >> 4) {
 206         case 2:
 207                 return pmc == 2 || pmc == 4;
 208         case 3:
 209                 if (psel == 0x3c)
 210                         return pmc == 1;
 211                 if (psel == 0x3e)
 212                         return pmc != 2;
 213                 return 1;
 214         case 4:
 215         case 5:
 216                 return unit == 0xd;
 217         case 6:
 218                 if (psel == 0x64)
 219                         return pmc >= 3;
 220         case 8:
 221                 return unit == 0xd;
 222         }
 223         return 0;
 224 }
 225
 226 static int power7_compute_mmcr(u64 event[], int n_ev,
 227                                unsigned int hwc[], u64 mmcr[])
 228 {
 229         u64 mmcr1 = 0;
 230         u64 mmcra = 0;
 231         unsigned int pmc, unit, combine, l2sel, psel;
 232         unsigned int pmc_inuse = 0;
 233         int i;
 234
 235         /* First pass to count resource use */
 236         for (i = 0; i < n_ev; ++i) {
 237                 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
 238                 if (pmc) {
 239                         if (pmc > 6)
 240                                 return -1;
 241                         if (pmc_inuse & (1 << (pmc - 1)))
 242                                 return -1;
 243                         pmc_inuse |= 1 << (pmc - 1);
 244                 }
 245         }
 246
 247         /* Second pass: assign PMCs, set all MMCR1 fields */
 248         for (i = 0; i < n_ev; ++i) {
 249                 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
 250                 unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
 251                 combine = (event[i] >> PM_COMBINE_SH) & PM_COMBINE_MSK;
 252                 l2sel = (event[i] >> PM_L2SEL_SH) & PM_L2SEL_MSK;
 253                 psel = event[i] & PM_PMCSEL_MSK;
 254                 if (!pmc) {
 255                         /* Bus event or any-PMC direct event */
 256                         for (pmc = 0; pmc < 4; ++pmc) {
 257                                 if (!(pmc_inuse & (1 << pmc)))
 258                                         break;
 259                         }
 260                         if (pmc >= 4)
 261                                 return -1;
 262                         pmc_inuse |= 1 << pmc;
 263                 } else {
 264                         /* Direct or decoded event */
 265                         --pmc;
 266                 }
 267                 if (pmc <= 3) {
 268                         mmcr1 |= (u64) unit << (MMCR1_TTM0SEL_SH - 4 * pmc);
 269                         mmcr1 |= (u64) combine << (MMCR1_PMC1_COMBINE_SH - pmc);
 270                         mmcr1 |= psel << MMCR1_PMCSEL_SH(pmc);
 271                         if (unit == 6)  /* L2 events */
 272                                 mmcr1 |= (u64) l2sel << MMCR1_L2SEL_SH;
 273                 }
 274                 if (power7_marked_instr_event(event[i]))
 275                         mmcra |= MMCRA_SAMPLE_ENABLE;
 276                 hwc[i] = pmc;
 277         }
 278
 279         /* Return MMCRx values */
 280         mmcr[0] = 0;
 281         if (pmc_inuse & 1)
 282                 mmcr[0] = MMCR0_PMC1CE;
 283         if (pmc_inuse & 0x3e)
 284                 mmcr[0] |= MMCR0_PMCjCE;
 285         mmcr[1] = mmcr1;
 286         mmcr[2] = mmcra;
 287         return 0;
 288 }
 289
 290 static void power7_disable_pmc(unsigned int pmc, u64 mmcr[])
 291 {
 292         if (pmc <= 3)
 293                 mmcr[1] &= ~(0xffULL << MMCR1_PMCSEL_SH(pmc));
 294 }
 295
 296 static int power7_generic_events[] = {
 297         [PERF_COUNT_CPU_CYCLES] = 0x1e,
 298         [PERF_COUNT_INSTRUCTIONS] = 2,
 299         [PERF_COUNT_CACHE_REFERENCES] = 0xc880,         /* LD_REF_L1_LSU */
 300         [PERF_COUNT_CACHE_MISSES] = 0x400f0,            /* LD_MISS_L1 */
 301         [PERF_COUNT_BRANCH_INSTRUCTIONS] = 0x10068,     /* BRU_FIN */
 302         [PERF_COUNT_BRANCH_MISSES] = 0x400f6,           /* BR_MPRED */
 303 };
 304
 305 #define C(x)    PERF_COUNT_HW_CACHE_##x
 306
 307 /*
 308  * Table of generalized cache-related events.
 309  * 0 means not supported, -1 means nonsensical, other values
 310  * are event codes.
 311  */
 312 static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
 313         [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
 314                 [C(OP_READ)] = {        0x400f0,        0xc880  },
 315                 [C(OP_WRITE)] = {       0,              0x300f0 },
 316                 [C(OP_PREFETCH)] = {    0xd8b8,         0       },
 317         },
 318         [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
 319                 [C(OP_READ)] = {        0,              0x200fc },
 320                 [C(OP_WRITE)] = {       -1,             -1      },
 321                 [C(OP_PREFETCH)] = {    0x408a,         0       },
 322         },
 323         [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
 324                 [C(OP_READ)] = {        0x6080,         0x6084  },
 325                 [C(OP_WRITE)] = {       0x6082,         0x6086  },
 326                 [C(OP_PREFETCH)] = {    0,              0       },
 327         },
 328         [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
 329                 [C(OP_READ)] = {        0,              0x300fc },
 330                 [C(OP_WRITE)] = {       -1,             -1      },
 331                 [C(OP_PREFETCH)] = {    -1,             -1      },
 332         },
 333         [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
 334                 [C(OP_READ)] = {        0,              0x400fc },
 335                 [C(OP_WRITE)] = {       -1,             -1      },
 336                 [C(OP_PREFETCH)] = {    -1,             -1      },
 337         },
 338         [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
 339                 [C(OP_READ)] = {        0x10068,        0x400f6 },
 340                 [C(OP_WRITE)] = {       -1,             -1      },
 341                 [C(OP_PREFETCH)] = {    -1,             -1      },
 342         },
 343 };
 344
 345 struct power_pmu power7_pmu = {
 346         .n_counter = 6,
 347         .max_alternatives = MAX_ALT + 1,
 348         .add_fields = 0x1555ull,
 349         .test_adder = 0x3000ull,
 350         .compute_mmcr = power7_compute_mmcr,
 351         .get_constraint = power7_get_constraint,
 352         .get_alternatives = power7_get_alternatives,
 353         .disable_pmc = power7_disable_pmc,
 354         .n_generic = ARRAY_SIZE(power7_generic_events),
 355         .generic_events = power7_generic_events,
 356         .cache_events = &power7_cache_events,
 357 };