powerpc: Rework runlatch code
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / exceptions-64s.S
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/exception-64s.h>
16 #include <asm/ptrace.h>
17
18 /*
19 * We layout physical memory as follows:
20 * 0x0000 - 0x00ff : Secondary processor spin code
21 * 0x0100 - 0x2fff : pSeries Interrupt prologs
22 * 0x3000 - 0x5fff : interrupt support common interrupt prologs
23 * 0x6000 - 0x6fff : Initial (CPU0) segment table
24 * 0x7000 - 0x7fff : FWNMI data area
25 * 0x8000 - : Early init and support code
26 */
27
28 /*
29 * This is the start of the interrupt handlers for pSeries
30 * This code runs with relocation off.
31 * Code from here to __end_interrupts gets copied down to real
32 * address 0x100 when we are running a relocatable kernel.
33 * Therefore any relative branches in this section must only
34 * branch to labels in this section.
35 */
36 . = 0x100
37 .globl __start_interrupts
38 __start_interrupts:
39
40 .globl system_reset_pSeries;
41 system_reset_pSeries:
42 HMT_MEDIUM;
43 SET_SCRATCH0(r13)
44 #ifdef CONFIG_PPC_P7_NAP
45 BEGIN_FTR_SECTION
46 /* Running native on arch 2.06 or later, check if we are
47 * waking up from nap. We only handle no state loss and
48 * supervisor state loss. We do -not- handle hypervisor
49 * state loss at this time.
50 */
51 mfspr r13,SPRN_SRR1
52 rlwinm. r13,r13,47-31,30,31
53 beq 9f
54
55 /* waking up from powersave (nap) state */
56 cmpwi cr1,r13,2
57 /* Total loss of HV state is fatal, we could try to use the
58 * PIR to locate a PACA, then use an emergency stack etc...
59 * but for now, let's just stay stuck here
60 */
61 bgt cr1,.
62 GET_PACA(r13)
63
64 #ifdef CONFIG_KVM_BOOK3S_64_HV
65 lbz r0,PACAPROCSTART(r13)
66 cmpwi r0,0x80
67 bne 1f
68 li r0,1
69 stb r0,PACAPROCSTART(r13)
70 b kvm_start_guest
71 1:
72 #endif
73
74 beq cr1,2f
75 b .power7_wakeup_noloss
76 2: b .power7_wakeup_loss
77 9:
78 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
79 #endif /* CONFIG_PPC_P7_NAP */
80 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
81 NOTEST, 0x100)
82
83 . = 0x200
84 machine_check_pSeries_1:
85 /* This is moved out of line as it can be patched by FW, but
86 * some code path might still want to branch into the original
87 * vector
88 */
89 b machine_check_pSeries
90
91 . = 0x300
92 .globl data_access_pSeries
93 data_access_pSeries:
94 HMT_MEDIUM
95 SET_SCRATCH0(r13)
96 #ifndef CONFIG_POWER4_ONLY
97 BEGIN_FTR_SECTION
98 b data_access_check_stab
99 data_access_not_stab:
100 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
101 #endif
102 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
103 KVMTEST_PR, 0x300)
104
105 . = 0x380
106 .globl data_access_slb_pSeries
107 data_access_slb_pSeries:
108 HMT_MEDIUM
109 SET_SCRATCH0(r13)
110 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
111 std r3,PACA_EXSLB+EX_R3(r13)
112 mfspr r3,SPRN_DAR
113 #ifdef __DISABLED__
114 /* Keep that around for when we re-implement dynamic VSIDs */
115 cmpdi r3,0
116 bge slb_miss_user_pseries
117 #endif /* __DISABLED__ */
118 mfspr r12,SPRN_SRR1
119 #ifndef CONFIG_RELOCATABLE
120 b .slb_miss_realmode
121 #else
122 /*
123 * We can't just use a direct branch to .slb_miss_realmode
124 * because the distance from here to there depends on where
125 * the kernel ends up being put.
126 */
127 mfctr r11
128 ld r10,PACAKBASE(r13)
129 LOAD_HANDLER(r10, .slb_miss_realmode)
130 mtctr r10
131 bctr
132 #endif
133
134 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
135
136 . = 0x480
137 .globl instruction_access_slb_pSeries
138 instruction_access_slb_pSeries:
139 HMT_MEDIUM
140 SET_SCRATCH0(r13)
141 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
142 std r3,PACA_EXSLB+EX_R3(r13)
143 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
144 #ifdef __DISABLED__
145 /* Keep that around for when we re-implement dynamic VSIDs */
146 cmpdi r3,0
147 bge slb_miss_user_pseries
148 #endif /* __DISABLED__ */
149 mfspr r12,SPRN_SRR1
150 #ifndef CONFIG_RELOCATABLE
151 b .slb_miss_realmode
152 #else
153 mfctr r11
154 ld r10,PACAKBASE(r13)
155 LOAD_HANDLER(r10, .slb_miss_realmode)
156 mtctr r10
157 bctr
158 #endif
159
160 /* We open code these as we can't have a ". = x" (even with
161 * x = "." within a feature section
162 */
163 . = 0x500;
164 .globl hardware_interrupt_pSeries;
165 .globl hardware_interrupt_hv;
166 hardware_interrupt_pSeries:
167 hardware_interrupt_hv:
168 BEGIN_FTR_SECTION
169 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
170 EXC_HV, SOFTEN_TEST_HV)
171 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
172 FTR_SECTION_ELSE
173 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
174 EXC_STD, SOFTEN_TEST_HV_201)
175 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
176 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
177
178 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
179 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
180
181 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
182 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
183
184 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
185 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
186
187 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
188 MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
189
190 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
191 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
192
193 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
194 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
195
196 . = 0xc00
197 .globl system_call_pSeries
198 system_call_pSeries:
199 HMT_MEDIUM
200 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
201 SET_SCRATCH0(r13)
202 GET_PACA(r13)
203 std r9,PACA_EXGEN+EX_R9(r13)
204 std r10,PACA_EXGEN+EX_R10(r13)
205 mfcr r9
206 KVMTEST(0xc00)
207 GET_SCRATCH0(r13)
208 #endif
209 BEGIN_FTR_SECTION
210 cmpdi r0,0x1ebe
211 beq- 1f
212 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
213 mr r9,r13
214 GET_PACA(r13)
215 mfspr r11,SPRN_SRR0
216 mfspr r12,SPRN_SRR1
217 ld r10,PACAKBASE(r13)
218 LOAD_HANDLER(r10, system_call_entry)
219 mtspr SPRN_SRR0,r10
220 ld r10,PACAKMSR(r13)
221 mtspr SPRN_SRR1,r10
222 rfid
223 b . /* prevent speculative execution */
224
225 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
226
227 /* Fast LE/BE switch system call */
228 1: mfspr r12,SPRN_SRR1
229 xori r12,r12,MSR_LE
230 mtspr SPRN_SRR1,r12
231 rfid /* return to userspace */
232 b .
233
234 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
235 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
236
237 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
238 * out of line to handle them
239 */
240 . = 0xe00
241 b h_data_storage_hv
242 . = 0xe20
243 b h_instr_storage_hv
244 . = 0xe40
245 b emulation_assist_hv
246 . = 0xe50
247 b hmi_exception_hv
248 . = 0xe60
249 b hmi_exception_hv
250
251 /* We need to deal with the Altivec unavailable exception
252 * here which is at 0xf20, thus in the middle of the
253 * prolog code of the PerformanceMonitor one. A little
254 * trickery is thus necessary
255 */
256 performance_monitor_pSeries_1:
257 . = 0xf00
258 b performance_monitor_pSeries
259
260 altivec_unavailable_pSeries_1:
261 . = 0xf20
262 b altivec_unavailable_pSeries
263
264 vsx_unavailable_pSeries_1:
265 . = 0xf40
266 b vsx_unavailable_pSeries
267
268 #ifdef CONFIG_CBE_RAS
269 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
270 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
271 #endif /* CONFIG_CBE_RAS */
272
273 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
274 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
275
276 #ifdef CONFIG_CBE_RAS
277 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
278 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
279 #endif /* CONFIG_CBE_RAS */
280
281 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
282 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
283
284 #ifdef CONFIG_CBE_RAS
285 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
286 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
287 #endif /* CONFIG_CBE_RAS */
288
289 . = 0x3000
290
291 /*** Out of line interrupts support ***/
292
293 /* moved from 0x200 */
294 machine_check_pSeries:
295 .globl machine_check_fwnmi
296 machine_check_fwnmi:
297 HMT_MEDIUM
298 SET_SCRATCH0(r13) /* save r13 */
299 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
300 EXC_STD, KVMTEST, 0x200)
301 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
302
303 #ifndef CONFIG_POWER4_ONLY
304 /* moved from 0x300 */
305 data_access_check_stab:
306 GET_PACA(r13)
307 std r9,PACA_EXSLB+EX_R9(r13)
308 std r10,PACA_EXSLB+EX_R10(r13)
309 mfspr r10,SPRN_DAR
310 mfspr r9,SPRN_DSISR
311 srdi r10,r10,60
312 rlwimi r10,r9,16,0x20
313 #ifdef CONFIG_KVM_BOOK3S_PR
314 lbz r9,HSTATE_IN_GUEST(r13)
315 rlwimi r10,r9,8,0x300
316 #endif
317 mfcr r9
318 cmpwi r10,0x2c
319 beq do_stab_bolted_pSeries
320 mtcrf 0x80,r9
321 ld r9,PACA_EXSLB+EX_R9(r13)
322 ld r10,PACA_EXSLB+EX_R10(r13)
323 b data_access_not_stab
324 do_stab_bolted_pSeries:
325 std r11,PACA_EXSLB+EX_R11(r13)
326 std r12,PACA_EXSLB+EX_R12(r13)
327 GET_SCRATCH0(r10)
328 std r10,PACA_EXSLB+EX_R13(r13)
329 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
330 #endif /* CONFIG_POWER4_ONLY */
331
332 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x300)
333 KVM_HANDLER_PR_SKIP(PACA_EXSLB, EXC_STD, 0x380)
334 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
335 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
336 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
337 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
338
339 .align 7
340 /* moved from 0xe00 */
341 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
342 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
343 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
344 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
345 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
346 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
347 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
348 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
349
350 /* moved from 0xf00 */
351 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
352 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
353 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
354 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
355 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
356 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
357
358 /*
359 * An interrupt came in while soft-disabled; clear EE in SRR1,
360 * clear paca->hard_enabled and return.
361 */
362 masked_interrupt:
363 stb r10,PACAHARDIRQEN(r13)
364 mtcrf 0x80,r9
365 ld r9,PACA_EXGEN+EX_R9(r13)
366 mfspr r10,SPRN_SRR1
367 rldicl r10,r10,48,1 /* clear MSR_EE */
368 rotldi r10,r10,16
369 mtspr SPRN_SRR1,r10
370 ld r10,PACA_EXGEN+EX_R10(r13)
371 GET_SCRATCH0(r13)
372 rfid
373 b .
374
375 masked_Hinterrupt:
376 stb r10,PACAHARDIRQEN(r13)
377 mtcrf 0x80,r9
378 ld r9,PACA_EXGEN+EX_R9(r13)
379 mfspr r10,SPRN_HSRR1
380 rldicl r10,r10,48,1 /* clear MSR_EE */
381 rotldi r10,r10,16
382 mtspr SPRN_HSRR1,r10
383 ld r10,PACA_EXGEN+EX_R10(r13)
384 GET_SCRATCH0(r13)
385 hrfid
386 b .
387
388 #ifdef CONFIG_PPC_PSERIES
389 /*
390 * Vectors for the FWNMI option. Share common code.
391 */
392 .globl system_reset_fwnmi
393 .align 7
394 system_reset_fwnmi:
395 HMT_MEDIUM
396 SET_SCRATCH0(r13) /* save r13 */
397 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
398 NOTEST, 0x100)
399
400 #endif /* CONFIG_PPC_PSERIES */
401
402 #ifdef __DISABLED__
403 /*
404 * This is used for when the SLB miss handler has to go virtual,
405 * which doesn't happen for now anymore but will once we re-implement
406 * dynamic VSIDs for shared page tables
407 */
408 slb_miss_user_pseries:
409 std r10,PACA_EXGEN+EX_R10(r13)
410 std r11,PACA_EXGEN+EX_R11(r13)
411 std r12,PACA_EXGEN+EX_R12(r13)
412 GET_SCRATCH0(r10)
413 ld r11,PACA_EXSLB+EX_R9(r13)
414 ld r12,PACA_EXSLB+EX_R3(r13)
415 std r10,PACA_EXGEN+EX_R13(r13)
416 std r11,PACA_EXGEN+EX_R9(r13)
417 std r12,PACA_EXGEN+EX_R3(r13)
418 clrrdi r12,r13,32
419 mfmsr r10
420 mfspr r11,SRR0 /* save SRR0 */
421 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
422 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
423 mtspr SRR0,r12
424 mfspr r12,SRR1 /* and SRR1 */
425 mtspr SRR1,r10
426 rfid
427 b . /* prevent spec. execution */
428 #endif /* __DISABLED__ */
429
430 .align 7
431 .globl __end_interrupts
432 __end_interrupts:
433
434 /*
435 * Code from here down to __end_handlers is invoked from the
436 * exception prologs above. Because the prologs assemble the
437 * addresses of these handlers using the LOAD_HANDLER macro,
438 * which uses an addi instruction, these handlers must be in
439 * the first 32k of the kernel image.
440 */
441
442 /*** Common interrupt handlers ***/
443
444 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
445
446 /*
447 * Machine check is different because we use a different
448 * save area: PACA_EXMC instead of PACA_EXGEN.
449 */
450 .align 7
451 .globl machine_check_common
452 machine_check_common:
453 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
454 FINISH_NAP
455 DISABLE_INTS
456 bl .save_nvgprs
457 addi r3,r1,STACK_FRAME_OVERHEAD
458 bl .machine_check_exception
459 b .ret_from_except
460
461 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
462 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
463 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
464 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
465 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
466 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
467 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
468 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
469 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
470 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
471 #ifdef CONFIG_ALTIVEC
472 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
473 #else
474 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
475 #endif
476 #ifdef CONFIG_CBE_RAS
477 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
478 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
479 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
480 #endif /* CONFIG_CBE_RAS */
481
482 .align 7
483 system_call_entry:
484 b system_call_common
485
486 ppc64_runlatch_on_trampoline:
487 b .__ppc64_runlatch_on
488
489 /*
490 * Here we have detected that the kernel stack pointer is bad.
491 * R9 contains the saved CR, r13 points to the paca,
492 * r10 contains the (bad) kernel stack pointer,
493 * r11 and r12 contain the saved SRR0 and SRR1.
494 * We switch to using an emergency stack, save the registers there,
495 * and call kernel_bad_stack(), which panics.
496 */
497 bad_stack:
498 ld r1,PACAEMERGSP(r13)
499 subi r1,r1,64+INT_FRAME_SIZE
500 std r9,_CCR(r1)
501 std r10,GPR1(r1)
502 std r11,_NIP(r1)
503 std r12,_MSR(r1)
504 mfspr r11,SPRN_DAR
505 mfspr r12,SPRN_DSISR
506 std r11,_DAR(r1)
507 std r12,_DSISR(r1)
508 mflr r10
509 mfctr r11
510 mfxer r12
511 std r10,_LINK(r1)
512 std r11,_CTR(r1)
513 std r12,_XER(r1)
514 SAVE_GPR(0,r1)
515 SAVE_GPR(2,r1)
516 ld r10,EX_R3(r3)
517 std r10,GPR3(r1)
518 SAVE_GPR(4,r1)
519 SAVE_4GPRS(5,r1)
520 ld r9,EX_R9(r3)
521 ld r10,EX_R10(r3)
522 SAVE_2GPRS(9,r1)
523 ld r9,EX_R11(r3)
524 ld r10,EX_R12(r3)
525 ld r11,EX_R13(r3)
526 std r9,GPR11(r1)
527 std r10,GPR12(r1)
528 std r11,GPR13(r1)
529 BEGIN_FTR_SECTION
530 ld r10,EX_CFAR(r3)
531 std r10,ORIG_GPR3(r1)
532 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
533 SAVE_8GPRS(14,r1)
534 SAVE_10GPRS(22,r1)
535 lhz r12,PACA_TRAP_SAVE(r13)
536 std r12,_TRAP(r1)
537 addi r11,r1,INT_FRAME_SIZE
538 std r11,0(r1)
539 li r12,0
540 std r12,0(r11)
541 ld r2,PACATOC(r13)
542 ld r11,exception_marker@toc(r2)
543 std r12,RESULT(r1)
544 std r11,STACK_FRAME_OVERHEAD-16(r1)
545 1: addi r3,r1,STACK_FRAME_OVERHEAD
546 bl .kernel_bad_stack
547 b 1b
548
549 /*
550 * Here r13 points to the paca, r9 contains the saved CR,
551 * SRR0 and SRR1 are saved in r11 and r12,
552 * r9 - r13 are saved in paca->exgen.
553 */
554 .align 7
555 .globl data_access_common
556 data_access_common:
557 mfspr r10,SPRN_DAR
558 std r10,PACA_EXGEN+EX_DAR(r13)
559 mfspr r10,SPRN_DSISR
560 stw r10,PACA_EXGEN+EX_DSISR(r13)
561 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
562 ld r3,PACA_EXGEN+EX_DAR(r13)
563 lwz r4,PACA_EXGEN+EX_DSISR(r13)
564 li r5,0x300
565 b .do_hash_page /* Try to handle as hpte fault */
566
567 .align 7
568 .globl h_data_storage_common
569 h_data_storage_common:
570 mfspr r10,SPRN_HDAR
571 std r10,PACA_EXGEN+EX_DAR(r13)
572 mfspr r10,SPRN_HDSISR
573 stw r10,PACA_EXGEN+EX_DSISR(r13)
574 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
575 bl .save_nvgprs
576 addi r3,r1,STACK_FRAME_OVERHEAD
577 bl .unknown_exception
578 b .ret_from_except
579
580 .align 7
581 .globl instruction_access_common
582 instruction_access_common:
583 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
584 ld r3,_NIP(r1)
585 andis. r4,r12,0x5820
586 li r5,0x400
587 b .do_hash_page /* Try to handle as hpte fault */
588
589 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
590
591 /*
592 * Here is the common SLB miss user that is used when going to virtual
593 * mode for SLB misses, that is currently not used
594 */
595 #ifdef __DISABLED__
596 .align 7
597 .globl slb_miss_user_common
598 slb_miss_user_common:
599 mflr r10
600 std r3,PACA_EXGEN+EX_DAR(r13)
601 stw r9,PACA_EXGEN+EX_CCR(r13)
602 std r10,PACA_EXGEN+EX_LR(r13)
603 std r11,PACA_EXGEN+EX_SRR0(r13)
604 bl .slb_allocate_user
605
606 ld r10,PACA_EXGEN+EX_LR(r13)
607 ld r3,PACA_EXGEN+EX_R3(r13)
608 lwz r9,PACA_EXGEN+EX_CCR(r13)
609 ld r11,PACA_EXGEN+EX_SRR0(r13)
610 mtlr r10
611 beq- slb_miss_fault
612
613 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
614 beq- unrecov_user_slb
615 mfmsr r10
616
617 .machine push
618 .machine "power4"
619 mtcrf 0x80,r9
620 .machine pop
621
622 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
623 mtmsrd r10,1
624
625 mtspr SRR0,r11
626 mtspr SRR1,r12
627
628 ld r9,PACA_EXGEN+EX_R9(r13)
629 ld r10,PACA_EXGEN+EX_R10(r13)
630 ld r11,PACA_EXGEN+EX_R11(r13)
631 ld r12,PACA_EXGEN+EX_R12(r13)
632 ld r13,PACA_EXGEN+EX_R13(r13)
633 rfid
634 b .
635
636 slb_miss_fault:
637 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
638 ld r4,PACA_EXGEN+EX_DAR(r13)
639 li r5,0
640 std r4,_DAR(r1)
641 std r5,_DSISR(r1)
642 b handle_page_fault
643
644 unrecov_user_slb:
645 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
646 DISABLE_INTS
647 bl .save_nvgprs
648 1: addi r3,r1,STACK_FRAME_OVERHEAD
649 bl .unrecoverable_exception
650 b 1b
651
652 #endif /* __DISABLED__ */
653
654
655 /*
656 * r13 points to the PACA, r9 contains the saved CR,
657 * r12 contain the saved SRR1, SRR0 is still ready for return
658 * r3 has the faulting address
659 * r9 - r13 are saved in paca->exslb.
660 * r3 is saved in paca->slb_r3
661 * We assume we aren't going to take any exceptions during this procedure.
662 */
663 _GLOBAL(slb_miss_realmode)
664 mflr r10
665 #ifdef CONFIG_RELOCATABLE
666 mtctr r11
667 #endif
668
669 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
670 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
671
672 bl .slb_allocate_realmode
673
674 /* All done -- return from exception. */
675
676 ld r10,PACA_EXSLB+EX_LR(r13)
677 ld r3,PACA_EXSLB+EX_R3(r13)
678 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
679
680 mtlr r10
681
682 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
683 beq- 2f
684
685 .machine push
686 .machine "power4"
687 mtcrf 0x80,r9
688 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
689 .machine pop
690
691 ld r9,PACA_EXSLB+EX_R9(r13)
692 ld r10,PACA_EXSLB+EX_R10(r13)
693 ld r11,PACA_EXSLB+EX_R11(r13)
694 ld r12,PACA_EXSLB+EX_R12(r13)
695 ld r13,PACA_EXSLB+EX_R13(r13)
696 rfid
697 b . /* prevent speculative execution */
698
699 2: mfspr r11,SPRN_SRR0
700 ld r10,PACAKBASE(r13)
701 LOAD_HANDLER(r10,unrecov_slb)
702 mtspr SPRN_SRR0,r10
703 ld r10,PACAKMSR(r13)
704 mtspr SPRN_SRR1,r10
705 rfid
706 b .
707
708 unrecov_slb:
709 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
710 DISABLE_INTS
711 bl .save_nvgprs
712 1: addi r3,r1,STACK_FRAME_OVERHEAD
713 bl .unrecoverable_exception
714 b 1b
715
716
717 #ifdef CONFIG_PPC_970_NAP
718 power4_fixup_nap:
719 andc r9,r9,r10
720 std r9,TI_LOCAL_FLAGS(r11)
721 ld r10,_LINK(r1) /* make idle task do the */
722 std r10,_NIP(r1) /* equivalent of a blr */
723 blr
724 #endif
725
726 .align 7
727 .globl alignment_common
728 alignment_common:
729 mfspr r10,SPRN_DAR
730 std r10,PACA_EXGEN+EX_DAR(r13)
731 mfspr r10,SPRN_DSISR
732 stw r10,PACA_EXGEN+EX_DSISR(r13)
733 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
734 ld r3,PACA_EXGEN+EX_DAR(r13)
735 lwz r4,PACA_EXGEN+EX_DSISR(r13)
736 std r3,_DAR(r1)
737 std r4,_DSISR(r1)
738 bl .save_nvgprs
739 addi r3,r1,STACK_FRAME_OVERHEAD
740 ENABLE_INTS
741 bl .alignment_exception
742 b .ret_from_except
743
744 .align 7
745 .globl program_check_common
746 program_check_common:
747 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
748 bl .save_nvgprs
749 DISABLE_INTS
750 addi r3,r1,STACK_FRAME_OVERHEAD
751 bl .program_check_exception
752 b .ret_from_except
753
754 .align 7
755 .globl fp_unavailable_common
756 fp_unavailable_common:
757 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
758 bne 1f /* if from user, just load it up */
759 bl .save_nvgprs
760 addi r3,r1,STACK_FRAME_OVERHEAD
761 ENABLE_INTS
762 bl .kernel_fp_unavailable_exception
763 BUG_OPCODE
764 1: bl .load_up_fpu
765 b fast_exception_return
766
767 .align 7
768 .globl altivec_unavailable_common
769 altivec_unavailable_common:
770 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
771 #ifdef CONFIG_ALTIVEC
772 BEGIN_FTR_SECTION
773 beq 1f
774 bl .load_up_altivec
775 b fast_exception_return
776 1:
777 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
778 #endif
779 bl .save_nvgprs
780 addi r3,r1,STACK_FRAME_OVERHEAD
781 ENABLE_INTS
782 bl .altivec_unavailable_exception
783 b .ret_from_except
784
785 .align 7
786 .globl vsx_unavailable_common
787 vsx_unavailable_common:
788 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
789 #ifdef CONFIG_VSX
790 BEGIN_FTR_SECTION
791 bne .load_up_vsx
792 1:
793 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
794 #endif
795 bl .save_nvgprs
796 addi r3,r1,STACK_FRAME_OVERHEAD
797 ENABLE_INTS
798 bl .vsx_unavailable_exception
799 b .ret_from_except
800
801 .align 7
802 .globl __end_handlers
803 __end_handlers:
804
805 /*
806 * Return from an exception with minimal checks.
807 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
808 * If interrupts have been enabled, or anything has been
809 * done that might have changed the scheduling status of
810 * any task or sent any task a signal, you should use
811 * ret_from_except or ret_from_except_lite instead of this.
812 */
813 fast_exc_return_irq: /* restores irq state too */
814 ld r3,SOFTE(r1)
815 TRACE_AND_RESTORE_IRQ(r3);
816 ld r12,_MSR(r1)
817 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
818 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
819 b 1f
820
821 .globl fast_exception_return
822 fast_exception_return:
823 ld r12,_MSR(r1)
824 1: ld r11,_NIP(r1)
825 andi. r3,r12,MSR_RI /* check if RI is set */
826 beq- unrecov_fer
827
828 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
829 andi. r3,r12,MSR_PR
830 beq 2f
831 ACCOUNT_CPU_USER_EXIT(r3, r4)
832 2:
833 #endif
834
835 ld r3,_CCR(r1)
836 ld r4,_LINK(r1)
837 ld r5,_CTR(r1)
838 ld r6,_XER(r1)
839 mtcr r3
840 mtlr r4
841 mtctr r5
842 mtxer r6
843 REST_GPR(0, r1)
844 REST_8GPRS(2, r1)
845
846 mfmsr r10
847 rldicl r10,r10,48,1 /* clear EE */
848 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
849 mtmsrd r10,1
850
851 mtspr SPRN_SRR1,r12
852 mtspr SPRN_SRR0,r11
853 REST_4GPRS(10, r1)
854 ld r1,GPR1(r1)
855 rfid
856 b . /* prevent speculative execution */
857
858 unrecov_fer:
859 bl .save_nvgprs
860 1: addi r3,r1,STACK_FRAME_OVERHEAD
861 bl .unrecoverable_exception
862 b 1b
863
864
865 /*
866 * Hash table stuff
867 */
868 .align 7
869 _STATIC(do_hash_page)
870 std r3,_DAR(r1)
871 std r4,_DSISR(r1)
872
873 andis. r0,r4,0xa410 /* weird error? */
874 bne- handle_page_fault /* if not, try to insert a HPTE */
875 andis. r0,r4,DSISR_DABRMATCH@h
876 bne- handle_dabr_fault
877
878 BEGIN_FTR_SECTION
879 andis. r0,r4,0x0020 /* Is it a segment table fault? */
880 bne- do_ste_alloc /* If so handle it */
881 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
882
883 clrrdi r11,r1,THREAD_SHIFT
884 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
885 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
886 bne 77f /* then don't call hash_page now */
887
888 /* We run with interrupts both soft and hard disabled */
889 DISABLE_INTS
890
891 /*
892 * Currently, trace_hardirqs_off() will be called by DISABLE_INTS
893 * and will clobber volatile registers when irq tracing is enabled
894 * so we need to reload them. It may be possible to be smarter here
895 * and move the irq tracing elsewhere but let's keep it simple for
896 * now
897 */
898 #ifdef CONFIG_TRACE_IRQFLAGS
899 ld r3,_DAR(r1)
900 ld r4,_DSISR(r1)
901 ld r5,_TRAP(r1)
902 ld r12,_MSR(r1)
903 clrrdi r5,r5,4
904 #endif /* CONFIG_TRACE_IRQFLAGS */
905 /*
906 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
907 * accessing a userspace segment (even from the kernel). We assume
908 * kernel addresses always have the high bit set.
909 */
910 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
911 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
912 orc r0,r12,r0 /* MSR_PR | ~high_bit */
913 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
914 ori r4,r4,1 /* add _PAGE_PRESENT */
915 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
916
917 /*
918 * r3 contains the faulting address
919 * r4 contains the required access permissions
920 * r5 contains the trap number
921 *
922 * at return r3 = 0 for success
923 */
924 bl .hash_page /* build HPTE if possible */
925 cmpdi r3,0 /* see if hash_page succeeded */
926
927 /*
928 * Here we have interrupts hard-disabled, so it is sufficient
929 * to restore paca->{soft,hard}_enable and get out.
930 */
931 beq fast_exc_return_irq /* Return from exception on success */
932
933 /* For a hash failure, we don't bother re-enabling interrupts */
934 ble- 12f
935
936 /*
937 * hash_page couldn't handle it, set soft interrupt enable back
938 * to what it was before the trap. Note that .arch_local_irq_restore
939 * handles any interrupts pending at this point.
940 */
941 ld r3,SOFTE(r1)
942 TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
943 bl .arch_local_irq_restore
944 b 11f
945
946 /* We have a data breakpoint exception - handle it */
947 handle_dabr_fault:
948 bl .save_nvgprs
949 ld r4,_DAR(r1)
950 ld r5,_DSISR(r1)
951 addi r3,r1,STACK_FRAME_OVERHEAD
952 bl .do_dabr
953 b .ret_from_except_lite
954
955 /* Here we have a page fault that hash_page can't handle. */
956 handle_page_fault:
957 ENABLE_INTS
958 11: ld r4,_DAR(r1)
959 ld r5,_DSISR(r1)
960 addi r3,r1,STACK_FRAME_OVERHEAD
961 bl .do_page_fault
962 cmpdi r3,0
963 beq+ 13f
964 bl .save_nvgprs
965 mr r5,r3
966 addi r3,r1,STACK_FRAME_OVERHEAD
967 lwz r4,_DAR(r1)
968 bl .bad_page_fault
969 b .ret_from_except
970
971 13: b .ret_from_except_lite
972
973 /* We have a page fault that hash_page could handle but HV refused
974 * the PTE insertion
975 */
976 12: bl .save_nvgprs
977 mr r5,r3
978 addi r3,r1,STACK_FRAME_OVERHEAD
979 ld r4,_DAR(r1)
980 bl .low_hash_fault
981 b .ret_from_except
982
983 /*
984 * We come here as a result of a DSI at a point where we don't want
985 * to call hash_page, such as when we are accessing memory (possibly
986 * user memory) inside a PMU interrupt that occurred while interrupts
987 * were soft-disabled. We want to invoke the exception handler for
988 * the access, or panic if there isn't a handler.
989 */
990 77: bl .save_nvgprs
991 mr r4,r3
992 addi r3,r1,STACK_FRAME_OVERHEAD
993 li r5,SIGSEGV
994 bl .bad_page_fault
995 b .ret_from_except
996
997 /* here we have a segment miss */
998 do_ste_alloc:
999 bl .ste_allocate /* try to insert stab entry */
1000 cmpdi r3,0
1001 bne- handle_page_fault
1002 b fast_exception_return
1003
1004 /*
1005 * r13 points to the PACA, r9 contains the saved CR,
1006 * r11 and r12 contain the saved SRR0 and SRR1.
1007 * r9 - r13 are saved in paca->exslb.
1008 * We assume we aren't going to take any exceptions during this procedure.
1009 * We assume (DAR >> 60) == 0xc.
1010 */
1011 .align 7
1012 _GLOBAL(do_stab_bolted)
1013 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1014 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1015
1016 /* Hash to the primary group */
1017 ld r10,PACASTABVIRT(r13)
1018 mfspr r11,SPRN_DAR
1019 srdi r11,r11,28
1020 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1021
1022 /* Calculate VSID */
1023 /* This is a kernel address, so protovsid = ESID */
1024 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1025 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1026
1027 /* Search the primary group for a free entry */
1028 1: ld r11,0(r10) /* Test valid bit of the current ste */
1029 andi. r11,r11,0x80
1030 beq 2f
1031 addi r10,r10,16
1032 andi. r11,r10,0x70
1033 bne 1b
1034
1035 /* Stick for only searching the primary group for now. */
1036 /* At least for now, we use a very simple random castout scheme */
1037 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1038 mftb r11
1039 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1040 ori r11,r11,0x10
1041
1042 /* r10 currently points to an ste one past the group of interest */
1043 /* make it point to the randomly selected entry */
1044 subi r10,r10,128
1045 or r10,r10,r11 /* r10 is the entry to invalidate */
1046
1047 isync /* mark the entry invalid */
1048 ld r11,0(r10)
1049 rldicl r11,r11,56,1 /* clear the valid bit */
1050 rotldi r11,r11,8
1051 std r11,0(r10)
1052 sync
1053
1054 clrrdi r11,r11,28 /* Get the esid part of the ste */
1055 slbie r11
1056
1057 2: std r9,8(r10) /* Store the vsid part of the ste */
1058 eieio
1059
1060 mfspr r11,SPRN_DAR /* Get the new esid */
1061 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1062 ori r11,r11,0x90 /* Turn on valid and kp */
1063 std r11,0(r10) /* Put new entry back into the stab */
1064
1065 sync
1066
1067 /* All done -- return from exception. */
1068 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1069 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1070
1071 andi. r10,r12,MSR_RI
1072 beq- unrecov_slb
1073
1074 mtcrf 0x80,r9 /* restore CR */
1075
1076 mfmsr r10
1077 clrrdi r10,r10,2
1078 mtmsrd r10,1
1079
1080 mtspr SPRN_SRR0,r11
1081 mtspr SPRN_SRR1,r12
1082 ld r9,PACA_EXSLB+EX_R9(r13)
1083 ld r10,PACA_EXSLB+EX_R10(r13)
1084 ld r11,PACA_EXSLB+EX_R11(r13)
1085 ld r12,PACA_EXSLB+EX_R12(r13)
1086 ld r13,PACA_EXSLB+EX_R13(r13)
1087 rfid
1088 b . /* prevent speculative execution */
1089
1090 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1091 /*
1092 * Data area reserved for FWNMI option.
1093 * This address (0x7000) is fixed by the RPA.
1094 */
1095 .= 0x7000
1096 .globl fwnmi_data_area
1097 fwnmi_data_area:
1098
1099 /* pseries and powernv need to keep the whole page from
1100 * 0x7000 to 0x8000 free for use by the firmware
1101 */
1102 . = 0x8000
1103 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1104
1105 /* Space for CPU0's segment table */
1106 .balign 4096
1107 .globl initial_stab
1108 initial_stab:
1109 .space 4096
1110
1111 #ifdef CONFIG_PPC_POWERNV
1112 _GLOBAL(opal_mc_secondary_handler)
1113 HMT_MEDIUM
1114 SET_SCRATCH0(r13)
1115 GET_PACA(r13)
1116 clrldi r3,r3,2
1117 tovirt(r3,r3)
1118 std r3,PACA_OPAL_MC_EVT(r13)
1119 ld r13,OPAL_MC_SRR0(r3)
1120 mtspr SPRN_SRR0,r13
1121 ld r13,OPAL_MC_SRR1(r3)
1122 mtspr SPRN_SRR1,r13
1123 ld r3,OPAL_MC_GPR3(r3)
1124 GET_SCRATCH0(r13)
1125 b machine_check_pSeries
1126 #endif /* CONFIG_PPC_POWERNV */