ARM: mxs: icoll: Fix interrupts gpio bank 0
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / parisc / include / asm / mmzone.h
1 #ifndef _PARISC_MMZONE_H
2 #define _PARISC_MMZONE_H
3
4 #define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
5
6 #ifdef CONFIG_DISCONTIGMEM
7
8 extern int npmem_ranges;
9
10 struct node_map_data {
11 pg_data_t pg_data;
12 };
13
14 extern struct node_map_data node_data[];
15
16 #define NODE_DATA(nid) (&node_data[nid].pg_data)
17
18 /* We have these possible memory map layouts:
19 * Astro: 0-3.75, 67.75-68, 4-64
20 * zx1: 0-1, 257-260, 4-256
21 * Stretch (N-class): 0-2, 4-32, 34-xxx
22 */
23
24 /* Since each 1GB can only belong to one region (node), we can create
25 * an index table for pfn to nid lookup; each entry in pfnnid_map
26 * represents 1GB, and contains the node that the memory belongs to. */
27
28 #define PFNNID_SHIFT (30 - PAGE_SHIFT)
29 #define PFNNID_MAP_MAX 512 /* support 512GB */
30 extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
31
32 #ifndef CONFIG_64BIT
33 #define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
34 #else
35 /* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
36 #define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
37 #endif
38
39 static inline int pfn_to_nid(unsigned long pfn)
40 {
41 unsigned int i;
42 unsigned char r;
43
44 if (unlikely(pfn_is_io(pfn)))
45 return 0;
46
47 i = pfn >> PFNNID_SHIFT;
48 BUG_ON(i >= ARRAY_SIZE(pfnnid_map));
49 r = pfnnid_map[i];
50 BUG_ON(r == 0xff);
51
52 return (int)r;
53 }
54
55 static inline int pfn_valid(int pfn)
56 {
57 int nid = pfn_to_nid(pfn);
58
59 if (nid >= 0)
60 return (pfn < node_end_pfn(nid));
61 return 0;
62 }
63
64 #endif
65 #endif /* _PARISC_MMZONE_H */