Linux-2.6.12-rc2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / sibyte / sb1250 / smp.c
1 /*
2 * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/smp.h>
23 #include <linux/kernel_stat.h>
24
25 #include <asm/mmu_context.h>
26 #include <asm/io.h>
27 #include <asm/sibyte/sb1250.h>
28 #include <asm/sibyte/sb1250_regs.h>
29 #include <asm/sibyte/sb1250_int.h>
30
31 static void *mailbox_set_regs[] = {
32 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
33 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
34 };
35
36 static void *mailbox_clear_regs[] = {
37 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
38 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
39 };
40
41 static void *mailbox_regs[] = {
42 (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
43 (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
44 };
45
46 /*
47 * SMP init and finish on secondary CPUs
48 */
49 void sb1250_smp_init(void)
50 {
51 unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
52 STATUSF_IP1 | STATUSF_IP0;
53
54 /* Set interrupt mask, but don't enable */
55 change_c0_status(ST0_IM, imask);
56 }
57
58 void sb1250_smp_finish(void)
59 {
60 extern void sb1250_time_init(void);
61 sb1250_time_init();
62 local_irq_enable();
63 }
64
65 /*
66 * These are routines for dealing with the sb1250 smp capabilities
67 * independent of board/firmware
68 */
69
70 /*
71 * Simple enough; everything is set up, so just poke the appropriate mailbox
72 * register, and we should be set
73 */
74 void core_send_ipi(int cpu, unsigned int action)
75 {
76 bus_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
77 }
78
79 void sb1250_mailbox_interrupt(struct pt_regs *regs)
80 {
81 int cpu = smp_processor_id();
82 unsigned int action;
83
84 kstat_this_cpu.irqs[K_INT_MBOX_0]++;
85 /* Load the mailbox register to figure out what we're supposed to do */
86 action = (__bus_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
87
88 /* Clear the mailbox to clear the interrupt */
89 __bus_writeq(((u64)action) << 48, mailbox_clear_regs[cpu]);
90
91 /*
92 * Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
93 * interrupt will do the reschedule for us
94 */
95
96 if (action & SMP_CALL_FUNCTION)
97 smp_call_function_interrupt();
98 }