arch/mips/sgi-ip22/ip22-time.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Time operations for IP22 machines. Original code may come from
   7  * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
   8  *
   9  * Copyright (C) 2001 by Ladislav Michl
  10  * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
  11  */
  12 #include <linux/bcd.h>
  13 #include <linux/ds1286.h>
  14 #include <linux/init.h>
  15 #include <linux/kernel.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/kernel_stat.h>
  18 #include <linux/time.h>
  19
  20 #include <asm/cpu.h>
  21 #include <asm/mipsregs.h>
  22 #include <asm/io.h>
  23 #include <asm/irq.h>
  24 #include <asm/time.h>
  25 #include <asm/sgialib.h>
  26 #include <asm/sgi/ioc.h>
  27 #include <asm/sgi/hpc3.h>
  28 #include <asm/sgi/ip22.h>
  29
  30 /*
  31  * note that mktime uses month from 1 to 12 while to_tm
  32  * uses 0 to 11.
  33  */
  34 static unsigned long indy_rtc_get_time(void)
  35 {
  36         unsigned int yrs, mon, day, hrs, min, sec;
  37         unsigned int save_control;
  38
  39         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  40         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  41
  42         sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
  43         min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
  44         hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
  45         day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
  46         mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
  47         yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
  48
  49         hpc3c0->rtcregs[RTC_CMD] = save_control;
  50
  51         if (yrs < 45)
  52                 yrs += 30;
  53         if ((yrs += 40) < 70)
  54                 yrs += 100;
  55
  56         return mktime(yrs + 1900, mon, day, hrs, min, sec);
  57 }
  58
  59 static int indy_rtc_set_time(unsigned long tim)
  60 {
  61         struct rtc_time tm;
  62         unsigned int save_control;
  63
  64         to_tm(tim, &tm);
  65
  66         tm.tm_mon += 1;         /* tm_mon starts at zero */
  67         tm.tm_year -= 1940;
  68         if (tm.tm_year >= 100)
  69                 tm.tm_year -= 100;
  70
  71         save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
  72         hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
  73
  74         hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_sec);
  75         hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
  76         hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
  77         hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
  78         hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
  79         hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
  80         hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
  81
  82         hpc3c0->rtcregs[RTC_CMD] = save_control;
  83
  84         return 0;
  85 }
  86
  87 static unsigned long dosample(void)
  88 {
  89         u32 ct0, ct1;
  90         volatile u8 msb, lsb;
  91
  92         /* Start the counter. */
  93         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
  94                          SGINT_TCWORD_MRGEN);
  95         sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
  96         sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
  97
  98         /* Get initial counter invariant */
  99         ct0 = read_c0_count();
 100
 101         /* Latch and spin until top byte of counter2 is zero */
 102         do {
 103                 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
 104                 lsb = sgint->tcnt2;
 105                 msb = sgint->tcnt2;
 106                 ct1 = read_c0_count();
 107         } while (msb);
 108
 109         /* Stop the counter. */
 110         sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
 111                          SGINT_TCWORD_MSWST);
 112         /*
 113          * Return the difference, this is how far the r4k counter increments
 114          * for every 1/HZ seconds. We round off the nearest 1 MHz of master
 115          * clock (= 1000000 / HZ / 2).
 116          */
 117         /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
 118         return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
 119 }
 120
 121 /*
 122  * Here we need to calibrate the cycle counter to at least be close.
 123  */
 124 static __init void indy_time_init(void)
 125 {
 126         unsigned long r4k_ticks[3];
 127         unsigned long r4k_tick;
 128
 129         /*
 130          * Figure out the r4k offset, the algorithm is very simple and works in
 131          * _all_ cases as long as the 8254 counter register itself works ok (as
 132          * an interrupt driving timer it does not because of bug, this is why
 133          * we are using the onchip r4k counter/compare register to serve this
 134          * purpose, but for r4k_offset calculation it will work ok for us).
 135          * There are other very complicated ways of performing this calculation
 136          * but this one works just fine so I am not going to futz around. ;-)
 137          */
 138         printk(KERN_INFO "Calibrating system timer... ");
 139         dosample();     /* Prime cache. */
 140         dosample();     /* Prime cache. */
 141         /* Zero is NOT an option. */
 142         do {
 143                 r4k_ticks[0] = dosample();
 144         } while (!r4k_ticks[0]);
 145         do {
 146                 r4k_ticks[1] = dosample();
 147         } while (!r4k_ticks[1]);
 148
 149         if (r4k_ticks[0] != r4k_ticks[1]) {
 150                 printk("warning: timer counts differ, retrying... ");
 151                 r4k_ticks[2] = dosample();
 152                 if (r4k_ticks[2] == r4k_ticks[0]
 153                     || r4k_ticks[2] == r4k_ticks[1])
 154                         r4k_tick = r4k_ticks[2];
 155                 else {
 156                         printk("disagreement, using average... ");
 157                         r4k_tick = (r4k_ticks[0] + r4k_ticks[1]
 158                                    + r4k_ticks[2]) / 3;
 159                 }
 160         } else
 161                 r4k_tick = r4k_ticks[0];
 162
 163         printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
 164                 (int) (r4k_tick / (500000 / HZ)),
 165                 (int) (r4k_tick % (500000 / HZ)));
 166
 167         mips_hpt_frequency = r4k_tick * HZ;
 168 }
 169
 170 /* Generic SGI handler for (spurious) 8254 interrupts */
 171 void indy_8254timer_irq(struct pt_regs *regs)
 172 {
 173         int irq = SGI_8254_0_IRQ;
 174         ULONG cnt;
 175         char c;
 176
 177         irq_enter();
 178         kstat_this_cpu.irqs[irq]++;
 179         printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
 180         ArcRead(0, &c, 1, &cnt);
 181         ArcEnterInteractiveMode();
 182         irq_exit();
 183 }
 184
 185 void indy_r4k_timer_interrupt(struct pt_regs *regs)
 186 {
 187         int irq = SGI_TIMER_IRQ;
 188
 189         irq_enter();
 190         kstat_this_cpu.irqs[irq]++;
 191         timer_interrupt(irq, NULL, regs);
 192         irq_exit();
 193 }
 194
 195 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
 196
 197 static void indy_timer_setup(struct irqaction *irq)
 198 {
 199         /* over-write the handler, we use our own way */
 200         irq->handler = no_action;
 201
 202         /* setup irqaction */
 203         setup_irq(SGI_TIMER_IRQ, irq);
 204 }
 205
 206 void __init ip22_time_init(void)
 207 {
 208         /* setup hookup functions */
 209         rtc_get_time = indy_rtc_get_time;
 210         rtc_set_time = indy_rtc_set_time;
 211
 212         board_time_init = indy_time_init;
 213         board_timer_setup = indy_timer_setup;
 214 }