arch/mips/kernel/asm-offsets.c

   1 /*
   2  * offset.c: Calculate pt_regs and task_struct offsets.
   3  *
   4  * Copyright (C) 1996 David S. Miller
   5  * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle
   6  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   7  *
   8  * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
   9  * Copyright (C) 2000 MIPS Technologies, Inc.
  10  */
  11 #include <linux/compat.h>
  12 #include <linux/types.h>
  13 #include <linux/sched.h>
  14 #include <linux/mm.h>
  15 #include <linux/kbuild.h>
  16 #include <linux/suspend.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/processor.h>
  19
  20 #include <linux/kvm_host.h>
  21
  22 void output_ptreg_defines(void)
  23 {
  24         COMMENT("MIPS pt_regs offsets.");
  25         OFFSET(PT_R0, pt_regs, regs[0]);
  26         OFFSET(PT_R1, pt_regs, regs[1]);
  27         OFFSET(PT_R2, pt_regs, regs[2]);
  28         OFFSET(PT_R3, pt_regs, regs[3]);
  29         OFFSET(PT_R4, pt_regs, regs[4]);
  30         OFFSET(PT_R5, pt_regs, regs[5]);
  31         OFFSET(PT_R6, pt_regs, regs[6]);
  32         OFFSET(PT_R7, pt_regs, regs[7]);
  33         OFFSET(PT_R8, pt_regs, regs[8]);
  34         OFFSET(PT_R9, pt_regs, regs[9]);
  35         OFFSET(PT_R10, pt_regs, regs[10]);
  36         OFFSET(PT_R11, pt_regs, regs[11]);
  37         OFFSET(PT_R12, pt_regs, regs[12]);
  38         OFFSET(PT_R13, pt_regs, regs[13]);
  39         OFFSET(PT_R14, pt_regs, regs[14]);
  40         OFFSET(PT_R15, pt_regs, regs[15]);
  41         OFFSET(PT_R16, pt_regs, regs[16]);
  42         OFFSET(PT_R17, pt_regs, regs[17]);
  43         OFFSET(PT_R18, pt_regs, regs[18]);
  44         OFFSET(PT_R19, pt_regs, regs[19]);
  45         OFFSET(PT_R20, pt_regs, regs[20]);
  46         OFFSET(PT_R21, pt_regs, regs[21]);
  47         OFFSET(PT_R22, pt_regs, regs[22]);
  48         OFFSET(PT_R23, pt_regs, regs[23]);
  49         OFFSET(PT_R24, pt_regs, regs[24]);
  50         OFFSET(PT_R25, pt_regs, regs[25]);
  51         OFFSET(PT_R26, pt_regs, regs[26]);
  52         OFFSET(PT_R27, pt_regs, regs[27]);
  53         OFFSET(PT_R28, pt_regs, regs[28]);
  54         OFFSET(PT_R29, pt_regs, regs[29]);
  55         OFFSET(PT_R30, pt_regs, regs[30]);
  56         OFFSET(PT_R31, pt_regs, regs[31]);
  57         OFFSET(PT_LO, pt_regs, lo);
  58         OFFSET(PT_HI, pt_regs, hi);
  59 #ifdef CONFIG_CPU_HAS_SMARTMIPS
  60         OFFSET(PT_ACX, pt_regs, acx);
  61 #endif
  62         OFFSET(PT_EPC, pt_regs, cp0_epc);
  63         OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr);
  64         OFFSET(PT_STATUS, pt_regs, cp0_status);
  65         OFFSET(PT_CAUSE, pt_regs, cp0_cause);
  66 #ifdef CONFIG_MIPS_MT_SMTC
  67         OFFSET(PT_TCSTATUS, pt_regs, cp0_tcstatus);
  68 #endif /* CONFIG_MIPS_MT_SMTC */
  69 #ifdef CONFIG_CPU_CAVIUM_OCTEON
  70         OFFSET(PT_MPL, pt_regs, mpl);
  71         OFFSET(PT_MTP, pt_regs, mtp);
  72 #endif /* CONFIG_CPU_CAVIUM_OCTEON */
  73         DEFINE(PT_SIZE, sizeof(struct pt_regs));
  74         BLANK();
  75 }
  76
  77 void output_task_defines(void)
  78 {
  79         COMMENT("MIPS task_struct offsets.");
  80         OFFSET(TASK_STATE, task_struct, state);
  81         OFFSET(TASK_THREAD_INFO, task_struct, stack);
  82         OFFSET(TASK_FLAGS, task_struct, flags);
  83         OFFSET(TASK_MM, task_struct, mm);
  84         OFFSET(TASK_PID, task_struct, pid);
  85         DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
  86         BLANK();
  87 }
  88
  89 void output_thread_info_defines(void)
  90 {
  91         COMMENT("MIPS thread_info offsets.");
  92         OFFSET(TI_TASK, thread_info, task);
  93         OFFSET(TI_EXEC_DOMAIN, thread_info, exec_domain);
  94         OFFSET(TI_FLAGS, thread_info, flags);
  95         OFFSET(TI_TP_VALUE, thread_info, tp_value);
  96         OFFSET(TI_CPU, thread_info, cpu);
  97         OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
  98         OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
  99         OFFSET(TI_RESTART_BLOCK, thread_info, restart_block);
 100         OFFSET(TI_REGS, thread_info, regs);
 101         DEFINE(_THREAD_SIZE, THREAD_SIZE);
 102         DEFINE(_THREAD_MASK, THREAD_MASK);
 103         BLANK();
 104 }
 105
 106 void output_thread_defines(void)
 107 {
 108         COMMENT("MIPS specific thread_struct offsets.");
 109         OFFSET(THREAD_REG16, task_struct, thread.reg16);
 110         OFFSET(THREAD_REG17, task_struct, thread.reg17);
 111         OFFSET(THREAD_REG18, task_struct, thread.reg18);
 112         OFFSET(THREAD_REG19, task_struct, thread.reg19);
 113         OFFSET(THREAD_REG20, task_struct, thread.reg20);
 114         OFFSET(THREAD_REG21, task_struct, thread.reg21);
 115         OFFSET(THREAD_REG22, task_struct, thread.reg22);
 116         OFFSET(THREAD_REG23, task_struct, thread.reg23);
 117         OFFSET(THREAD_REG29, task_struct, thread.reg29);
 118         OFFSET(THREAD_REG30, task_struct, thread.reg30);
 119         OFFSET(THREAD_REG31, task_struct, thread.reg31);
 120         OFFSET(THREAD_STATUS, task_struct,
 121                thread.cp0_status);
 122         OFFSET(THREAD_FPU, task_struct, thread.fpu);
 123
 124         OFFSET(THREAD_BVADDR, task_struct, \
 125                thread.cp0_badvaddr);
 126         OFFSET(THREAD_BUADDR, task_struct, \
 127                thread.cp0_baduaddr);
 128         OFFSET(THREAD_ECODE, task_struct, \
 129                thread.error_code);
 130         BLANK();
 131 }
 132
 133 void output_thread_fpu_defines(void)
 134 {
 135         OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]);
 136         OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]);
 137         OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]);
 138         OFFSET(THREAD_FPR3, task_struct, thread.fpu.fpr[3]);
 139         OFFSET(THREAD_FPR4, task_struct, thread.fpu.fpr[4]);
 140         OFFSET(THREAD_FPR5, task_struct, thread.fpu.fpr[5]);
 141         OFFSET(THREAD_FPR6, task_struct, thread.fpu.fpr[6]);
 142         OFFSET(THREAD_FPR7, task_struct, thread.fpu.fpr[7]);
 143         OFFSET(THREAD_FPR8, task_struct, thread.fpu.fpr[8]);
 144         OFFSET(THREAD_FPR9, task_struct, thread.fpu.fpr[9]);
 145         OFFSET(THREAD_FPR10, task_struct, thread.fpu.fpr[10]);
 146         OFFSET(THREAD_FPR11, task_struct, thread.fpu.fpr[11]);
 147         OFFSET(THREAD_FPR12, task_struct, thread.fpu.fpr[12]);
 148         OFFSET(THREAD_FPR13, task_struct, thread.fpu.fpr[13]);
 149         OFFSET(THREAD_FPR14, task_struct, thread.fpu.fpr[14]);
 150         OFFSET(THREAD_FPR15, task_struct, thread.fpu.fpr[15]);
 151         OFFSET(THREAD_FPR16, task_struct, thread.fpu.fpr[16]);
 152         OFFSET(THREAD_FPR17, task_struct, thread.fpu.fpr[17]);
 153         OFFSET(THREAD_FPR18, task_struct, thread.fpu.fpr[18]);
 154         OFFSET(THREAD_FPR19, task_struct, thread.fpu.fpr[19]);
 155         OFFSET(THREAD_FPR20, task_struct, thread.fpu.fpr[20]);
 156         OFFSET(THREAD_FPR21, task_struct, thread.fpu.fpr[21]);
 157         OFFSET(THREAD_FPR22, task_struct, thread.fpu.fpr[22]);
 158         OFFSET(THREAD_FPR23, task_struct, thread.fpu.fpr[23]);
 159         OFFSET(THREAD_FPR24, task_struct, thread.fpu.fpr[24]);
 160         OFFSET(THREAD_FPR25, task_struct, thread.fpu.fpr[25]);
 161         OFFSET(THREAD_FPR26, task_struct, thread.fpu.fpr[26]);
 162         OFFSET(THREAD_FPR27, task_struct, thread.fpu.fpr[27]);
 163         OFFSET(THREAD_FPR28, task_struct, thread.fpu.fpr[28]);
 164         OFFSET(THREAD_FPR29, task_struct, thread.fpu.fpr[29]);
 165         OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
 166         OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
 167
 168         OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
 169         BLANK();
 170 }
 171
 172 void output_mm_defines(void)
 173 {
 174         COMMENT("Size of struct page");
 175         DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page));
 176         BLANK();
 177         COMMENT("Linux mm_struct offsets.");
 178         OFFSET(MM_USERS, mm_struct, mm_users);
 179         OFFSET(MM_PGD, mm_struct, pgd);
 180         OFFSET(MM_CONTEXT, mm_struct, context);
 181         BLANK();
 182         DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
 183         DEFINE(_PMD_T_SIZE, sizeof(pmd_t));
 184         DEFINE(_PTE_T_SIZE, sizeof(pte_t));
 185         BLANK();
 186         DEFINE(_PGD_T_LOG2, PGD_T_LOG2);
 187 #ifndef __PAGETABLE_PMD_FOLDED
 188         DEFINE(_PMD_T_LOG2, PMD_T_LOG2);
 189 #endif
 190         DEFINE(_PTE_T_LOG2, PTE_T_LOG2);
 191         BLANK();
 192         DEFINE(_PGD_ORDER, PGD_ORDER);
 193 #ifndef __PAGETABLE_PMD_FOLDED
 194         DEFINE(_PMD_ORDER, PMD_ORDER);
 195 #endif
 196         DEFINE(_PTE_ORDER, PTE_ORDER);
 197         BLANK();
 198         DEFINE(_PMD_SHIFT, PMD_SHIFT);
 199         DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT);
 200         BLANK();
 201         DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD);
 202         DEFINE(_PTRS_PER_PMD, PTRS_PER_PMD);
 203         DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
 204         BLANK();
 205         DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
 206         DEFINE(_PAGE_SIZE, PAGE_SIZE);
 207         BLANK();
 208 }
 209
 210 #ifdef CONFIG_32BIT
 211 void output_sc_defines(void)
 212 {
 213         COMMENT("Linux sigcontext offsets.");
 214         OFFSET(SC_REGS, sigcontext, sc_regs);
 215         OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
 216         OFFSET(SC_ACX, sigcontext, sc_acx);
 217         OFFSET(SC_MDHI, sigcontext, sc_mdhi);
 218         OFFSET(SC_MDLO, sigcontext, sc_mdlo);
 219         OFFSET(SC_PC, sigcontext, sc_pc);
 220         OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
 221         OFFSET(SC_FPC_EIR, sigcontext, sc_fpc_eir);
 222         OFFSET(SC_HI1, sigcontext, sc_hi1);
 223         OFFSET(SC_LO1, sigcontext, sc_lo1);
 224         OFFSET(SC_HI2, sigcontext, sc_hi2);
 225         OFFSET(SC_LO2, sigcontext, sc_lo2);
 226         OFFSET(SC_HI3, sigcontext, sc_hi3);
 227         OFFSET(SC_LO3, sigcontext, sc_lo3);
 228         BLANK();
 229 }
 230 #endif
 231
 232 #ifdef CONFIG_64BIT
 233 void output_sc_defines(void)
 234 {
 235         COMMENT("Linux sigcontext offsets.");
 236         OFFSET(SC_REGS, sigcontext, sc_regs);
 237         OFFSET(SC_FPREGS, sigcontext, sc_fpregs);
 238         OFFSET(SC_MDHI, sigcontext, sc_mdhi);
 239         OFFSET(SC_MDLO, sigcontext, sc_mdlo);
 240         OFFSET(SC_PC, sigcontext, sc_pc);
 241         OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
 242         BLANK();
 243 }
 244 #endif
 245
 246 #ifdef CONFIG_MIPS32_COMPAT
 247 void output_sc32_defines(void)
 248 {
 249         COMMENT("Linux 32-bit sigcontext offsets.");
 250         OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs);
 251         OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr);
 252         OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir);
 253         BLANK();
 254 }
 255 #endif
 256
 257 void output_signal_defined(void)
 258 {
 259         COMMENT("Linux signal numbers.");
 260         DEFINE(_SIGHUP, SIGHUP);
 261         DEFINE(_SIGINT, SIGINT);
 262         DEFINE(_SIGQUIT, SIGQUIT);
 263         DEFINE(_SIGILL, SIGILL);
 264         DEFINE(_SIGTRAP, SIGTRAP);
 265         DEFINE(_SIGIOT, SIGIOT);
 266         DEFINE(_SIGABRT, SIGABRT);
 267         DEFINE(_SIGEMT, SIGEMT);
 268         DEFINE(_SIGFPE, SIGFPE);
 269         DEFINE(_SIGKILL, SIGKILL);
 270         DEFINE(_SIGBUS, SIGBUS);
 271         DEFINE(_SIGSEGV, SIGSEGV);
 272         DEFINE(_SIGSYS, SIGSYS);
 273         DEFINE(_SIGPIPE, SIGPIPE);
 274         DEFINE(_SIGALRM, SIGALRM);
 275         DEFINE(_SIGTERM, SIGTERM);
 276         DEFINE(_SIGUSR1, SIGUSR1);
 277         DEFINE(_SIGUSR2, SIGUSR2);
 278         DEFINE(_SIGCHLD, SIGCHLD);
 279         DEFINE(_SIGPWR, SIGPWR);
 280         DEFINE(_SIGWINCH, SIGWINCH);
 281         DEFINE(_SIGURG, SIGURG);
 282         DEFINE(_SIGIO, SIGIO);
 283         DEFINE(_SIGSTOP, SIGSTOP);
 284         DEFINE(_SIGTSTP, SIGTSTP);
 285         DEFINE(_SIGCONT, SIGCONT);
 286         DEFINE(_SIGTTIN, SIGTTIN);
 287         DEFINE(_SIGTTOU, SIGTTOU);
 288         DEFINE(_SIGVTALRM, SIGVTALRM);
 289         DEFINE(_SIGPROF, SIGPROF);
 290         DEFINE(_SIGXCPU, SIGXCPU);
 291         DEFINE(_SIGXFSZ, SIGXFSZ);
 292         BLANK();
 293 }
 294
 295 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 296 void output_octeon_cop2_state_defines(void)
 297 {
 298         COMMENT("Octeon specific octeon_cop2_state offsets.");
 299         OFFSET(OCTEON_CP2_CRC_IV,       octeon_cop2_state, cop2_crc_iv);
 300         OFFSET(OCTEON_CP2_CRC_LENGTH,   octeon_cop2_state, cop2_crc_length);
 301         OFFSET(OCTEON_CP2_CRC_POLY,     octeon_cop2_state, cop2_crc_poly);
 302         OFFSET(OCTEON_CP2_LLM_DAT,      octeon_cop2_state, cop2_llm_dat);
 303         OFFSET(OCTEON_CP2_3DES_IV,      octeon_cop2_state, cop2_3des_iv);
 304         OFFSET(OCTEON_CP2_3DES_KEY,     octeon_cop2_state, cop2_3des_key);
 305         OFFSET(OCTEON_CP2_3DES_RESULT,  octeon_cop2_state, cop2_3des_result);
 306         OFFSET(OCTEON_CP2_AES_INP0,     octeon_cop2_state, cop2_aes_inp0);
 307         OFFSET(OCTEON_CP2_AES_IV,       octeon_cop2_state, cop2_aes_iv);
 308         OFFSET(OCTEON_CP2_AES_KEY,      octeon_cop2_state, cop2_aes_key);
 309         OFFSET(OCTEON_CP2_AES_KEYLEN,   octeon_cop2_state, cop2_aes_keylen);
 310         OFFSET(OCTEON_CP2_AES_RESULT,   octeon_cop2_state, cop2_aes_result);
 311         OFFSET(OCTEON_CP2_GFM_MULT,     octeon_cop2_state, cop2_gfm_mult);
 312         OFFSET(OCTEON_CP2_GFM_POLY,     octeon_cop2_state, cop2_gfm_poly);
 313         OFFSET(OCTEON_CP2_GFM_RESULT,   octeon_cop2_state, cop2_gfm_result);
 314         OFFSET(OCTEON_CP2_HSH_DATW,     octeon_cop2_state, cop2_hsh_datw);
 315         OFFSET(OCTEON_CP2_HSH_IVW,      octeon_cop2_state, cop2_hsh_ivw);
 316         OFFSET(THREAD_CP2,      task_struct, thread.cp2);
 317         OFFSET(THREAD_CVMSEG,   task_struct, thread.cvmseg.cvmseg);
 318         BLANK();
 319 }
 320 #endif
 321
 322 #ifdef CONFIG_HIBERNATION
 323 void output_pbe_defines(void)
 324 {
 325         COMMENT(" Linux struct pbe offsets. ");
 326         OFFSET(PBE_ADDRESS, pbe, address);
 327         OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address);
 328         OFFSET(PBE_NEXT, pbe, next);
 329         DEFINE(PBE_SIZE, sizeof(struct pbe));
 330         BLANK();
 331 }
 332 #endif
 333
 334 void output_kvm_defines(void)
 335 {
 336         COMMENT(" KVM/MIPS Specfic offsets. ");
 337         DEFINE(VCPU_ARCH_SIZE, sizeof(struct kvm_vcpu_arch));
 338         OFFSET(VCPU_RUN, kvm_vcpu, run);
 339         OFFSET(VCPU_HOST_ARCH, kvm_vcpu, arch);
 340
 341         OFFSET(VCPU_HOST_EBASE, kvm_vcpu_arch, host_ebase);
 342         OFFSET(VCPU_GUEST_EBASE, kvm_vcpu_arch, guest_ebase);
 343
 344         OFFSET(VCPU_HOST_STACK, kvm_vcpu_arch, host_stack);
 345         OFFSET(VCPU_HOST_GP, kvm_vcpu_arch, host_gp);
 346
 347         OFFSET(VCPU_HOST_CP0_BADVADDR, kvm_vcpu_arch, host_cp0_badvaddr);
 348         OFFSET(VCPU_HOST_CP0_CAUSE, kvm_vcpu_arch, host_cp0_cause);
 349         OFFSET(VCPU_HOST_EPC, kvm_vcpu_arch, host_cp0_epc);
 350         OFFSET(VCPU_HOST_ENTRYHI, kvm_vcpu_arch, host_cp0_entryhi);
 351
 352         OFFSET(VCPU_GUEST_INST, kvm_vcpu_arch, guest_inst);
 353
 354         OFFSET(VCPU_R0, kvm_vcpu_arch, gprs[0]);
 355         OFFSET(VCPU_R1, kvm_vcpu_arch, gprs[1]);
 356         OFFSET(VCPU_R2, kvm_vcpu_arch, gprs[2]);
 357         OFFSET(VCPU_R3, kvm_vcpu_arch, gprs[3]);
 358         OFFSET(VCPU_R4, kvm_vcpu_arch, gprs[4]);
 359         OFFSET(VCPU_R5, kvm_vcpu_arch, gprs[5]);
 360         OFFSET(VCPU_R6, kvm_vcpu_arch, gprs[6]);
 361         OFFSET(VCPU_R7, kvm_vcpu_arch, gprs[7]);
 362         OFFSET(VCPU_R8, kvm_vcpu_arch, gprs[8]);
 363         OFFSET(VCPU_R9, kvm_vcpu_arch, gprs[9]);
 364         OFFSET(VCPU_R10, kvm_vcpu_arch, gprs[10]);
 365         OFFSET(VCPU_R11, kvm_vcpu_arch, gprs[11]);
 366         OFFSET(VCPU_R12, kvm_vcpu_arch, gprs[12]);
 367         OFFSET(VCPU_R13, kvm_vcpu_arch, gprs[13]);
 368         OFFSET(VCPU_R14, kvm_vcpu_arch, gprs[14]);
 369         OFFSET(VCPU_R15, kvm_vcpu_arch, gprs[15]);
 370         OFFSET(VCPU_R16, kvm_vcpu_arch, gprs[16]);
 371         OFFSET(VCPU_R17, kvm_vcpu_arch, gprs[17]);
 372         OFFSET(VCPU_R18, kvm_vcpu_arch, gprs[18]);
 373         OFFSET(VCPU_R19, kvm_vcpu_arch, gprs[19]);
 374         OFFSET(VCPU_R20, kvm_vcpu_arch, gprs[20]);
 375         OFFSET(VCPU_R21, kvm_vcpu_arch, gprs[21]);
 376         OFFSET(VCPU_R22, kvm_vcpu_arch, gprs[22]);
 377         OFFSET(VCPU_R23, kvm_vcpu_arch, gprs[23]);
 378         OFFSET(VCPU_R24, kvm_vcpu_arch, gprs[24]);
 379         OFFSET(VCPU_R25, kvm_vcpu_arch, gprs[25]);
 380         OFFSET(VCPU_R26, kvm_vcpu_arch, gprs[26]);
 381         OFFSET(VCPU_R27, kvm_vcpu_arch, gprs[27]);
 382         OFFSET(VCPU_R28, kvm_vcpu_arch, gprs[28]);
 383         OFFSET(VCPU_R29, kvm_vcpu_arch, gprs[29]);
 384         OFFSET(VCPU_R30, kvm_vcpu_arch, gprs[30]);
 385         OFFSET(VCPU_R31, kvm_vcpu_arch, gprs[31]);
 386         OFFSET(VCPU_LO, kvm_vcpu_arch, lo);
 387         OFFSET(VCPU_HI, kvm_vcpu_arch, hi);
 388         OFFSET(VCPU_PC, kvm_vcpu_arch, pc);
 389         OFFSET(VCPU_COP0, kvm_vcpu_arch, cop0);
 390         OFFSET(VCPU_GUEST_KERNEL_ASID, kvm_vcpu_arch, guest_kernel_asid);
 391         OFFSET(VCPU_GUEST_USER_ASID, kvm_vcpu_arch, guest_user_asid);
 392
 393         OFFSET(COP0_TLB_HI, mips_coproc, reg[MIPS_CP0_TLB_HI][0]);
 394         OFFSET(COP0_STATUS, mips_coproc, reg[MIPS_CP0_STATUS][0]);
 395         BLANK();
 396 }