drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / m32r / kernel / time.c
1 /*
2 * linux/arch/m32r/kernel/time.c
3 *
4 * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
5 * Hitoshi Yamamoto
6 * Taken from i386 version.
7 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
8 * Copyright (C) 1996, 1997, 1998 Ralf Baechle
9 *
10 * This file contains the time handling details for PC-style clocks as
11 * found in some MIPS systems.
12 *
13 * Some code taken from sh version.
14 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
15 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
16 */
17
18 #undef DEBUG_TIMER
19
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/sched.h>
24 #include <linux/kernel.h>
25 #include <linux/param.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/interrupt.h>
29 #include <linux/profile.h>
30
31 #include <asm/io.h>
32 #include <asm/m32r.h>
33
34 #include <asm/hw_irq.h>
35
36 #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
37 /* this needs a better home */
38 DEFINE_SPINLOCK(rtc_lock);
39
40 #ifdef CONFIG_RTC_DRV_CMOS_MODULE
41 EXPORT_SYMBOL(rtc_lock);
42 #endif
43 #endif /* pc-style 'CMOS' RTC support */
44
45 #ifdef CONFIG_SMP
46 extern void smp_local_timer_interrupt(void);
47 #endif
48
49 #define TICK_SIZE (tick_nsec / 1000)
50
51 /*
52 * Change this if you have some constant time drift
53 */
54
55 /* This is for machines which generate the exact clock. */
56 #define USECS_PER_JIFFY (1000000/HZ)
57
58 static unsigned long latch;
59
60 static u32 m32r_gettimeoffset(void)
61 {
62 unsigned long elapsed_time = 0; /* [us] */
63
64 #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
65 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
66 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
67 #ifndef CONFIG_SMP
68
69 unsigned long count;
70
71 /* timer count may underflow right here */
72 count = inl(M32R_MFT2CUT_PORTL);
73
74 if (inl(M32R_ICU_CR18_PORTL) & 0x00000100) /* underflow check */
75 count = 0;
76
77 count = (latch - count) * TICK_SIZE;
78 elapsed_time = DIV_ROUND_CLOSEST(count, latch);
79 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
80
81 #else /* CONFIG_SMP */
82 unsigned long count;
83 static unsigned long p_jiffies = -1;
84 static unsigned long p_count = 0;
85
86 /* timer count may underflow right here */
87 count = inl(M32R_MFT2CUT_PORTL);
88
89 if (jiffies == p_jiffies && count > p_count)
90 count = 0;
91
92 p_jiffies = jiffies;
93 p_count = count;
94
95 count = (latch - count) * TICK_SIZE;
96 elapsed_time = DIV_ROUND_CLOSEST(count, latch);
97 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
98 #endif /* CONFIG_SMP */
99 #elif defined(CONFIG_CHIP_M32310)
100 #warning do_gettimeoffse not implemented
101 #else
102 #error no chip configuration
103 #endif
104
105 return elapsed_time * 1000;
106 }
107
108 /*
109 * timer_interrupt() needs to keep up the real-time clock,
110 * as well as call the "xtime_update()" routine every clocktick
111 */
112 static irqreturn_t timer_interrupt(int irq, void *dev_id)
113 {
114 #ifndef CONFIG_SMP
115 profile_tick(CPU_PROFILING);
116 #endif
117 xtime_update(1);
118
119 #ifndef CONFIG_SMP
120 update_process_times(user_mode(get_irq_regs()));
121 #endif
122 /* As we return to user mode fire off the other CPU schedulers..
123 this is basically because we don't yet share IRQ's around.
124 This message is rigged to be safe on the 386 - basically it's
125 a hack, so don't look closely for now.. */
126
127 #ifdef CONFIG_SMP
128 smp_local_timer_interrupt();
129 smp_send_timer();
130 #endif
131
132 return IRQ_HANDLED;
133 }
134
135 static struct irqaction irq0 = {
136 .handler = timer_interrupt,
137 .flags = IRQF_DISABLED,
138 .name = "MFT2",
139 };
140
141 void read_persistent_clock(struct timespec *ts)
142 {
143 unsigned int epoch, year, mon, day, hour, min, sec;
144
145 sec = min = hour = day = mon = year = 0;
146 epoch = 0;
147
148 year = 23;
149 mon = 4;
150 day = 17;
151
152 /* Attempt to guess the epoch. This is the same heuristic as in rtc.c
153 so no stupid things will happen to timekeeping. Who knows, maybe
154 Ultrix also uses 1952 as epoch ... */
155 if (year > 10 && year < 44)
156 epoch = 1980;
157 else if (year < 96)
158 epoch = 1952;
159 year += epoch;
160
161 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
162 ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
163 }
164
165
166 void __init time_init(void)
167 {
168 arch_gettimeoffset = m32r_gettimeoffset;
169
170 #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
171 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
172 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
173
174 /* M32102 MFT setup */
175 setup_irq(M32R_IRQ_MFT2, &irq0);
176 {
177 unsigned long bus_clock;
178 unsigned short divide;
179
180 bus_clock = boot_cpu_data.bus_clock;
181 divide = boot_cpu_data.timer_divide;
182 latch = DIV_ROUND_CLOSEST(bus_clock/divide, HZ);
183
184 printk("Timer start : latch = %ld\n", latch);
185
186 outl((M32R_MFTMOD_CC_MASK | M32R_MFTMOD_TCCR \
187 |M32R_MFTMOD_CSSEL011), M32R_MFT2MOD_PORTL);
188 outl(latch, M32R_MFT2RLD_PORTL);
189 outl(latch, M32R_MFT2CUT_PORTL);
190 outl(0, M32R_MFT2CMPRLD_PORTL);
191 outl((M32R_MFTCR_MFT2MSK|M32R_MFTCR_MFT2EN), M32R_MFTCR_PORTL);
192 }
193
194 #elif defined(CONFIG_CHIP_M32310)
195 #warning time_init not implemented
196 #else
197 #error no chip configuration
198 #endif
199 }