Detach sched.h from mm.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / i386 / kernel / cpu / cpufreq / speedstep-ich.c
1 /*
2 * (C) 2001 Dave Jones, Arjan van de ven.
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
4 *
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon reverse engineered information, and on Intel documentation
7 * for chipsets ICH2-M and ICH3-M.
8 *
9 * Many thanks to Ducrot Bruno for finding and fixing the last
10 * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
11 * for extensive testing.
12 *
13 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
14 */
15
16
17 /*********************************************************************
18 * SPEEDSTEP - DEFINITIONS *
19 *********************************************************************/
20
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/cpufreq.h>
25 #include <linux/pci.h>
26 #include <linux/slab.h>
27 #include <linux/sched.h>
28
29 #include "speedstep-lib.h"
30
31
32 /* speedstep_chipset:
33 * It is necessary to know which chipset is used. As accesses to
34 * this device occur at various places in this module, we need a
35 * static struct pci_dev * pointing to that device.
36 */
37 static struct pci_dev *speedstep_chipset_dev;
38
39
40 /* speedstep_processor
41 */
42 static unsigned int speedstep_processor = 0;
43
44 static u32 pmbase;
45
46 /*
47 * There are only two frequency states for each processor. Values
48 * are in kHz for the time being.
49 */
50 static struct cpufreq_frequency_table speedstep_freqs[] = {
51 {SPEEDSTEP_HIGH, 0},
52 {SPEEDSTEP_LOW, 0},
53 {0, CPUFREQ_TABLE_END},
54 };
55
56
57 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
58
59
60 /**
61 * speedstep_find_register - read the PMBASE address
62 *
63 * Returns: -ENODEV if no register could be found
64 */
65 static int speedstep_find_register (void)
66 {
67 if (!speedstep_chipset_dev)
68 return -ENODEV;
69
70 /* get PMBASE */
71 pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
72 if (!(pmbase & 0x01)) {
73 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
74 return -ENODEV;
75 }
76
77 pmbase &= 0xFFFFFFFE;
78 if (!pmbase) {
79 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
80 return -ENODEV;
81 }
82
83 dprintk("pmbase is 0x%x\n", pmbase);
84 return 0;
85 }
86
87 /**
88 * speedstep_set_state - set the SpeedStep state
89 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
90 *
91 * Tries to change the SpeedStep state.
92 */
93 static void speedstep_set_state (unsigned int state)
94 {
95 u8 pm2_blk;
96 u8 value;
97 unsigned long flags;
98
99 if (state > 0x1)
100 return;
101
102 /* Disable IRQs */
103 local_irq_save(flags);
104
105 /* read state */
106 value = inb(pmbase + 0x50);
107
108 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
109
110 /* write new state */
111 value &= 0xFE;
112 value |= state;
113
114 dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
115
116 /* Disable bus master arbitration */
117 pm2_blk = inb(pmbase + 0x20);
118 pm2_blk |= 0x01;
119 outb(pm2_blk, (pmbase + 0x20));
120
121 /* Actual transition */
122 outb(value, (pmbase + 0x50));
123
124 /* Restore bus master arbitration */
125 pm2_blk &= 0xfe;
126 outb(pm2_blk, (pmbase + 0x20));
127
128 /* check if transition was successful */
129 value = inb(pmbase + 0x50);
130
131 /* Enable IRQs */
132 local_irq_restore(flags);
133
134 dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
135
136 if (state == (value & 0x1)) {
137 dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
138 } else {
139 printk (KERN_ERR "cpufreq: change failed - I/O error\n");
140 }
141
142 return;
143 }
144
145
146 /**
147 * speedstep_activate - activate SpeedStep control in the chipset
148 *
149 * Tries to activate the SpeedStep status and control registers.
150 * Returns -EINVAL on an unsupported chipset, and zero on success.
151 */
152 static int speedstep_activate (void)
153 {
154 u16 value = 0;
155
156 if (!speedstep_chipset_dev)
157 return -EINVAL;
158
159 pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
160 if (!(value & 0x08)) {
161 value |= 0x08;
162 dprintk("activating SpeedStep (TM) registers\n");
163 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
164 }
165
166 return 0;
167 }
168
169
170 /**
171 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
172 *
173 * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
174 * the LPC bridge / PM module which contains all power-management
175 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
176 * chipset, or zero on failure.
177 */
178 static unsigned int speedstep_detect_chipset (void)
179 {
180 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
181 PCI_DEVICE_ID_INTEL_82801DB_12,
182 PCI_ANY_ID,
183 PCI_ANY_ID,
184 NULL);
185 if (speedstep_chipset_dev)
186 return 4; /* 4-M */
187
188 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
189 PCI_DEVICE_ID_INTEL_82801CA_12,
190 PCI_ANY_ID,
191 PCI_ANY_ID,
192 NULL);
193 if (speedstep_chipset_dev)
194 return 3; /* 3-M */
195
196
197 speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
198 PCI_DEVICE_ID_INTEL_82801BA_10,
199 PCI_ANY_ID,
200 PCI_ANY_ID,
201 NULL);
202 if (speedstep_chipset_dev) {
203 /* speedstep.c causes lockups on Dell Inspirons 8000 and
204 * 8100 which use a pretty old revision of the 82815
205 * host brige. Abort on these systems.
206 */
207 static struct pci_dev *hostbridge;
208 u8 rev = 0;
209
210 hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
211 PCI_DEVICE_ID_INTEL_82815_MC,
212 PCI_ANY_ID,
213 PCI_ANY_ID,
214 NULL);
215
216 if (!hostbridge)
217 return 2; /* 2-M */
218
219 pci_read_config_byte(hostbridge, PCI_REVISION_ID, &rev);
220 if (rev < 5) {
221 dprintk("hostbridge does not support speedstep\n");
222 speedstep_chipset_dev = NULL;
223 pci_dev_put(hostbridge);
224 return 0;
225 }
226
227 pci_dev_put(hostbridge);
228 return 2; /* 2-M */
229 }
230
231 return 0;
232 }
233
234 static unsigned int _speedstep_get(cpumask_t cpus)
235 {
236 unsigned int speed;
237 cpumask_t cpus_allowed;
238
239 cpus_allowed = current->cpus_allowed;
240 set_cpus_allowed(current, cpus);
241 speed = speedstep_get_processor_frequency(speedstep_processor);
242 set_cpus_allowed(current, cpus_allowed);
243 dprintk("detected %u kHz as current frequency\n", speed);
244 return speed;
245 }
246
247 static unsigned int speedstep_get(unsigned int cpu)
248 {
249 return _speedstep_get(cpumask_of_cpu(cpu));
250 }
251
252 /**
253 * speedstep_target - set a new CPUFreq policy
254 * @policy: new policy
255 * @target_freq: the target frequency
256 * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
257 *
258 * Sets a new CPUFreq policy.
259 */
260 static int speedstep_target (struct cpufreq_policy *policy,
261 unsigned int target_freq,
262 unsigned int relation)
263 {
264 unsigned int newstate = 0;
265 struct cpufreq_freqs freqs;
266 cpumask_t cpus_allowed;
267 int i;
268
269 if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
270 return -EINVAL;
271
272 freqs.old = _speedstep_get(policy->cpus);
273 freqs.new = speedstep_freqs[newstate].frequency;
274 freqs.cpu = policy->cpu;
275
276 dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
277
278 /* no transition necessary */
279 if (freqs.old == freqs.new)
280 return 0;
281
282 cpus_allowed = current->cpus_allowed;
283
284 for_each_cpu_mask(i, policy->cpus) {
285 freqs.cpu = i;
286 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
287 }
288
289 /* switch to physical CPU where state is to be changed */
290 set_cpus_allowed(current, policy->cpus);
291
292 speedstep_set_state(newstate);
293
294 /* allow to be run on all CPUs */
295 set_cpus_allowed(current, cpus_allowed);
296
297 for_each_cpu_mask(i, policy->cpus) {
298 freqs.cpu = i;
299 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
300 }
301
302 return 0;
303 }
304
305
306 /**
307 * speedstep_verify - verifies a new CPUFreq policy
308 * @policy: new policy
309 *
310 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
311 * at least one border included.
312 */
313 static int speedstep_verify (struct cpufreq_policy *policy)
314 {
315 return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
316 }
317
318
319 static int speedstep_cpu_init(struct cpufreq_policy *policy)
320 {
321 int result = 0;
322 unsigned int speed;
323 cpumask_t cpus_allowed;
324
325 /* only run on CPU to be set, or on its sibling */
326 #ifdef CONFIG_SMP
327 policy->cpus = cpu_sibling_map[policy->cpu];
328 #endif
329
330 cpus_allowed = current->cpus_allowed;
331 set_cpus_allowed(current, policy->cpus);
332
333 /* detect low and high frequency and transition latency */
334 result = speedstep_get_freqs(speedstep_processor,
335 &speedstep_freqs[SPEEDSTEP_LOW].frequency,
336 &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
337 &policy->cpuinfo.transition_latency,
338 &speedstep_set_state);
339 set_cpus_allowed(current, cpus_allowed);
340 if (result)
341 return result;
342
343 /* get current speed setting */
344 speed = _speedstep_get(policy->cpus);
345 if (!speed)
346 return -EIO;
347
348 dprintk("currently at %s speed setting - %i MHz\n",
349 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
350 (speed / 1000));
351
352 /* cpuinfo and default policy values */
353 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
354 policy->cur = speed;
355
356 result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
357 if (result)
358 return (result);
359
360 cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
361
362 return 0;
363 }
364
365
366 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
367 {
368 cpufreq_frequency_table_put_attr(policy->cpu);
369 return 0;
370 }
371
372 static struct freq_attr* speedstep_attr[] = {
373 &cpufreq_freq_attr_scaling_available_freqs,
374 NULL,
375 };
376
377
378 static struct cpufreq_driver speedstep_driver = {
379 .name = "speedstep-ich",
380 .verify = speedstep_verify,
381 .target = speedstep_target,
382 .init = speedstep_cpu_init,
383 .exit = speedstep_cpu_exit,
384 .get = speedstep_get,
385 .owner = THIS_MODULE,
386 .attr = speedstep_attr,
387 };
388
389
390 /**
391 * speedstep_init - initializes the SpeedStep CPUFreq driver
392 *
393 * Initializes the SpeedStep support. Returns -ENODEV on unsupported
394 * devices, -EINVAL on problems during initiatization, and zero on
395 * success.
396 */
397 static int __init speedstep_init(void)
398 {
399 /* detect processor */
400 speedstep_processor = speedstep_detect_processor();
401 if (!speedstep_processor) {
402 dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
403 return -ENODEV;
404 }
405
406 /* detect chipset */
407 if (!speedstep_detect_chipset()) {
408 dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
409 return -ENODEV;
410 }
411
412 /* activate speedstep support */
413 if (speedstep_activate()) {
414 pci_dev_put(speedstep_chipset_dev);
415 return -EINVAL;
416 }
417
418 if (speedstep_find_register())
419 return -ENODEV;
420
421 return cpufreq_register_driver(&speedstep_driver);
422 }
423
424
425 /**
426 * speedstep_exit - unregisters SpeedStep support
427 *
428 * Unregisters SpeedStep support.
429 */
430 static void __exit speedstep_exit(void)
431 {
432 pci_dev_put(speedstep_chipset_dev);
433 cpufreq_unregister_driver(&speedstep_driver);
434 }
435
436
437 MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
438 MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
439 MODULE_LICENSE ("GPL");
440
441 module_init(speedstep_init);
442 module_exit(speedstep_exit);