[PATCH] LOG2: Implement a general integer log2 facility in the kernel
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / i386 / Kconfig.cpu
1 # Put here option for CPU selection and depending optimization
2 if !X86_ELAN
3
4 choice
5 prompt "Processor family"
6 default M686
7
8 config M386
9 bool "386"
10 depends on !UML
11 ---help---
12 This is the processor type of your CPU. This information is used for
13 optimizing purposes. In order to compile a kernel that can run on
14 all x86 CPU types (albeit not optimally fast), you can specify
15 "386" here.
16
17 The kernel will not necessarily run on earlier architectures than
18 the one you have chosen, e.g. a Pentium optimized kernel will run on
19 a PPro, but not necessarily on a i486.
20
21 Here are the settings recommended for greatest speed:
22 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
23 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
24 will run on a 386 class machine.
25 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
26 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
27 - "586" for generic Pentium CPUs lacking the TSC
28 (time stamp counter) register.
29 - "Pentium-Classic" for the Intel Pentium.
30 - "Pentium-MMX" for the Intel Pentium MMX.
31 - "Pentium-Pro" for the Intel Pentium Pro.
32 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
33 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
34 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
35 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
36 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
37 - "Crusoe" for the Transmeta Crusoe series.
38 - "Efficeon" for the Transmeta Efficeon series.
39 - "Winchip-C6" for original IDT Winchip.
40 - "Winchip-2" for IDT Winchip 2.
41 - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
42 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
43 - "Geode GX/LX" For AMD Geode GX and LX processors.
44 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
45 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
46
47 If you don't know what to do, choose "386".
48
49 config M486
50 bool "486"
51 help
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57 config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 help
60 Select this for an 586 or 686 series processor such as the AMD K5,
61 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
62 assume the RDTSC (Read Time Stamp Counter) instruction.
63
64 config M586TSC
65 bool "Pentium-Classic"
66 help
67 Select this for a Pentium Classic processor with the RDTSC (Read
68 Time Stamp Counter) instruction for benchmarking.
69
70 config M586MMX
71 bool "Pentium-MMX"
72 help
73 Select this for a Pentium with the MMX graphics/multimedia
74 extended instructions.
75
76 config M686
77 bool "Pentium-Pro"
78 help
79 Select this for Intel Pentium Pro chips. This enables the use of
80 Pentium Pro extended instructions, and disables the init-time guard
81 against the f00f bug found in earlier Pentiums.
82
83 config MPENTIUMII
84 bool "Pentium-II/Celeron(pre-Coppermine)"
85 help
86 Select this for Intel chips based on the Pentium-II and
87 pre-Coppermine Celeron core. This option enables an unaligned
88 copy optimization, compiles the kernel with optimization flags
89 tailored for the chip, and applies any applicable Pentium Pro
90 optimizations.
91
92 config MPENTIUMIII
93 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
94 help
95 Select this for Intel chips based on the Pentium-III and
96 Celeron-Coppermine core. This option enables use of some
97 extended prefetch instructions in addition to the Pentium II
98 extensions.
99
100 config MPENTIUMM
101 bool "Pentium M"
102 help
103 Select this for Intel Pentium M (not Pentium-4 M)
104 notebook chips.
105
106 config MCORE2
107 bool "Core 2/newer Xeon"
108 help
109 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
110 CPUs. You can distingush newer from older Xeons by the CPU family
111 in /proc/cpuinfo. Newer ones have 6.
112
113 config MPENTIUM4
114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
115 help
116 Select this for Intel Pentium 4 chips. This includes the
117 Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
118 (not Pentium M) chips. This option enables compile flags
119 optimized for the chip, uses the correct cache shift, and
120 applies any applicable Pentium III optimizations.
121
122 config MK6
123 bool "K6/K6-II/K6-III"
124 help
125 Select this for an AMD K6-family processor. Enables use of
126 some extended instructions, and passes appropriate optimization
127 flags to GCC.
128
129 config MK7
130 bool "Athlon/Duron/K7"
131 help
132 Select this for an AMD Athlon K7-family processor. Enables use of
133 some extended instructions, and passes appropriate optimization
134 flags to GCC.
135
136 config MK8
137 bool "Opteron/Athlon64/Hammer/K8"
138 help
139 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
140 use of some extended instructions, and passes appropriate optimization
141 flags to GCC.
142
143 config MCRUSOE
144 bool "Crusoe"
145 help
146 Select this for a Transmeta Crusoe processor. Treats the processor
147 like a 586 with TSC, and sets some GCC optimization flags (like a
148 Pentium Pro with no alignment requirements).
149
150 config MEFFICEON
151 bool "Efficeon"
152 help
153 Select this for a Transmeta Efficeon processor.
154
155 config MWINCHIPC6
156 bool "Winchip-C6"
157 help
158 Select this for an IDT Winchip C6 chip. Linux and GCC
159 treat this chip as a 586TSC with some extended instructions
160 and alignment requirements.
161
162 config MWINCHIP2
163 bool "Winchip-2"
164 help
165 Select this for an IDT Winchip-2. Linux and GCC
166 treat this chip as a 586TSC with some extended instructions
167 and alignment requirements.
168
169 config MWINCHIP3D
170 bool "Winchip-2A/Winchip-3"
171 help
172 Select this for an IDT Winchip-2A or 3. Linux and GCC
173 treat this chip as a 586TSC with some extended instructions
174 and alignment reqirements. Also enable out of order memory
175 stores for this CPU, which can increase performance of some
176 operations.
177
178 config MGEODEGX1
179 bool "GeodeGX1"
180 help
181 Select this for a Geode GX1 (Cyrix MediaGX) chip.
182
183 config MGEODE_LX
184 bool "Geode GX/LX"
185 help
186 Select this for AMD Geode GX and LX processors.
187
188 config MCYRIXIII
189 bool "CyrixIII/VIA-C3"
190 help
191 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
192 treat this chip as a generic 586. Whilst the CPU is 686 class,
193 it lacks the cmov extension which gcc assumes is present when
194 generating 686 code.
195 Note that Nehemiah (Model 9) and above will not boot with this
196 kernel due to them lacking the 3DNow! instructions used in earlier
197 incarnations of the CPU.
198
199 config MVIAC3_2
200 bool "VIA C3-2 (Nehemiah)"
201 help
202 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
203 of SSE and tells gcc to treat the CPU as a 686.
204 Note, this kernel will not boot on older (pre model 9) C3s.
205
206 endchoice
207
208 config X86_GENERIC
209 bool "Generic x86 support"
210 help
211 Instead of just including optimizations for the selected
212 x86 variant (e.g. PII, Crusoe or Athlon), include some more
213 generic optimizations as well. This will make the kernel
214 perform better on x86 CPUs other than that selected.
215
216 This is really intended for distributors who need more
217 generic optimizations.
218
219 endif
220
221 #
222 # Define implied options from the CPU selection here
223 #
224 config X86_CMPXCHG
225 bool
226 depends on !M386
227 default y
228
229 config X86_XADD
230 bool
231 depends on !M386
232 default y
233
234 config X86_L1_CACHE_SHIFT
235 int
236 default "7" if MPENTIUM4 || X86_GENERIC
237 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
238 default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
239 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2
240
241 config RWSEM_GENERIC_SPINLOCK
242 bool
243 depends on M386
244 default y
245
246 config RWSEM_XCHGADD_ALGORITHM
247 bool
248 depends on !M386
249 default y
250
251 config ARCH_HAS_ILOG2_U32
252 bool
253 default n
254
255 config ARCH_HAS_ILOG2_U64
256 bool
257 default n
258
259 config GENERIC_CALIBRATE_DELAY
260 bool
261 default y
262
263 config X86_PPRO_FENCE
264 bool
265 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
266 default y
267
268 config X86_F00F_BUG
269 bool
270 depends on M586MMX || M586TSC || M586 || M486 || M386
271 default y
272
273 config X86_WP_WORKS_OK
274 bool
275 depends on !M386
276 default y
277
278 config X86_INVLPG
279 bool
280 depends on !M386
281 default y
282
283 config X86_BSWAP
284 bool
285 depends on !M386
286 default y
287
288 config X86_POPAD_OK
289 bool
290 depends on !M386
291 default y
292
293 config X86_CMPXCHG64
294 bool
295 depends on !M386 && !M486
296 default y
297
298 config X86_ALIGNMENT_16
299 bool
300 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
301 default y
302
303 config X86_GOOD_APIC
304 bool
305 depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2
306 default y
307
308 config X86_INTEL_USERCOPY
309 bool
310 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
311 default y
312
313 config X86_USE_PPRO_CHECKSUM
314 bool
315 depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
316 default y
317
318 config X86_USE_3DNOW
319 bool
320 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
321 default y
322
323 config X86_OOSTORE
324 bool
325 depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
326 default y
327
328 config X86_TSC
329 bool
330 depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
331 default y