arch/arm64/kernel/debug-monitors.c

   1 /*
   2  * ARMv8 single-step debug support and mdscr context switching.
   3  *
   4  * Copyright (C) 2012 ARM Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author: Will Deacon <will.deacon@arm.com>
  19  */
  20
  21 #include <linux/cpu.h>
  22 #include <linux/debugfs.h>
  23 #include <linux/hardirq.h>
  24 #include <linux/init.h>
  25 #include <linux/ptrace.h>
  26 #include <linux/stat.h>
  27 #include <linux/uaccess.h>
  28
  29 #include <asm/debug-monitors.h>
  30 #include <asm/local.h>
  31 #include <asm/cputype.h>
  32 #include <asm/system_misc.h>
  33
  34 /* Low-level stepping controls. */
  35 #define DBG_MDSCR_SS            (1 << 0)
  36 #define DBG_SPSR_SS             (1 << 21)
  37
  38 /* MDSCR_EL1 enabling bits */
  39 #define DBG_MDSCR_KDE           (1 << 13)
  40 #define DBG_MDSCR_MDE           (1 << 15)
  41 #define DBG_MDSCR_MASK          ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
  42
  43 /* Determine debug architecture. */
  44 u8 debug_monitors_arch(void)
  45 {
  46         return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
  47 }
  48
  49 /*
  50  * MDSCR access routines.
  51  */
  52 static void mdscr_write(u32 mdscr)
  53 {
  54         unsigned long flags;
  55         local_dbg_save(flags);
  56         asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
  57         local_dbg_restore(flags);
  58 }
  59
  60 static u32 mdscr_read(void)
  61 {
  62         u32 mdscr;
  63         asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
  64         return mdscr;
  65 }
  66
  67 /*
  68  * Allow root to disable self-hosted debug from userspace.
  69  * This is useful if you want to connect an external JTAG debugger.
  70  */
  71 static u32 debug_enabled = 1;
  72
  73 static int create_debug_debugfs_entry(void)
  74 {
  75         debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
  76         return 0;
  77 }
  78 fs_initcall(create_debug_debugfs_entry);
  79
  80 static int __init early_debug_disable(char *buf)
  81 {
  82         debug_enabled = 0;
  83         return 0;
  84 }
  85
  86 early_param("nodebugmon", early_debug_disable);
  87
  88 /*
  89  * Keep track of debug users on each core.
  90  * The ref counts are per-cpu so we use a local_t type.
  91  */
  92 static DEFINE_PER_CPU(local_t, mde_ref_count);
  93 static DEFINE_PER_CPU(local_t, kde_ref_count);
  94
  95 void enable_debug_monitors(enum debug_el el)
  96 {
  97         u32 mdscr, enable = 0;
  98
  99         WARN_ON(preemptible());
 100
 101         if (local_inc_return(&__get_cpu_var(mde_ref_count)) == 1)
 102                 enable = DBG_MDSCR_MDE;
 103
 104         if (el == DBG_ACTIVE_EL1 &&
 105             local_inc_return(&__get_cpu_var(kde_ref_count)) == 1)
 106                 enable |= DBG_MDSCR_KDE;
 107
 108         if (enable && debug_enabled) {
 109                 mdscr = mdscr_read();
 110                 mdscr |= enable;
 111                 mdscr_write(mdscr);
 112         }
 113 }
 114
 115 void disable_debug_monitors(enum debug_el el)
 116 {
 117         u32 mdscr, disable = 0;
 118
 119         WARN_ON(preemptible());
 120
 121         if (local_dec_and_test(&__get_cpu_var(mde_ref_count)))
 122                 disable = ~DBG_MDSCR_MDE;
 123
 124         if (el == DBG_ACTIVE_EL1 &&
 125             local_dec_and_test(&__get_cpu_var(kde_ref_count)))
 126                 disable &= ~DBG_MDSCR_KDE;
 127
 128         if (disable) {
 129                 mdscr = mdscr_read();
 130                 mdscr &= disable;
 131                 mdscr_write(mdscr);
 132         }
 133 }
 134
 135 /*
 136  * OS lock clearing.
 137  */
 138 static void clear_os_lock(void *unused)
 139 {
 140         asm volatile("msr oslar_el1, %0" : : "r" (0));
 141 }
 142
 143 static int __cpuinit os_lock_notify(struct notifier_block *self,
 144                                     unsigned long action, void *data)
 145 {
 146         int cpu = (unsigned long)data;
 147         if (action == CPU_ONLINE)
 148                 smp_call_function_single(cpu, clear_os_lock, NULL, 1);
 149         return NOTIFY_OK;
 150 }
 151
 152 static struct notifier_block __cpuinitdata os_lock_nb = {
 153         .notifier_call = os_lock_notify,
 154 };
 155
 156 static int __cpuinit debug_monitors_init(void)
 157 {
 158         /* Clear the OS lock. */
 159         on_each_cpu(clear_os_lock, NULL, 1);
 160         isb();
 161         local_dbg_enable();
 162
 163         /* Register hotplug handler. */
 164         register_cpu_notifier(&os_lock_nb);
 165         return 0;
 166 }
 167 postcore_initcall(debug_monitors_init);
 168
 169 /*
 170  * Single step API and exception handling.
 171  */
 172 static void set_regs_spsr_ss(struct pt_regs *regs)
 173 {
 174         unsigned long spsr;
 175
 176         spsr = regs->pstate;
 177         spsr &= ~DBG_SPSR_SS;
 178         spsr |= DBG_SPSR_SS;
 179         regs->pstate = spsr;
 180 }
 181
 182 static void clear_regs_spsr_ss(struct pt_regs *regs)
 183 {
 184         unsigned long spsr;
 185
 186         spsr = regs->pstate;
 187         spsr &= ~DBG_SPSR_SS;
 188         regs->pstate = spsr;
 189 }
 190
 191 /* EL1 Single Step Handler hooks */
 192 static LIST_HEAD(step_hook);
 193 DEFINE_RWLOCK(step_hook_lock);
 194
 195 void register_step_hook(struct step_hook *hook)
 196 {
 197         write_lock(&step_hook_lock);
 198         list_add(&hook->node, &step_hook);
 199         write_unlock(&step_hook_lock);
 200 }
 201
 202 void unregister_step_hook(struct step_hook *hook)
 203 {
 204         write_lock(&step_hook_lock);
 205         list_del(&hook->node);
 206         write_unlock(&step_hook_lock);
 207 }
 208
 209 /*
 210  * Call registered single step handers
 211  * There is no Syndrome info to check for determining the handler.
 212  * So we call all the registered handlers, until the right handler is
 213  * found which returns zero.
 214  */
 215 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
 216 {
 217         struct step_hook *hook;
 218         int retval = DBG_HOOK_ERROR;
 219
 220         read_lock(&step_hook_lock);
 221
 222         list_for_each_entry(hook, &step_hook, node)     {
 223                 retval = hook->fn(regs, esr);
 224                 if (retval == DBG_HOOK_HANDLED)
 225                         break;
 226         }
 227
 228         read_unlock(&step_hook_lock);
 229
 230         return retval;
 231 }
 232
 233 static int single_step_handler(unsigned long addr, unsigned int esr,
 234                                struct pt_regs *regs)
 235 {
 236         siginfo_t info;
 237
 238         /*
 239          * If we are stepping a pending breakpoint, call the hw_breakpoint
 240          * handler first.
 241          */
 242         if (!reinstall_suspended_bps(regs))
 243                 return 0;
 244
 245         if (user_mode(regs)) {
 246                 info.si_signo = SIGTRAP;
 247                 info.si_errno = 0;
 248                 info.si_code  = TRAP_HWBKPT;
 249                 info.si_addr  = (void __user *)instruction_pointer(regs);
 250                 force_sig_info(SIGTRAP, &info, current);
 251
 252                 /*
 253                  * ptrace will disable single step unless explicitly
 254                  * asked to re-enable it. For other clients, it makes
 255                  * sense to leave it enabled (i.e. rewind the controls
 256                  * to the active-not-pending state).
 257                  */
 258                 user_rewind_single_step(current);
 259         } else {
 260                 if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
 261                         return 0;
 262
 263                 pr_warning("Unexpected kernel single-step exception at EL1\n");
 264                 /*
 265                  * Re-enable stepping since we know that we will be
 266                  * returning to regs.
 267                  */
 268                 set_regs_spsr_ss(regs);
 269         }
 270
 271         return 0;
 272 }
 273
 274 /*
 275  * Breakpoint handler is re-entrant as another breakpoint can
 276  * hit within breakpoint handler, especically in kprobes.
 277  * Use reader/writer locks instead of plain spinlock.
 278  */
 279 static LIST_HEAD(break_hook);
 280 DEFINE_RWLOCK(break_hook_lock);
 281
 282 void register_break_hook(struct break_hook *hook)
 283 {
 284         write_lock(&break_hook_lock);
 285         list_add(&hook->node, &break_hook);
 286         write_unlock(&break_hook_lock);
 287 }
 288
 289 void unregister_break_hook(struct break_hook *hook)
 290 {
 291         write_lock(&break_hook_lock);
 292         list_del(&hook->node);
 293         write_unlock(&break_hook_lock);
 294 }
 295
 296 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
 297 {
 298         struct break_hook *hook;
 299         int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
 300
 301         read_lock(&break_hook_lock);
 302         list_for_each_entry(hook, &break_hook, node)
 303                 if ((esr & hook->esr_mask) == hook->esr_val)
 304                         fn = hook->fn;
 305         read_unlock(&break_hook_lock);
 306
 307         return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
 308 }
 309
 310 static int brk_handler(unsigned long addr, unsigned int esr,
 311                        struct pt_regs *regs)
 312 {
 313         siginfo_t info;
 314
 315         if (user_mode(regs)) {
 316                 info = (siginfo_t) {
 317                         .si_signo = SIGTRAP,
 318                         .si_errno = 0,
 319                         .si_code  = TRAP_BRKPT,
 320                         .si_addr  = (void __user *)instruction_pointer(regs),
 321                 };
 322
 323                 force_sig_info(SIGTRAP, &info, current);
 324         } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
 325                 pr_warning("Unexpected kernel BRK exception at EL1\n");
 326                 return -EFAULT;
 327         }
 328
 329         return 0;
 330 }
 331
 332 int aarch32_break_handler(struct pt_regs *regs)
 333 {
 334         siginfo_t info;
 335         unsigned int instr;
 336         bool bp = false;
 337         void __user *pc = (void __user *)instruction_pointer(regs);
 338
 339         if (!compat_user_mode(regs))
 340                 return -EFAULT;
 341
 342         if (compat_thumb_mode(regs)) {
 343                 /* get 16-bit Thumb instruction */
 344                 get_user(instr, (u16 __user *)pc);
 345                 if (instr == AARCH32_BREAK_THUMB2_LO) {
 346                         /* get second half of 32-bit Thumb-2 instruction */
 347                         get_user(instr, (u16 __user *)(pc + 2));
 348                         bp = instr == AARCH32_BREAK_THUMB2_HI;
 349                 } else {
 350                         bp = instr == AARCH32_BREAK_THUMB;
 351                 }
 352         } else {
 353                 /* 32-bit ARM instruction */
 354                 get_user(instr, (u32 __user *)pc);
 355                 bp = (instr & ~0xf0000000) == AARCH32_BREAK_ARM;
 356         }
 357
 358         if (!bp)
 359                 return -EFAULT;
 360
 361         info = (siginfo_t) {
 362                 .si_signo = SIGTRAP,
 363                 .si_errno = 0,
 364                 .si_code  = TRAP_BRKPT,
 365                 .si_addr  = pc,
 366         };
 367
 368         force_sig_info(SIGTRAP, &info, current);
 369         return 0;
 370 }
 371
 372 static int __init debug_traps_init(void)
 373 {
 374         hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
 375                               TRAP_HWBKPT, "single-step handler");
 376         hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
 377                               TRAP_BRKPT, "ptrace BRK handler");
 378         return 0;
 379 }
 380 arch_initcall(debug_traps_init);
 381
 382 /* Re-enable single step for syscall restarting. */
 383 void user_rewind_single_step(struct task_struct *task)
 384 {
 385         /*
 386          * If single step is active for this thread, then set SPSR.SS
 387          * to 1 to avoid returning to the active-pending state.
 388          */
 389         if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
 390                 set_regs_spsr_ss(task_pt_regs(task));
 391 }
 392
 393 void user_fastforward_single_step(struct task_struct *task)
 394 {
 395         if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
 396                 clear_regs_spsr_ss(task_pt_regs(task));
 397 }
 398
 399 /* Kernel API */
 400 void kernel_enable_single_step(struct pt_regs *regs)
 401 {
 402         WARN_ON(!irqs_disabled());
 403         set_regs_spsr_ss(regs);
 404         mdscr_write(mdscr_read() | DBG_MDSCR_SS);
 405         enable_debug_monitors(DBG_ACTIVE_EL1);
 406 }
 407
 408 void kernel_disable_single_step(void)
 409 {
 410         WARN_ON(!irqs_disabled());
 411         mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
 412         disable_debug_monitors(DBG_ACTIVE_EL1);
 413 }
 414
 415 int kernel_active_single_step(void)
 416 {
 417         WARN_ON(!irqs_disabled());
 418         return mdscr_read() & DBG_MDSCR_SS;
 419 }
 420
 421 /* ptrace API */
 422 void user_enable_single_step(struct task_struct *task)
 423 {
 424         set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
 425         set_regs_spsr_ss(task_pt_regs(task));
 426 }
 427
 428 void user_disable_single_step(struct task_struct *task)
 429 {
 430         clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
 431 }