9a82b8874918d5c3fb16247d92a3cdd84623a4ad
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-samsung / include / plat / clock.h
1 /* linux/arch/arm/plat-s3c/include/plat/clock.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Written by Ben Dooks, <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/spinlock.h>
13
14 struct clk;
15
16 /**
17 * struct clk_ops - standard clock operations
18 * @set_rate: set the clock rate, see clk_set_rate().
19 * @get_rate: get the clock rate, see clk_get_rate().
20 * @round_rate: round a given clock rate, see clk_round_rate().
21 * @set_parent: set the clock's parent, see clk_set_parent().
22 *
23 * Group the common clock implementations together so that we
24 * don't have to keep setting the same fiels again. We leave
25 * enable in struct clk.
26 *
27 * Adding an extra layer of indirection into the process should
28 * not be a problem as it is unlikely these operations are going
29 * to need to be called quickly.
30 */
31 struct clk_ops {
32 int (*set_rate)(struct clk *c, unsigned long rate);
33 unsigned long (*get_rate)(struct clk *c);
34 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
35 int (*set_parent)(struct clk *c, struct clk *parent);
36 };
37
38 struct clk {
39 struct list_head list;
40 struct module *owner;
41 struct clk *parent;
42 const char *name;
43 int id;
44 int usage;
45 unsigned long rate;
46 unsigned long ctrlbit;
47
48 struct clk_ops *ops;
49 int (*enable)(struct clk *, int enable);
50 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
51 struct dentry *dent; /* For visible tree hierarchy */
52 #endif
53 };
54
55 /* other clocks which may be registered by board support */
56
57 extern struct clk s3c24xx_dclk0;
58 extern struct clk s3c24xx_dclk1;
59 extern struct clk s3c24xx_clkout0;
60 extern struct clk s3c24xx_clkout1;
61 extern struct clk s3c24xx_uclk;
62
63 extern struct clk clk_usb_bus;
64
65 /* core clock support */
66
67 extern struct clk clk_f;
68 extern struct clk clk_h;
69 extern struct clk clk_p;
70 extern struct clk clk_mpll;
71 extern struct clk clk_upll;
72 extern struct clk clk_epll;
73 extern struct clk clk_xtal;
74 extern struct clk clk_ext;
75
76 /* S3C64XX specific clocks */
77 extern struct clk clk_h2;
78 extern struct clk clk_27m;
79 extern struct clk clk_48m;
80 extern struct clk clk_xusbxti;
81
82 extern int clk_default_setrate(struct clk *clk, unsigned long rate);
83 extern struct clk_ops clk_ops_def_setrate;
84
85 /* exports for arch/arm/mach-s3c2410
86 *
87 * Please DO NOT use these outside of arch/arm/mach-s3c2410
88 */
89
90 extern spinlock_t clocks_lock;
91
92 extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
93
94 extern int s3c24xx_register_clock(struct clk *clk);
95 extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
96
97 extern void s3c_register_clocks(struct clk *clk, int nr_clks);
98 extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
99
100 extern int s3c24xx_register_baseclocks(unsigned long xtal);
101
102 extern void s5p_register_clocks(unsigned long xtal_freq);
103
104 extern void s3c24xx_setup_clocks(unsigned long fclk,
105 unsigned long hclk,
106 unsigned long pclk);
107
108 extern void s3c2410_setup_clocks(void);
109 extern void s3c2412_setup_clocks(void);
110 extern void s3c244x_setup_clocks(void);
111 extern void s3c2443_setup_clocks(void);
112
113 /* S3C64XX specific functions and clocks */
114
115 extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
116
117 /* Init for pwm clock code */
118
119 extern void s3c_pwmclk_init(void);
120