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Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/amba/pl330.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/fb.h>
27 #include <linux/gfp.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/onenand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/mmc/host.h>
32 #include <linux/ioport.h>
33 #include <linux/platform_data/s3c-hsudc.h>
34 #include <linux/platform_data/s3c-hsotg.h>
35
36 #include <media/s5p_hdmi.h>
37
38 #include <asm/irq.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/irq.h>
42
43 #include <mach/hardware.h>
44 #include <mach/dma.h>
45 #include <mach/irqs.h>
46 #include <mach/map.h>
47
48 #include <plat/cpu.h>
49 #include <plat/devs.h>
50 #include <plat/adc.h>
51 #include <linux/platform_data/ata-samsung_cf.h>
52 #include <linux/platform_data/usb-ehci-s5p.h>
53 #include <plat/fb.h>
54 #include <plat/fb-s3c2410.h>
55 #include <plat/hdmi.h>
56 #include <linux/platform_data/hwmon-s3c.h>
57 #include <linux/platform_data/i2c-s3c2410.h>
58 #include <plat/keypad.h>
59 #include <linux/platform_data/mmc-s3cmci.h>
60 #include <linux/platform_data/mtd-nand-s3c2410.h>
61 #include <plat/sdhci.h>
62 #include <linux/platform_data/touchscreen-s3c2410.h>
63 #include <linux/platform_data/usb-s3c2410_udc.h>
64 #include <linux/platform_data/usb-ohci-s3c2410.h>
65 #include <plat/usb-phy.h>
66 #include <plat/regs-iic.h>
67 #include <plat/regs-serial.h>
68 #include <plat/regs-spi.h>
69 #include <linux/platform_data/spi-s3c64xx.h>
70
71 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
72
73 /* AC97 */
74 #ifdef CONFIG_CPU_S3C2440
75 static struct resource s3c_ac97_resource[] = {
76 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
77 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
78 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
79 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
80 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
81 };
82
83 struct platform_device s3c_device_ac97 = {
84 .name = "samsung-ac97",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
87 .resource = s3c_ac97_resource,
88 .dev = {
89 .dma_mask = &samsung_device_dma_mask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 }
92 };
93 #endif /* CONFIG_CPU_S3C2440 */
94
95 /* ADC */
96
97 #ifdef CONFIG_PLAT_S3C24XX
98 static struct resource s3c_adc_resource[] = {
99 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
100 [1] = DEFINE_RES_IRQ(IRQ_TC),
101 [2] = DEFINE_RES_IRQ(IRQ_ADC),
102 };
103
104 struct platform_device s3c_device_adc = {
105 .name = "s3c24xx-adc",
106 .id = -1,
107 .num_resources = ARRAY_SIZE(s3c_adc_resource),
108 .resource = s3c_adc_resource,
109 };
110 #endif /* CONFIG_PLAT_S3C24XX */
111
112 #if defined(CONFIG_SAMSUNG_DEV_ADC)
113 static struct resource s3c_adc_resource[] = {
114 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
115 [1] = DEFINE_RES_IRQ(IRQ_TC),
116 [2] = DEFINE_RES_IRQ(IRQ_ADC),
117 };
118
119 struct platform_device s3c_device_adc = {
120 .name = "samsung-adc",
121 .id = -1,
122 .num_resources = ARRAY_SIZE(s3c_adc_resource),
123 .resource = s3c_adc_resource,
124 };
125 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126
127 /* Camif Controller */
128
129 #ifdef CONFIG_CPU_S3C2440
130 static struct resource s3c_camif_resource[] = {
131 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
132 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
133 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
134 };
135
136 struct platform_device s3c_device_camif = {
137 .name = "s3c2440-camif",
138 .id = -1,
139 .num_resources = ARRAY_SIZE(s3c_camif_resource),
140 .resource = s3c_camif_resource,
141 .dev = {
142 .dma_mask = &samsung_device_dma_mask,
143 .coherent_dma_mask = DMA_BIT_MASK(32),
144 }
145 };
146 #endif /* CONFIG_CPU_S3C2440 */
147
148 /* ASOC DMA */
149
150 struct platform_device samsung_asoc_idma = {
151 .name = "samsung-idma",
152 .id = -1,
153 .dev = {
154 .dma_mask = &samsung_device_dma_mask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 }
157 };
158
159 /* FB */
160
161 #ifdef CONFIG_S3C_DEV_FB
162 static struct resource s3c_fb_resource[] = {
163 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
164 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
165 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
166 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
167 };
168
169 struct platform_device s3c_device_fb = {
170 .name = "s3c-fb",
171 .id = -1,
172 .num_resources = ARRAY_SIZE(s3c_fb_resource),
173 .resource = s3c_fb_resource,
174 .dev = {
175 .dma_mask = &samsung_device_dma_mask,
176 .coherent_dma_mask = DMA_BIT_MASK(32),
177 },
178 };
179
180 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
181 {
182 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
183 &s3c_device_fb);
184 }
185 #endif /* CONFIG_S3C_DEV_FB */
186
187 /* FIMC */
188
189 #ifdef CONFIG_S5P_DEV_FIMC0
190 static struct resource s5p_fimc0_resource[] = {
191 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
192 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
193 };
194
195 struct platform_device s5p_device_fimc0 = {
196 .name = "s5p-fimc",
197 .id = 0,
198 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
199 .resource = s5p_fimc0_resource,
200 .dev = {
201 .dma_mask = &samsung_device_dma_mask,
202 .coherent_dma_mask = DMA_BIT_MASK(32),
203 },
204 };
205
206 struct platform_device s5p_device_fimc_md = {
207 .name = "s5p-fimc-md",
208 .id = -1,
209 };
210 #endif /* CONFIG_S5P_DEV_FIMC0 */
211
212 #ifdef CONFIG_S5P_DEV_FIMC1
213 static struct resource s5p_fimc1_resource[] = {
214 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
215 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
216 };
217
218 struct platform_device s5p_device_fimc1 = {
219 .name = "s5p-fimc",
220 .id = 1,
221 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
222 .resource = s5p_fimc1_resource,
223 .dev = {
224 .dma_mask = &samsung_device_dma_mask,
225 .coherent_dma_mask = DMA_BIT_MASK(32),
226 },
227 };
228 #endif /* CONFIG_S5P_DEV_FIMC1 */
229
230 #ifdef CONFIG_S5P_DEV_FIMC2
231 static struct resource s5p_fimc2_resource[] = {
232 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
233 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
234 };
235
236 struct platform_device s5p_device_fimc2 = {
237 .name = "s5p-fimc",
238 .id = 2,
239 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
240 .resource = s5p_fimc2_resource,
241 .dev = {
242 .dma_mask = &samsung_device_dma_mask,
243 .coherent_dma_mask = DMA_BIT_MASK(32),
244 },
245 };
246 #endif /* CONFIG_S5P_DEV_FIMC2 */
247
248 #ifdef CONFIG_S5P_DEV_FIMC3
249 static struct resource s5p_fimc3_resource[] = {
250 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
251 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
252 };
253
254 struct platform_device s5p_device_fimc3 = {
255 .name = "s5p-fimc",
256 .id = 3,
257 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
258 .resource = s5p_fimc3_resource,
259 .dev = {
260 .dma_mask = &samsung_device_dma_mask,
261 .coherent_dma_mask = DMA_BIT_MASK(32),
262 },
263 };
264 #endif /* CONFIG_S5P_DEV_FIMC3 */
265
266 /* G2D */
267
268 #ifdef CONFIG_S5P_DEV_G2D
269 static struct resource s5p_g2d_resource[] = {
270 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
271 [1] = DEFINE_RES_IRQ(IRQ_2D),
272 };
273
274 struct platform_device s5p_device_g2d = {
275 .name = "s5p-g2d",
276 .id = 0,
277 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
278 .resource = s5p_g2d_resource,
279 .dev = {
280 .dma_mask = &samsung_device_dma_mask,
281 .coherent_dma_mask = DMA_BIT_MASK(32),
282 },
283 };
284 #endif /* CONFIG_S5P_DEV_G2D */
285
286 #ifdef CONFIG_S5P_DEV_JPEG
287 static struct resource s5p_jpeg_resource[] = {
288 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
289 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
290 };
291
292 struct platform_device s5p_device_jpeg = {
293 .name = "s5p-jpeg",
294 .id = 0,
295 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
296 .resource = s5p_jpeg_resource,
297 .dev = {
298 .dma_mask = &samsung_device_dma_mask,
299 .coherent_dma_mask = DMA_BIT_MASK(32),
300 },
301 };
302 #endif /* CONFIG_S5P_DEV_JPEG */
303
304 /* FIMD0 */
305
306 #ifdef CONFIG_S5P_DEV_FIMD0
307 static struct resource s5p_fimd0_resource[] = {
308 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
309 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
310 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
311 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
312 };
313
314 struct platform_device s5p_device_fimd0 = {
315 .name = "s5p-fb",
316 .id = 0,
317 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
318 .resource = s5p_fimd0_resource,
319 .dev = {
320 .dma_mask = &samsung_device_dma_mask,
321 .coherent_dma_mask = DMA_BIT_MASK(32),
322 },
323 };
324
325 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
326 {
327 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
328 &s5p_device_fimd0);
329 }
330 #endif /* CONFIG_S5P_DEV_FIMD0 */
331
332 /* HWMON */
333
334 #ifdef CONFIG_S3C_DEV_HWMON
335 struct platform_device s3c_device_hwmon = {
336 .name = "s3c-hwmon",
337 .id = -1,
338 .dev.parent = &s3c_device_adc.dev,
339 };
340
341 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
342 {
343 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
344 &s3c_device_hwmon);
345 }
346 #endif /* CONFIG_S3C_DEV_HWMON */
347
348 /* HSMMC */
349
350 #ifdef CONFIG_S3C_DEV_HSMMC
351 static struct resource s3c_hsmmc_resource[] = {
352 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
353 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
354 };
355
356 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
357 .max_width = 4,
358 .host_caps = (MMC_CAP_4_BIT_DATA |
359 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
360 };
361
362 struct platform_device s3c_device_hsmmc0 = {
363 .name = "s3c-sdhci",
364 .id = 0,
365 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
366 .resource = s3c_hsmmc_resource,
367 .dev = {
368 .dma_mask = &samsung_device_dma_mask,
369 .coherent_dma_mask = DMA_BIT_MASK(32),
370 .platform_data = &s3c_hsmmc0_def_platdata,
371 },
372 };
373
374 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
375 {
376 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
377 }
378 #endif /* CONFIG_S3C_DEV_HSMMC */
379
380 #ifdef CONFIG_S3C_DEV_HSMMC1
381 static struct resource s3c_hsmmc1_resource[] = {
382 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
383 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
384 };
385
386 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
387 .max_width = 4,
388 .host_caps = (MMC_CAP_4_BIT_DATA |
389 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
390 };
391
392 struct platform_device s3c_device_hsmmc1 = {
393 .name = "s3c-sdhci",
394 .id = 1,
395 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
396 .resource = s3c_hsmmc1_resource,
397 .dev = {
398 .dma_mask = &samsung_device_dma_mask,
399 .coherent_dma_mask = DMA_BIT_MASK(32),
400 .platform_data = &s3c_hsmmc1_def_platdata,
401 },
402 };
403
404 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
405 {
406 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
407 }
408 #endif /* CONFIG_S3C_DEV_HSMMC1 */
409
410 /* HSMMC2 */
411
412 #ifdef CONFIG_S3C_DEV_HSMMC2
413 static struct resource s3c_hsmmc2_resource[] = {
414 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
415 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
416 };
417
418 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
419 .max_width = 4,
420 .host_caps = (MMC_CAP_4_BIT_DATA |
421 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
422 };
423
424 struct platform_device s3c_device_hsmmc2 = {
425 .name = "s3c-sdhci",
426 .id = 2,
427 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
428 .resource = s3c_hsmmc2_resource,
429 .dev = {
430 .dma_mask = &samsung_device_dma_mask,
431 .coherent_dma_mask = DMA_BIT_MASK(32),
432 .platform_data = &s3c_hsmmc2_def_platdata,
433 },
434 };
435
436 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
437 {
438 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
439 }
440 #endif /* CONFIG_S3C_DEV_HSMMC2 */
441
442 #ifdef CONFIG_S3C_DEV_HSMMC3
443 static struct resource s3c_hsmmc3_resource[] = {
444 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
445 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
446 };
447
448 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
449 .max_width = 4,
450 .host_caps = (MMC_CAP_4_BIT_DATA |
451 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
452 };
453
454 struct platform_device s3c_device_hsmmc3 = {
455 .name = "s3c-sdhci",
456 .id = 3,
457 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
458 .resource = s3c_hsmmc3_resource,
459 .dev = {
460 .dma_mask = &samsung_device_dma_mask,
461 .coherent_dma_mask = DMA_BIT_MASK(32),
462 .platform_data = &s3c_hsmmc3_def_platdata,
463 },
464 };
465
466 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
467 {
468 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
469 }
470 #endif /* CONFIG_S3C_DEV_HSMMC3 */
471
472 /* I2C */
473
474 static struct resource s3c_i2c0_resource[] = {
475 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
476 [1] = DEFINE_RES_IRQ(IRQ_IIC),
477 };
478
479 struct platform_device s3c_device_i2c0 = {
480 .name = "s3c2410-i2c",
481 .id = 0,
482 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
483 .resource = s3c_i2c0_resource,
484 };
485
486 struct s3c2410_platform_i2c default_i2c_data __initdata = {
487 .flags = 0,
488 .slave_addr = 0x10,
489 .frequency = 100*1000,
490 .sda_delay = 100,
491 };
492
493 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
494 {
495 struct s3c2410_platform_i2c *npd;
496
497 if (!pd) {
498 pd = &default_i2c_data;
499 pd->bus_num = 0;
500 }
501
502 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
503 &s3c_device_i2c0);
504
505 if (!npd->cfg_gpio)
506 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
507 }
508
509 #ifdef CONFIG_S3C_DEV_I2C1
510 static struct resource s3c_i2c1_resource[] = {
511 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
512 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
513 };
514
515 struct platform_device s3c_device_i2c1 = {
516 .name = "s3c2410-i2c",
517 .id = 1,
518 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
519 .resource = s3c_i2c1_resource,
520 };
521
522 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
523 {
524 struct s3c2410_platform_i2c *npd;
525
526 if (!pd) {
527 pd = &default_i2c_data;
528 pd->bus_num = 1;
529 }
530
531 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
532 &s3c_device_i2c1);
533
534 if (!npd->cfg_gpio)
535 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
536 }
537 #endif /* CONFIG_S3C_DEV_I2C1 */
538
539 #ifdef CONFIG_S3C_DEV_I2C2
540 static struct resource s3c_i2c2_resource[] = {
541 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
542 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
543 };
544
545 struct platform_device s3c_device_i2c2 = {
546 .name = "s3c2410-i2c",
547 .id = 2,
548 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
549 .resource = s3c_i2c2_resource,
550 };
551
552 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
553 {
554 struct s3c2410_platform_i2c *npd;
555
556 if (!pd) {
557 pd = &default_i2c_data;
558 pd->bus_num = 2;
559 }
560
561 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
562 &s3c_device_i2c2);
563
564 if (!npd->cfg_gpio)
565 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
566 }
567 #endif /* CONFIG_S3C_DEV_I2C2 */
568
569 #ifdef CONFIG_S3C_DEV_I2C3
570 static struct resource s3c_i2c3_resource[] = {
571 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
572 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
573 };
574
575 struct platform_device s3c_device_i2c3 = {
576 .name = "s3c2440-i2c",
577 .id = 3,
578 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
579 .resource = s3c_i2c3_resource,
580 };
581
582 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
583 {
584 struct s3c2410_platform_i2c *npd;
585
586 if (!pd) {
587 pd = &default_i2c_data;
588 pd->bus_num = 3;
589 }
590
591 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
592 &s3c_device_i2c3);
593
594 if (!npd->cfg_gpio)
595 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
596 }
597 #endif /*CONFIG_S3C_DEV_I2C3 */
598
599 #ifdef CONFIG_S3C_DEV_I2C4
600 static struct resource s3c_i2c4_resource[] = {
601 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
602 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
603 };
604
605 struct platform_device s3c_device_i2c4 = {
606 .name = "s3c2440-i2c",
607 .id = 4,
608 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
609 .resource = s3c_i2c4_resource,
610 };
611
612 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
613 {
614 struct s3c2410_platform_i2c *npd;
615
616 if (!pd) {
617 pd = &default_i2c_data;
618 pd->bus_num = 4;
619 }
620
621 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
622 &s3c_device_i2c4);
623
624 if (!npd->cfg_gpio)
625 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
626 }
627 #endif /*CONFIG_S3C_DEV_I2C4 */
628
629 #ifdef CONFIG_S3C_DEV_I2C5
630 static struct resource s3c_i2c5_resource[] = {
631 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
632 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
633 };
634
635 struct platform_device s3c_device_i2c5 = {
636 .name = "s3c2440-i2c",
637 .id = 5,
638 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
639 .resource = s3c_i2c5_resource,
640 };
641
642 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
643 {
644 struct s3c2410_platform_i2c *npd;
645
646 if (!pd) {
647 pd = &default_i2c_data;
648 pd->bus_num = 5;
649 }
650
651 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
652 &s3c_device_i2c5);
653
654 if (!npd->cfg_gpio)
655 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
656 }
657 #endif /*CONFIG_S3C_DEV_I2C5 */
658
659 #ifdef CONFIG_S3C_DEV_I2C6
660 static struct resource s3c_i2c6_resource[] = {
661 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
662 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
663 };
664
665 struct platform_device s3c_device_i2c6 = {
666 .name = "s3c2440-i2c",
667 .id = 6,
668 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
669 .resource = s3c_i2c6_resource,
670 };
671
672 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
673 {
674 struct s3c2410_platform_i2c *npd;
675
676 if (!pd) {
677 pd = &default_i2c_data;
678 pd->bus_num = 6;
679 }
680
681 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
682 &s3c_device_i2c6);
683
684 if (!npd->cfg_gpio)
685 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
686 }
687 #endif /* CONFIG_S3C_DEV_I2C6 */
688
689 #ifdef CONFIG_S3C_DEV_I2C7
690 static struct resource s3c_i2c7_resource[] = {
691 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
692 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
693 };
694
695 struct platform_device s3c_device_i2c7 = {
696 .name = "s3c2440-i2c",
697 .id = 7,
698 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
699 .resource = s3c_i2c7_resource,
700 };
701
702 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
703 {
704 struct s3c2410_platform_i2c *npd;
705
706 if (!pd) {
707 pd = &default_i2c_data;
708 pd->bus_num = 7;
709 }
710
711 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
712 &s3c_device_i2c7);
713
714 if (!npd->cfg_gpio)
715 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
716 }
717 #endif /* CONFIG_S3C_DEV_I2C7 */
718
719 /* I2C HDMIPHY */
720
721 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
722 static struct resource s5p_i2c_resource[] = {
723 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
724 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
725 };
726
727 struct platform_device s5p_device_i2c_hdmiphy = {
728 .name = "s3c2440-hdmiphy-i2c",
729 .id = -1,
730 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
731 .resource = s5p_i2c_resource,
732 };
733
734 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
735 {
736 struct s3c2410_platform_i2c *npd;
737
738 if (!pd) {
739 pd = &default_i2c_data;
740
741 if (soc_is_exynos4210() ||
742 soc_is_exynos4212() || soc_is_exynos4412())
743 pd->bus_num = 8;
744 else if (soc_is_s5pv210())
745 pd->bus_num = 3;
746 else
747 pd->bus_num = 0;
748 }
749
750 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
751 &s5p_device_i2c_hdmiphy);
752 }
753
754 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
755
756 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
757 struct i2c_board_info *mhl_info, int mhl_bus)
758 {
759 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
760
761 if (soc_is_exynos4210() ||
762 soc_is_exynos4212() || soc_is_exynos4412())
763 pd->hdmiphy_bus = 8;
764 else if (soc_is_s5pv210())
765 pd->hdmiphy_bus = 3;
766 else
767 pd->hdmiphy_bus = 0;
768
769 pd->hdmiphy_info = hdmiphy_info;
770 pd->mhl_info = mhl_info;
771 pd->mhl_bus = mhl_bus;
772
773 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
774 &s5p_device_hdmi);
775 }
776
777 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
778
779 /* I2S */
780
781 #ifdef CONFIG_PLAT_S3C24XX
782 static struct resource s3c_iis_resource[] = {
783 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
784 };
785
786 struct platform_device s3c_device_iis = {
787 .name = "s3c24xx-iis",
788 .id = -1,
789 .num_resources = ARRAY_SIZE(s3c_iis_resource),
790 .resource = s3c_iis_resource,
791 .dev = {
792 .dma_mask = &samsung_device_dma_mask,
793 .coherent_dma_mask = DMA_BIT_MASK(32),
794 }
795 };
796 #endif /* CONFIG_PLAT_S3C24XX */
797
798 /* IDE CFCON */
799
800 #ifdef CONFIG_SAMSUNG_DEV_IDE
801 static struct resource s3c_cfcon_resource[] = {
802 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
803 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
804 };
805
806 struct platform_device s3c_device_cfcon = {
807 .id = 0,
808 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
809 .resource = s3c_cfcon_resource,
810 };
811
812 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
813 {
814 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
815 &s3c_device_cfcon);
816 }
817 #endif /* CONFIG_SAMSUNG_DEV_IDE */
818
819 /* KEYPAD */
820
821 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
822 static struct resource samsung_keypad_resources[] = {
823 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
824 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
825 };
826
827 struct platform_device samsung_device_keypad = {
828 .name = "samsung-keypad",
829 .id = -1,
830 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
831 .resource = samsung_keypad_resources,
832 };
833
834 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
835 {
836 struct samsung_keypad_platdata *npd;
837
838 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
839 &samsung_device_keypad);
840
841 if (!npd->cfg_gpio)
842 npd->cfg_gpio = samsung_keypad_cfg_gpio;
843 }
844 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
845
846 /* LCD Controller */
847
848 #ifdef CONFIG_PLAT_S3C24XX
849 static struct resource s3c_lcd_resource[] = {
850 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
851 [1] = DEFINE_RES_IRQ(IRQ_LCD),
852 };
853
854 struct platform_device s3c_device_lcd = {
855 .name = "s3c2410-lcd",
856 .id = -1,
857 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
858 .resource = s3c_lcd_resource,
859 .dev = {
860 .dma_mask = &samsung_device_dma_mask,
861 .coherent_dma_mask = DMA_BIT_MASK(32),
862 }
863 };
864
865 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
866 {
867 struct s3c2410fb_mach_info *npd;
868
869 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
870 if (npd) {
871 npd->displays = kmemdup(pd->displays,
872 sizeof(struct s3c2410fb_display) * npd->num_displays,
873 GFP_KERNEL);
874 if (!npd->displays)
875 printk(KERN_ERR "no memory for LCD display data\n");
876 } else {
877 printk(KERN_ERR "no memory for LCD platform data\n");
878 }
879 }
880 #endif /* CONFIG_PLAT_S3C24XX */
881
882 /* MFC */
883
884 #ifdef CONFIG_S5P_DEV_MFC
885 static struct resource s5p_mfc_resource[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
887 [1] = DEFINE_RES_IRQ(IRQ_MFC),
888 };
889
890 struct platform_device s5p_device_mfc = {
891 .name = "s5p-mfc",
892 .id = -1,
893 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
894 .resource = s5p_mfc_resource,
895 };
896
897 /*
898 * MFC hardware has 2 memory interfaces which are modelled as two separate
899 * platform devices to let dma-mapping distinguish between them.
900 *
901 * MFC parent device (s5p_device_mfc) must be registered before memory
902 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
903 */
904
905 struct platform_device s5p_device_mfc_l = {
906 .name = "s5p-mfc-l",
907 .id = -1,
908 .dev = {
909 .parent = &s5p_device_mfc.dev,
910 .dma_mask = &samsung_device_dma_mask,
911 .coherent_dma_mask = DMA_BIT_MASK(32),
912 },
913 };
914
915 struct platform_device s5p_device_mfc_r = {
916 .name = "s5p-mfc-r",
917 .id = -1,
918 .dev = {
919 .parent = &s5p_device_mfc.dev,
920 .dma_mask = &samsung_device_dma_mask,
921 .coherent_dma_mask = DMA_BIT_MASK(32),
922 },
923 };
924
925 #endif /* CONFIG_S5P_DEV_MFC */
926
927 /* MIPI CSIS */
928
929 #ifdef CONFIG_S5P_DEV_CSIS0
930 static struct resource s5p_mipi_csis0_resource[] = {
931 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
932 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
933 };
934
935 struct platform_device s5p_device_mipi_csis0 = {
936 .name = "s5p-mipi-csis",
937 .id = 0,
938 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
939 .resource = s5p_mipi_csis0_resource,
940 };
941 #endif /* CONFIG_S5P_DEV_CSIS0 */
942
943 #ifdef CONFIG_S5P_DEV_CSIS1
944 static struct resource s5p_mipi_csis1_resource[] = {
945 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
946 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
947 };
948
949 struct platform_device s5p_device_mipi_csis1 = {
950 .name = "s5p-mipi-csis",
951 .id = 1,
952 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
953 .resource = s5p_mipi_csis1_resource,
954 };
955 #endif
956
957 /* NAND */
958
959 #ifdef CONFIG_S3C_DEV_NAND
960 static struct resource s3c_nand_resource[] = {
961 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
962 };
963
964 struct platform_device s3c_device_nand = {
965 .name = "s3c2410-nand",
966 .id = -1,
967 .num_resources = ARRAY_SIZE(s3c_nand_resource),
968 .resource = s3c_nand_resource,
969 };
970
971 /*
972 * s3c_nand_copy_set() - copy nand set data
973 * @set: The new structure, directly copied from the old.
974 *
975 * Copy all the fields from the NAND set field from what is probably __initdata
976 * to new kernel memory. The code returns 0 if the copy happened correctly or
977 * an error code for the calling function to display.
978 *
979 * Note, we currently do not try and look to see if we've already copied the
980 * data in a previous set.
981 */
982 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
983 {
984 void *ptr;
985 int size;
986
987 size = sizeof(struct mtd_partition) * set->nr_partitions;
988 if (size) {
989 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
990 set->partitions = ptr;
991
992 if (!ptr)
993 return -ENOMEM;
994 }
995
996 if (set->nr_map && set->nr_chips) {
997 size = sizeof(int) * set->nr_chips;
998 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
999 set->nr_map = ptr;
1000
1001 if (!ptr)
1002 return -ENOMEM;
1003 }
1004
1005 if (set->ecc_layout) {
1006 ptr = kmemdup(set->ecc_layout,
1007 sizeof(struct nand_ecclayout), GFP_KERNEL);
1008 set->ecc_layout = ptr;
1009
1010 if (!ptr)
1011 return -ENOMEM;
1012 }
1013
1014 return 0;
1015 }
1016
1017 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1018 {
1019 struct s3c2410_platform_nand *npd;
1020 int size;
1021 int ret;
1022
1023 /* note, if we get a failure in allocation, we simply drop out of the
1024 * function. If there is so little memory available at initialisation
1025 * time then there is little chance the system is going to run.
1026 */
1027
1028 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1029 &s3c_device_nand);
1030 if (!npd)
1031 return;
1032
1033 /* now see if we need to copy any of the nand set data */
1034
1035 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1036 if (size) {
1037 struct s3c2410_nand_set *from = npd->sets;
1038 struct s3c2410_nand_set *to;
1039 int i;
1040
1041 to = kmemdup(from, size, GFP_KERNEL);
1042 npd->sets = to; /* set, even if we failed */
1043
1044 if (!to) {
1045 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1046 return;
1047 }
1048
1049 for (i = 0; i < npd->nr_sets; i++) {
1050 ret = s3c_nand_copy_set(to);
1051 if (ret) {
1052 printk(KERN_ERR "%s: failed to copy set %d\n",
1053 __func__, i);
1054 return;
1055 }
1056 to++;
1057 }
1058 }
1059 }
1060 #endif /* CONFIG_S3C_DEV_NAND */
1061
1062 /* ONENAND */
1063
1064 #ifdef CONFIG_S3C_DEV_ONENAND
1065 static struct resource s3c_onenand_resources[] = {
1066 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1067 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1068 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1069 };
1070
1071 struct platform_device s3c_device_onenand = {
1072 .name = "samsung-onenand",
1073 .id = 0,
1074 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1075 .resource = s3c_onenand_resources,
1076 };
1077 #endif /* CONFIG_S3C_DEV_ONENAND */
1078
1079 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1080 static struct resource s3c64xx_onenand1_resources[] = {
1081 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1082 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1083 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1084 };
1085
1086 struct platform_device s3c64xx_device_onenand1 = {
1087 .name = "samsung-onenand",
1088 .id = 1,
1089 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1090 .resource = s3c64xx_onenand1_resources,
1091 };
1092
1093 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1094 {
1095 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1096 &s3c64xx_device_onenand1);
1097 }
1098 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1099
1100 #ifdef CONFIG_S5P_DEV_ONENAND
1101 static struct resource s5p_onenand_resources[] = {
1102 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1103 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1104 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1105 };
1106
1107 struct platform_device s5p_device_onenand = {
1108 .name = "s5pc110-onenand",
1109 .id = -1,
1110 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1111 .resource = s5p_onenand_resources,
1112 };
1113 #endif /* CONFIG_S5P_DEV_ONENAND */
1114
1115 /* PMU */
1116
1117 #ifdef CONFIG_PLAT_S5P
1118 static struct resource s5p_pmu_resource[] = {
1119 DEFINE_RES_IRQ(IRQ_PMU)
1120 };
1121
1122 static struct platform_device s5p_device_pmu = {
1123 .name = "arm-pmu",
1124 .id = -1,
1125 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1126 .resource = s5p_pmu_resource,
1127 };
1128
1129 static int __init s5p_pmu_init(void)
1130 {
1131 platform_device_register(&s5p_device_pmu);
1132 return 0;
1133 }
1134 arch_initcall(s5p_pmu_init);
1135 #endif /* CONFIG_PLAT_S5P */
1136
1137 /* PWM Timer */
1138
1139 #ifdef CONFIG_SAMSUNG_DEV_PWM
1140
1141 #define TIMER_RESOURCE_SIZE (1)
1142
1143 #define TIMER_RESOURCE(_tmr, _irq) \
1144 (struct resource [TIMER_RESOURCE_SIZE]) { \
1145 [0] = { \
1146 .start = _irq, \
1147 .end = _irq, \
1148 .flags = IORESOURCE_IRQ \
1149 } \
1150 }
1151
1152 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1153 .name = "s3c24xx-pwm", \
1154 .id = _tmr_no, \
1155 .num_resources = TIMER_RESOURCE_SIZE, \
1156 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1157
1158 /*
1159 * since we already have an static mapping for the timer,
1160 * we do not bother setting any IO resource for the base.
1161 */
1162
1163 struct platform_device s3c_device_timer[] = {
1164 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1165 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1166 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1167 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1168 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1169 };
1170 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1171
1172 /* RTC */
1173
1174 #ifdef CONFIG_PLAT_S3C24XX
1175 static struct resource s3c_rtc_resource[] = {
1176 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1177 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1178 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1179 };
1180
1181 struct platform_device s3c_device_rtc = {
1182 .name = "s3c2410-rtc",
1183 .id = -1,
1184 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1185 .resource = s3c_rtc_resource,
1186 };
1187 #endif /* CONFIG_PLAT_S3C24XX */
1188
1189 #ifdef CONFIG_S3C_DEV_RTC
1190 static struct resource s3c_rtc_resource[] = {
1191 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1192 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1193 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1194 };
1195
1196 struct platform_device s3c_device_rtc = {
1197 .name = "s3c64xx-rtc",
1198 .id = -1,
1199 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1200 .resource = s3c_rtc_resource,
1201 };
1202 #endif /* CONFIG_S3C_DEV_RTC */
1203
1204 /* SDI */
1205
1206 #ifdef CONFIG_PLAT_S3C24XX
1207 static struct resource s3c_sdi_resource[] = {
1208 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1209 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1210 };
1211
1212 struct platform_device s3c_device_sdi = {
1213 .name = "s3c2410-sdi",
1214 .id = -1,
1215 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1216 .resource = s3c_sdi_resource,
1217 };
1218
1219 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1220 {
1221 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1222 &s3c_device_sdi);
1223 }
1224 #endif /* CONFIG_PLAT_S3C24XX */
1225
1226 /* SPI */
1227
1228 #ifdef CONFIG_PLAT_S3C24XX
1229 static struct resource s3c_spi0_resource[] = {
1230 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1231 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1232 };
1233
1234 struct platform_device s3c_device_spi0 = {
1235 .name = "s3c2410-spi",
1236 .id = 0,
1237 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1238 .resource = s3c_spi0_resource,
1239 .dev = {
1240 .dma_mask = &samsung_device_dma_mask,
1241 .coherent_dma_mask = DMA_BIT_MASK(32),
1242 }
1243 };
1244
1245 static struct resource s3c_spi1_resource[] = {
1246 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1247 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1248 };
1249
1250 struct platform_device s3c_device_spi1 = {
1251 .name = "s3c2410-spi",
1252 .id = 1,
1253 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1254 .resource = s3c_spi1_resource,
1255 .dev = {
1256 .dma_mask = &samsung_device_dma_mask,
1257 .coherent_dma_mask = DMA_BIT_MASK(32),
1258 }
1259 };
1260 #endif /* CONFIG_PLAT_S3C24XX */
1261
1262 /* Touchscreen */
1263
1264 #ifdef CONFIG_PLAT_S3C24XX
1265 static struct resource s3c_ts_resource[] = {
1266 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1267 [1] = DEFINE_RES_IRQ(IRQ_TC),
1268 };
1269
1270 struct platform_device s3c_device_ts = {
1271 .name = "s3c2410-ts",
1272 .id = -1,
1273 .dev.parent = &s3c_device_adc.dev,
1274 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1275 .resource = s3c_ts_resource,
1276 };
1277
1278 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1279 {
1280 s3c_set_platdata(hard_s3c2410ts_info,
1281 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1282 }
1283 #endif /* CONFIG_PLAT_S3C24XX */
1284
1285 #ifdef CONFIG_SAMSUNG_DEV_TS
1286 static struct resource s3c_ts_resource[] = {
1287 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1288 [1] = DEFINE_RES_IRQ(IRQ_TC),
1289 };
1290
1291 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1292 .delay = 10000,
1293 .presc = 49,
1294 .oversampling_shift = 2,
1295 };
1296
1297 struct platform_device s3c_device_ts = {
1298 .name = "s3c64xx-ts",
1299 .id = -1,
1300 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1301 .resource = s3c_ts_resource,
1302 };
1303
1304 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1305 {
1306 if (!pd)
1307 pd = &default_ts_data;
1308
1309 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1310 &s3c_device_ts);
1311 }
1312 #endif /* CONFIG_SAMSUNG_DEV_TS */
1313
1314 /* TV */
1315
1316 #ifdef CONFIG_S5P_DEV_TV
1317
1318 static struct resource s5p_hdmi_resources[] = {
1319 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1320 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1321 };
1322
1323 struct platform_device s5p_device_hdmi = {
1324 .name = "s5p-hdmi",
1325 .id = -1,
1326 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1327 .resource = s5p_hdmi_resources,
1328 };
1329
1330 static struct resource s5p_sdo_resources[] = {
1331 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1332 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1333 };
1334
1335 struct platform_device s5p_device_sdo = {
1336 .name = "s5p-sdo",
1337 .id = -1,
1338 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1339 .resource = s5p_sdo_resources,
1340 };
1341
1342 static struct resource s5p_mixer_resources[] = {
1343 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1344 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1345 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1346 };
1347
1348 struct platform_device s5p_device_mixer = {
1349 .name = "s5p-mixer",
1350 .id = -1,
1351 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1352 .resource = s5p_mixer_resources,
1353 .dev = {
1354 .dma_mask = &samsung_device_dma_mask,
1355 .coherent_dma_mask = DMA_BIT_MASK(32),
1356 }
1357 };
1358 #endif /* CONFIG_S5P_DEV_TV */
1359
1360 /* USB */
1361
1362 #ifdef CONFIG_S3C_DEV_USB_HOST
1363 static struct resource s3c_usb_resource[] = {
1364 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1365 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1366 };
1367
1368 struct platform_device s3c_device_ohci = {
1369 .name = "s3c2410-ohci",
1370 .id = -1,
1371 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1372 .resource = s3c_usb_resource,
1373 .dev = {
1374 .dma_mask = &samsung_device_dma_mask,
1375 .coherent_dma_mask = DMA_BIT_MASK(32),
1376 }
1377 };
1378
1379 /*
1380 * s3c_ohci_set_platdata - initialise OHCI device platform data
1381 * @info: The platform data.
1382 *
1383 * This call copies the @info passed in and sets the device .platform_data
1384 * field to that copy. The @info is copied so that the original can be marked
1385 * __initdata.
1386 */
1387
1388 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1389 {
1390 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1391 &s3c_device_ohci);
1392 }
1393 #endif /* CONFIG_S3C_DEV_USB_HOST */
1394
1395 /* USB Device (Gadget) */
1396
1397 #ifdef CONFIG_PLAT_S3C24XX
1398 static struct resource s3c_usbgadget_resource[] = {
1399 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1400 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1401 };
1402
1403 struct platform_device s3c_device_usbgadget = {
1404 .name = "s3c2410-usbgadget",
1405 .id = -1,
1406 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1407 .resource = s3c_usbgadget_resource,
1408 };
1409
1410 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1411 {
1412 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1413 }
1414 #endif /* CONFIG_PLAT_S3C24XX */
1415
1416 /* USB EHCI Host Controller */
1417
1418 #ifdef CONFIG_S5P_DEV_USB_EHCI
1419 static struct resource s5p_ehci_resource[] = {
1420 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1421 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1422 };
1423
1424 struct platform_device s5p_device_ehci = {
1425 .name = "s5p-ehci",
1426 .id = -1,
1427 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1428 .resource = s5p_ehci_resource,
1429 .dev = {
1430 .dma_mask = &samsung_device_dma_mask,
1431 .coherent_dma_mask = DMA_BIT_MASK(32),
1432 }
1433 };
1434
1435 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1436 {
1437 struct s5p_ehci_platdata *npd;
1438
1439 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1440 &s5p_device_ehci);
1441
1442 if (!npd->phy_init)
1443 npd->phy_init = s5p_usb_phy_init;
1444 if (!npd->phy_exit)
1445 npd->phy_exit = s5p_usb_phy_exit;
1446 }
1447 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1448
1449 /* USB HSOTG */
1450
1451 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1452 static struct resource s3c_usb_hsotg_resources[] = {
1453 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1454 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1455 };
1456
1457 struct platform_device s3c_device_usb_hsotg = {
1458 .name = "s3c-hsotg",
1459 .id = -1,
1460 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1461 .resource = s3c_usb_hsotg_resources,
1462 .dev = {
1463 .dma_mask = &samsung_device_dma_mask,
1464 .coherent_dma_mask = DMA_BIT_MASK(32),
1465 },
1466 };
1467
1468 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1469 {
1470 struct s3c_hsotg_plat *npd;
1471
1472 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1473 &s3c_device_usb_hsotg);
1474
1475 if (!npd->phy_init)
1476 npd->phy_init = s5p_usb_phy_init;
1477 if (!npd->phy_exit)
1478 npd->phy_exit = s5p_usb_phy_exit;
1479 }
1480 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1481
1482 /* USB High Spped 2.0 Device (Gadget) */
1483
1484 #ifdef CONFIG_PLAT_S3C24XX
1485 static struct resource s3c_hsudc_resource[] = {
1486 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1487 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1488 };
1489
1490 struct platform_device s3c_device_usb_hsudc = {
1491 .name = "s3c-hsudc",
1492 .id = -1,
1493 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1494 .resource = s3c_hsudc_resource,
1495 .dev = {
1496 .dma_mask = &samsung_device_dma_mask,
1497 .coherent_dma_mask = DMA_BIT_MASK(32),
1498 },
1499 };
1500
1501 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1502 {
1503 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1504 }
1505 #endif /* CONFIG_PLAT_S3C24XX */
1506
1507 /* WDT */
1508
1509 #ifdef CONFIG_S3C_DEV_WDT
1510 static struct resource s3c_wdt_resource[] = {
1511 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1512 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1513 };
1514
1515 struct platform_device s3c_device_wdt = {
1516 .name = "s3c2410-wdt",
1517 .id = -1,
1518 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1519 .resource = s3c_wdt_resource,
1520 };
1521 #endif /* CONFIG_S3C_DEV_WDT */
1522
1523 #ifdef CONFIG_S3C64XX_DEV_SPI0
1524 static struct resource s3c64xx_spi0_resource[] = {
1525 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1526 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1527 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1528 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1529 };
1530
1531 struct platform_device s3c64xx_device_spi0 = {
1532 .name = "s3c6410-spi",
1533 .id = 0,
1534 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1535 .resource = s3c64xx_spi0_resource,
1536 .dev = {
1537 .dma_mask = &samsung_device_dma_mask,
1538 .coherent_dma_mask = DMA_BIT_MASK(32),
1539 },
1540 };
1541
1542 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1543 int num_cs)
1544 {
1545 struct s3c64xx_spi_info pd;
1546
1547 /* Reject invalid configuration */
1548 if (!num_cs || src_clk_nr < 0) {
1549 pr_err("%s: Invalid SPI configuration\n", __func__);
1550 return;
1551 }
1552
1553 pd.num_cs = num_cs;
1554 pd.src_clk_nr = src_clk_nr;
1555 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1556 #ifdef CONFIG_PL330_DMA
1557 pd.filter = pl330_filter;
1558 #endif
1559
1560 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1561 }
1562 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1563
1564 #ifdef CONFIG_S3C64XX_DEV_SPI1
1565 static struct resource s3c64xx_spi1_resource[] = {
1566 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1567 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1568 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1569 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1570 };
1571
1572 struct platform_device s3c64xx_device_spi1 = {
1573 .name = "s3c6410-spi",
1574 .id = 1,
1575 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1576 .resource = s3c64xx_spi1_resource,
1577 .dev = {
1578 .dma_mask = &samsung_device_dma_mask,
1579 .coherent_dma_mask = DMA_BIT_MASK(32),
1580 },
1581 };
1582
1583 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1584 int num_cs)
1585 {
1586 struct s3c64xx_spi_info pd;
1587
1588 /* Reject invalid configuration */
1589 if (!num_cs || src_clk_nr < 0) {
1590 pr_err("%s: Invalid SPI configuration\n", __func__);
1591 return;
1592 }
1593
1594 pd.num_cs = num_cs;
1595 pd.src_clk_nr = src_clk_nr;
1596 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1597 #ifdef CONFIG_PL330_DMA
1598 pd.filter = pl330_filter;
1599 #endif
1600
1601 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1602 }
1603 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1604
1605 #ifdef CONFIG_S3C64XX_DEV_SPI2
1606 static struct resource s3c64xx_spi2_resource[] = {
1607 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1608 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1609 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1610 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1611 };
1612
1613 struct platform_device s3c64xx_device_spi2 = {
1614 .name = "s3c6410-spi",
1615 .id = 2,
1616 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1617 .resource = s3c64xx_spi2_resource,
1618 .dev = {
1619 .dma_mask = &samsung_device_dma_mask,
1620 .coherent_dma_mask = DMA_BIT_MASK(32),
1621 },
1622 };
1623
1624 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1625 int num_cs)
1626 {
1627 struct s3c64xx_spi_info pd;
1628
1629 /* Reject invalid configuration */
1630 if (!num_cs || src_clk_nr < 0) {
1631 pr_err("%s: Invalid SPI configuration\n", __func__);
1632 return;
1633 }
1634
1635 pd.num_cs = num_cs;
1636 pd.src_clk_nr = src_clk_nr;
1637 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1638 #ifdef CONFIG_PL330_DMA
1639 pd.filter = pl330_filter;
1640 #endif
1641
1642 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1643 }
1644 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
kernel source for telekom puls (alcatel/mediatek)