2 * CPU idle driver for Tegra CPUs
4 * Copyright (c) 2010-2012, NVIDIA Corporation.
5 * Copyright (c) 2011 Google, Inc.
6 * Author: Colin Cross <ccross@android.com>
7 * Gary King <gking@nvidia.com>
9 * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/cpuidle.h>
25 #include <linux/cpu_pm.h>
26 #include <linux/clockchips.h>
27 #include <linux/clk/tegra.h>
29 #include <asm/cpuidle.h>
30 #include <asm/proc-fns.h>
31 #include <asm/suspend.h>
32 #include <asm/smp_plat.h>
40 #ifdef CONFIG_PM_SLEEP
41 static bool abort_flag
;
42 static atomic_t abort_barrier
;
43 static int tegra20_idle_lp2_coupled(struct cpuidle_device
*dev
,
44 struct cpuidle_driver
*drv
,
46 #define TEGRA20_MAX_STATES 2
48 #define TEGRA20_MAX_STATES 1
51 static struct cpuidle_driver tegra_idle_driver
= {
55 ARM_CPUIDLE_WFI_STATE_PWR(600),
56 #ifdef CONFIG_PM_SLEEP
58 .enter
= tegra20_idle_lp2_coupled
,
60 .target_residency
= 10000,
62 .flags
= CPUIDLE_FLAG_TIME_VALID
|
64 .name
= "powered-down",
65 .desc
= "CPU power gated",
69 .state_count
= TEGRA20_MAX_STATES
,
70 .safe_state_index
= 0,
73 #ifdef CONFIG_PM_SLEEP
75 static void __iomem
*pmc
= IO_ADDRESS(TEGRA_PMC_BASE
);
77 static int tegra20_reset_sleeping_cpu_1(void)
83 if (readl(pmc
+ PMC_SCRATCH41
) == CPU_RESETTABLE
)
84 tegra20_cpu_shutdown(1);
93 static void tegra20_wake_cpu1_from_reset(void)
97 tegra20_cpu_clear_resettable();
99 /* enable cpu clock on cpu */
100 tegra_enable_cpu_clock(1);
102 /* take the CPU out of reset */
103 tegra_cpu_out_of_reset(1);
106 flowctrl_write_cpu_halt(1, 0);
111 static int tegra20_reset_cpu_1(void)
113 if (!cpu_online(1) || !tegra20_reset_sleeping_cpu_1())
116 tegra20_wake_cpu1_from_reset();
120 static inline void tegra20_wake_cpu1_from_reset(void)
124 static inline int tegra20_reset_cpu_1(void)
130 static bool tegra20_cpu_cluster_power_down(struct cpuidle_device
*dev
,
131 struct cpuidle_driver
*drv
,
134 struct cpuidle_state
*state
= &drv
->states
[index
];
135 u32 cpu_on_time
= state
->exit_latency
;
136 u32 cpu_off_time
= state
->target_residency
- state
->exit_latency
;
138 while (tegra20_cpu_is_resettable_soon())
141 if (tegra20_reset_cpu_1() || !tegra_cpu_rail_off_ready())
144 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER
, &dev
->cpu
);
146 tegra_idle_lp2_last(cpu_on_time
, cpu_off_time
);
148 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT
, &dev
->cpu
);
151 tegra20_wake_cpu1_from_reset();
157 static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device
*dev
,
158 struct cpuidle_driver
*drv
,
161 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER
, &dev
->cpu
);
163 cpu_suspend(0, tegra20_sleep_cpu_secondary_finish
);
165 tegra20_cpu_clear_resettable();
167 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT
, &dev
->cpu
);
172 static inline bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device
*dev
,
173 struct cpuidle_driver
*drv
,
180 static int tegra20_idle_lp2_coupled(struct cpuidle_device
*dev
,
181 struct cpuidle_driver
*drv
,
184 u32 cpu
= is_smp() ? cpu_logical_map(dev
->cpu
) : dev
->cpu
;
185 bool entered_lp2
= false;
187 if (tegra_pending_sgi())
188 ACCESS_ONCE(abort_flag
) = true;
190 cpuidle_coupled_parallel_barrier(dev
, &abort_barrier
);
193 cpuidle_coupled_parallel_barrier(dev
, &abort_barrier
);
194 abort_flag
= false; /* clean flag for next coming */
200 tegra_set_cpu_in_lp2(cpu
);
204 entered_lp2
= tegra20_cpu_cluster_power_down(dev
, drv
, index
);
206 entered_lp2
= tegra20_idle_enter_lp2_cpu_1(dev
, drv
, index
);
209 tegra_clear_cpu_in_lp2(cpu
);
215 return entered_lp2
? index
: 0;
219 int __init
tegra20_cpuidle_init(void)
221 #ifdef CONFIG_PM_SLEEP
222 tegra_tear_down_cpu
= tegra20_tear_down_cpu
;
224 return cpuidle_register(&tegra_idle_driver
, cpu_possible_mask
);