arch/arm/mach-shmobile/setup-sh7377.c

   1 /*
   2  * sh7377 processor support
   3  *
   4  * Copyright (C) 2010  Magnus Damm
   5  * Copyright (C) 2008  Yoshihiro Shimoda
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/irq.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/input.h>
  27 #include <linux/io.h>
  28 #include <linux/serial_sci.h>
  29 #include <linux/sh_intc.h>
  30 #include <linux/sh_timer.h>
  31 #include <mach/hardware.h>
  32 #include <asm/mach-types.h>
  33 #include <asm/mach/arch.h>
  34
  35 /* SCIFA0 */
  36 static struct plat_sci_port scif0_platform_data = {
  37         .mapbase        = 0xe6c40000,
  38         .flags          = UPF_BOOT_AUTOCONF,
  39         .scscr          = SCSCR_RE | SCSCR_TE,
  40         .scbrr_algo_id  = SCBRR_ALGO_4,
  41         .type           = PORT_SCIF,
  42         .irqs           = { evt2irq(0xc00), evt2irq(0xc00),
  43                             evt2irq(0xc00), evt2irq(0xc00) },
  44 };
  45
  46 static struct platform_device scif0_device = {
  47         .name           = "sh-sci",
  48         .id             = 0,
  49         .dev            = {
  50                 .platform_data  = &scif0_platform_data,
  51         },
  52 };
  53
  54 /* SCIFA1 */
  55 static struct plat_sci_port scif1_platform_data = {
  56         .mapbase        = 0xe6c50000,
  57         .flags          = UPF_BOOT_AUTOCONF,
  58         .scscr          = SCSCR_RE | SCSCR_TE,
  59         .scbrr_algo_id  = SCBRR_ALGO_4,
  60         .type           = PORT_SCIF,
  61         .irqs           = { evt2irq(0xc20), evt2irq(0xc20),
  62                             evt2irq(0xc20), evt2irq(0xc20) },
  63 };
  64
  65 static struct platform_device scif1_device = {
  66         .name           = "sh-sci",
  67         .id             = 1,
  68         .dev            = {
  69                 .platform_data  = &scif1_platform_data,
  70         },
  71 };
  72
  73 /* SCIFA2 */
  74 static struct plat_sci_port scif2_platform_data = {
  75         .mapbase        = 0xe6c60000,
  76         .flags          = UPF_BOOT_AUTOCONF,
  77         .scscr          = SCSCR_RE | SCSCR_TE,
  78         .scbrr_algo_id  = SCBRR_ALGO_4,
  79         .type           = PORT_SCIF,
  80         .irqs           = { evt2irq(0xc40), evt2irq(0xc40),
  81                             evt2irq(0xc40), evt2irq(0xc40) },
  82 };
  83
  84 static struct platform_device scif2_device = {
  85         .name           = "sh-sci",
  86         .id             = 2,
  87         .dev            = {
  88                 .platform_data  = &scif2_platform_data,
  89         },
  90 };
  91
  92 /* SCIFA3 */
  93 static struct plat_sci_port scif3_platform_data = {
  94         .mapbase        = 0xe6c70000,
  95         .flags          = UPF_BOOT_AUTOCONF,
  96         .scscr          = SCSCR_RE | SCSCR_TE,
  97         .scbrr_algo_id  = SCBRR_ALGO_4,
  98         .type           = PORT_SCIF,
  99         .irqs           = { evt2irq(0xc60), evt2irq(0xc60),
 100                             evt2irq(0xc60), evt2irq(0xc60) },
 101 };
 102
 103 static struct platform_device scif3_device = {
 104         .name           = "sh-sci",
 105         .id             = 3,
 106         .dev            = {
 107                 .platform_data  = &scif3_platform_data,
 108         },
 109 };
 110
 111 /* SCIFA4 */
 112 static struct plat_sci_port scif4_platform_data = {
 113         .mapbase        = 0xe6c80000,
 114         .flags          = UPF_BOOT_AUTOCONF,
 115         .scscr          = SCSCR_RE | SCSCR_TE,
 116         .scbrr_algo_id  = SCBRR_ALGO_4,
 117         .type           = PORT_SCIF,
 118         .irqs           = { evt2irq(0xd20), evt2irq(0xd20),
 119                             evt2irq(0xd20), evt2irq(0xd20) },
 120 };
 121
 122 static struct platform_device scif4_device = {
 123         .name           = "sh-sci",
 124         .id             = 4,
 125         .dev            = {
 126                 .platform_data  = &scif4_platform_data,
 127         },
 128 };
 129
 130 /* SCIFA5 */
 131 static struct plat_sci_port scif5_platform_data = {
 132         .mapbase        = 0xe6cb0000,
 133         .flags          = UPF_BOOT_AUTOCONF,
 134         .scscr          = SCSCR_RE | SCSCR_TE,
 135         .scbrr_algo_id  = SCBRR_ALGO_4,
 136         .type           = PORT_SCIF,
 137         .irqs           = { evt2irq(0xd40), evt2irq(0xd40),
 138                             evt2irq(0xd40), evt2irq(0xd40) },
 139 };
 140
 141 static struct platform_device scif5_device = {
 142         .name           = "sh-sci",
 143         .id             = 5,
 144         .dev            = {
 145                 .platform_data  = &scif5_platform_data,
 146         },
 147 };
 148
 149 /* SCIFA6 */
 150 static struct plat_sci_port scif6_platform_data = {
 151         .mapbase        = 0xe6cc0000,
 152         .flags          = UPF_BOOT_AUTOCONF,
 153         .scscr          = SCSCR_RE | SCSCR_TE,
 154         .scbrr_algo_id  = SCBRR_ALGO_4,
 155         .type           = PORT_SCIF,
 156         .irqs           = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80),
 157                             intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) },
 158 };
 159
 160 static struct platform_device scif6_device = {
 161         .name           = "sh-sci",
 162         .id             = 6,
 163         .dev            = {
 164                 .platform_data  = &scif6_platform_data,
 165         },
 166 };
 167
 168 /* SCIFB */
 169 static struct plat_sci_port scif7_platform_data = {
 170         .mapbase        = 0xe6c30000,
 171         .flags          = UPF_BOOT_AUTOCONF,
 172         .scscr          = SCSCR_RE | SCSCR_TE,
 173         .scbrr_algo_id  = SCBRR_ALGO_4,
 174         .type           = PORT_SCIF,
 175         .irqs           = { evt2irq(0xd60), evt2irq(0xd60),
 176                             evt2irq(0xd60), evt2irq(0xd60) },
 177 };
 178
 179 static struct platform_device scif7_device = {
 180         .name           = "sh-sci",
 181         .id             = 7,
 182         .dev            = {
 183                 .platform_data  = &scif7_platform_data,
 184         },
 185 };
 186
 187 static struct sh_timer_config cmt10_platform_data = {
 188         .name = "CMT10",
 189         .channel_offset = 0x10,
 190         .timer_bit = 0,
 191         .clockevent_rating = 125,
 192         .clocksource_rating = 125,
 193 };
 194
 195 static struct resource cmt10_resources[] = {
 196         [0] = {
 197                 .name   = "CMT10",
 198                 .start  = 0xe6138010,
 199                 .end    = 0xe613801b,
 200                 .flags  = IORESOURCE_MEM,
 201         },
 202         [1] = {
 203                 .start  = evt2irq(0xb00), /* CMT1_CMT10 */
 204                 .flags  = IORESOURCE_IRQ,
 205         },
 206 };
 207
 208 static struct platform_device cmt10_device = {
 209         .name           = "sh_cmt",
 210         .id             = 10,
 211         .dev = {
 212                 .platform_data  = &cmt10_platform_data,
 213         },
 214         .resource       = cmt10_resources,
 215         .num_resources  = ARRAY_SIZE(cmt10_resources),
 216 };
 217
 218 static struct platform_device *sh7377_early_devices[] __initdata = {
 219         &scif0_device,
 220         &scif1_device,
 221         &scif2_device,
 222         &scif3_device,
 223         &scif4_device,
 224         &scif5_device,
 225         &scif6_device,
 226         &scif7_device,
 227         &cmt10_device,
 228 };
 229
 230 void __init sh7377_add_standard_devices(void)
 231 {
 232         platform_add_devices(sh7377_early_devices,
 233                             ARRAY_SIZE(sh7377_early_devices));
 234 }
 235
 236 #define SMSTPCR3 0xe615013c
 237 #define SMSTPCR3_CMT1 (1 << 29)
 238
 239 void __init sh7377_add_early_devices(void)
 240 {
 241         /* enable clock to CMT1 */
 242         __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
 243
 244         early_platform_add_devices(sh7377_early_devices,
 245                                    ARRAY_SIZE(sh7377_early_devices));
 246 }