arch/arm/mach-omap2/timer.c

   1 /*
   2  * linux/arch/arm/mach-omap2/timer.c
   3  *
   4  * OMAP2 GP timer support.
   5  *
   6  * Copyright (C) 2009 Nokia Corporation
   7  *
   8  * Update to use new clocksource/clockevent layers
   9  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  10  * Copyright (C) 2007 MontaVista Software, Inc.
  11  *
  12  * Original driver:
  13  * Copyright (C) 2005 Nokia Corporation
  14  * Author: Paul Mundt <paul.mundt@nokia.com>
  15  *         Juha Yrjölä <juha.yrjola@nokia.com>
  16  * OMAP Dual-mode timer framework support by Timo Teras
  17  *
  18  * Some parts based off of TI's 24xx code:
  19  *
  20  * Copyright (C) 2004-2009 Texas Instruments, Inc.
  21  *
  22  * Roughly modelled after the OMAP1 MPU timer code.
  23  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  24  *
  25  * This file is subject to the terms and conditions of the GNU General Public
  26  * License. See the file "COPYING" in the main directory of this archive
  27  * for more details.
  28  */
  29 #include <linux/init.h>
  30 #include <linux/time.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/err.h>
  33 #include <linux/clk.h>
  34 #include <linux/delay.h>
  35 #include <linux/irq.h>
  36 #include <linux/clocksource.h>
  37 #include <linux/clockchips.h>
  38 #include <linux/slab.h>
  39 #include <linux/of.h>
  40 #include <linux/of_address.h>
  41 #include <linux/of_irq.h>
  42 #include <linux/platform_device.h>
  43 #include <linux/platform_data/dmtimer-omap.h>
  44
  45 #include <asm/mach/time.h>
  46 #include <asm/smp_twd.h>
  47 #include <asm/sched_clock.h>
  48
  49 #include "omap_hwmod.h"
  50 #include "omap_device.h"
  51 #include <plat/counter-32k.h>
  52 #include <plat/dmtimer.h>
  53 #include "omap-pm.h"
  54
  55 #include "soc.h"
  56 #include "common.h"
  57 #include "powerdomain.h"
  58
  59 #define REALTIME_COUNTER_BASE                           0x48243200
  60 #define INCREMENTER_NUMERATOR_OFFSET                    0x10
  61 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET           0x14
  62 #define NUMERATOR_DENUMERATOR_MASK                      0xfffff000
  63
  64 /* Clockevent code */
  65
  66 static struct omap_dm_timer clkev;
  67 static struct clock_event_device clockevent_gpt;
  68
  69 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
  70 {
  71         struct clock_event_device *evt = &clockevent_gpt;
  72
  73         __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
  74
  75         evt->event_handler(evt);
  76         return IRQ_HANDLED;
  77 }
  78
  79 static struct irqaction omap2_gp_timer_irq = {
  80         .name           = "gp_timer",
  81         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  82         .handler        = omap2_gp_timer_interrupt,
  83 };
  84
  85 static int omap2_gp_timer_set_next_event(unsigned long cycles,
  86                                          struct clock_event_device *evt)
  87 {
  88         __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
  89                                    0xffffffff - cycles, OMAP_TIMER_POSTED);
  90
  91         return 0;
  92 }
  93
  94 static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
  95                                     struct clock_event_device *evt)
  96 {
  97         u32 period;
  98
  99         __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
 100
 101         switch (mode) {
 102         case CLOCK_EVT_MODE_PERIODIC:
 103                 period = clkev.rate / HZ;
 104                 period -= 1;
 105                 /* Looks like we need to first set the load value separately */
 106                 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
 107                                       0xffffffff - period, OMAP_TIMER_POSTED);
 108                 __omap_dm_timer_load_start(&clkev,
 109                                         OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
 110                                         0xffffffff - period, OMAP_TIMER_POSTED);
 111                 break;
 112         case CLOCK_EVT_MODE_ONESHOT:
 113                 break;
 114         case CLOCK_EVT_MODE_UNUSED:
 115         case CLOCK_EVT_MODE_SHUTDOWN:
 116         case CLOCK_EVT_MODE_RESUME:
 117                 break;
 118         }
 119 }
 120
 121 static struct clock_event_device clockevent_gpt = {
 122         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 123         .rating         = 300,
 124         .set_next_event = omap2_gp_timer_set_next_event,
 125         .set_mode       = omap2_gp_timer_set_mode,
 126 };
 127
 128 static struct property device_disabled = {
 129         .name = "status",
 130         .length = sizeof("disabled"),
 131         .value = "disabled",
 132 };
 133
 134 static struct of_device_id omap_timer_match[] __initdata = {
 135         { .compatible = "ti,omap2-timer", },
 136         { }
 137 };
 138
 139 /**
 140  * omap_get_timer_dt - get a timer using device-tree
 141  * @match       - device-tree match structure for matching a device type
 142  * @property    - optional timer property to match
 143  *
 144  * Helper function to get a timer during early boot using device-tree for use
 145  * as kernel system timer. Optionally, the property argument can be used to
 146  * select a timer with a specific property. Once a timer is found then mark
 147  * the timer node in device-tree as disabled, to prevent the kernel from
 148  * registering this timer as a platform device and so no one else can use it.
 149  */
 150 static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
 151                                                      const char *property)
 152 {
 153         struct device_node *np;
 154
 155         for_each_matching_node(np, match) {
 156                 if (!of_device_is_available(np))
 157                         continue;
 158
 159                 if (property && !of_get_property(np, property, NULL))
 160                         continue;
 161
 162                 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
 163                                   of_get_property(np, "ti,timer-dsp", NULL) ||
 164                                   of_get_property(np, "ti,timer-pwm", NULL) ||
 165                                   of_get_property(np, "ti,timer-secure", NULL)))
 166                         continue;
 167
 168                 of_add_property(np, &device_disabled);
 169                 return np;
 170         }
 171
 172         return NULL;
 173 }
 174
 175 /**
 176  * omap_dmtimer_init - initialisation function when device tree is used
 177  *
 178  * For secure OMAP3 devices, timers with device type "timer-secure" cannot
 179  * be used by the kernel as they are reserved. Therefore, to prevent the
 180  * kernel registering these devices remove them dynamically from the device
 181  * tree on boot.
 182  */
 183 static void __init omap_dmtimer_init(void)
 184 {
 185         struct device_node *np;
 186
 187         if (!cpu_is_omap34xx())
 188                 return;
 189
 190         /* If we are a secure device, remove any secure timer nodes */
 191         if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
 192                 np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
 193                 if (np)
 194                         of_node_put(np);
 195         }
 196 }
 197
 198 /**
 199  * omap_dm_timer_get_errata - get errata flags for a timer
 200  *
 201  * Get the timer errata flags that are specific to the OMAP device being used.
 202  */
 203 static u32 __init omap_dm_timer_get_errata(void)
 204 {
 205         if (cpu_is_omap24xx())
 206                 return 0;
 207
 208         return OMAP_TIMER_ERRATA_I103_I767;
 209 }
 210
 211 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
 212                                          const char *fck_source,
 213                                          const char *property,
 214                                          const char **timer_name,
 215                                          int posted)
 216 {
 217         char name[10]; /* 10 = sizeof("gptXX_Xck0") */
 218         const char *oh_name;
 219         struct device_node *np;
 220         struct omap_hwmod *oh;
 221         struct resource irq, mem;
 222         struct clk *src;
 223         int r = 0;
 224
 225         if (of_have_populated_dt()) {
 226                 np = omap_get_timer_dt(omap_timer_match, property);
 227                 if (!np)
 228                         return -ENODEV;
 229
 230                 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
 231                 if (!oh_name)
 232                         return -ENODEV;
 233
 234                 timer->irq = irq_of_parse_and_map(np, 0);
 235                 if (!timer->irq)
 236                         return -ENXIO;
 237
 238                 timer->io_base = of_iomap(np, 0);
 239
 240                 of_node_put(np);
 241         } else {
 242                 if (omap_dm_timer_reserve_systimer(timer->id))
 243                         return -ENODEV;
 244
 245                 sprintf(name, "timer%d", timer->id);
 246                 oh_name = name;
 247         }
 248
 249         oh = omap_hwmod_lookup(oh_name);
 250         if (!oh)
 251                 return -ENODEV;
 252
 253         *timer_name = oh->name;
 254
 255         if (!of_have_populated_dt()) {
 256                 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
 257                                                    &irq);
 258                 if (r)
 259                         return -ENXIO;
 260                 timer->irq = irq.start;
 261
 262                 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
 263                                                    &mem);
 264                 if (r)
 265                         return -ENXIO;
 266
 267                 /* Static mapping, never released */
 268                 timer->io_base = ioremap(mem.start, mem.end - mem.start);
 269         }
 270
 271         if (!timer->io_base)
 272                 return -ENXIO;
 273
 274         /* After the dmtimer is using hwmod these clocks won't be needed */
 275         timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
 276         if (IS_ERR(timer->fclk))
 277                 return PTR_ERR(timer->fclk);
 278
 279         src = clk_get(NULL, fck_source);
 280         if (IS_ERR(src))
 281                 return PTR_ERR(src);
 282
 283         if (clk_get_parent(timer->fclk) != src) {
 284                 r = clk_set_parent(timer->fclk, src);
 285                 if (r < 0) {
 286                         pr_warn("%s: %s cannot set source\n", __func__,
 287                                 oh->name);
 288                         clk_put(src);
 289                         return r;
 290                 }
 291         }
 292
 293         clk_put(src);
 294
 295         omap_hwmod_setup_one(oh_name);
 296         omap_hwmod_enable(oh);
 297         __omap_dm_timer_init_regs(timer);
 298
 299         if (posted)
 300                 __omap_dm_timer_enable_posted(timer);
 301
 302         /* Check that the intended posted configuration matches the actual */
 303         if (posted != timer->posted)
 304                 return -EINVAL;
 305
 306         timer->rate = clk_get_rate(timer->fclk);
 307         timer->reserved = 1;
 308
 309         return r;
 310 }
 311
 312 static void __init omap2_gp_clockevent_init(int gptimer_id,
 313                                                 const char *fck_source,
 314                                                 const char *property)
 315 {
 316         int res;
 317
 318         clkev.id = gptimer_id;
 319         clkev.errata = omap_dm_timer_get_errata();
 320
 321         /*
 322          * For clock-event timers we never read the timer counter and
 323          * so we are not impacted by errata i103 and i767. Therefore,
 324          * we can safely ignore this errata for clock-event timers.
 325          */
 326         __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
 327
 328         res = omap_dm_timer_init_one(&clkev, fck_source, property,
 329                                      &clockevent_gpt.name, OMAP_TIMER_POSTED);
 330         BUG_ON(res);
 331
 332         omap2_gp_timer_irq.dev_id = &clkev;
 333         setup_irq(clkev.irq, &omap2_gp_timer_irq);
 334
 335         __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 336
 337         clockevent_gpt.cpumask = cpu_possible_mask;
 338         clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
 339         clockevents_config_and_register(&clockevent_gpt, clkev.rate,
 340                                         3, /* Timer internal resynch latency */
 341                                         0xffffffff);
 342
 343         pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
 344                 clkev.rate);
 345 }
 346
 347 /* Clocksource code */
 348 static struct omap_dm_timer clksrc;
 349 static bool use_gptimer_clksrc;
 350
 351 /*
 352  * clocksource
 353  */
 354 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 355 {
 356         return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
 357                                                      OMAP_TIMER_NONPOSTED);
 358 }
 359
 360 static struct clocksource clocksource_gpt = {
 361         .rating         = 300,
 362         .read           = clocksource_read_cycles,
 363         .mask           = CLOCKSOURCE_MASK(32),
 364         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 365 };
 366
 367 static u32 notrace dmtimer_read_sched_clock(void)
 368 {
 369         if (clksrc.reserved)
 370                 return __omap_dm_timer_read_counter(&clksrc,
 371                                                     OMAP_TIMER_NONPOSTED);
 372
 373         return 0;
 374 }
 375
 376 static struct of_device_id omap_counter_match[] __initdata = {
 377         { .compatible = "ti,omap-counter32k", },
 378         { }
 379 };
 380
 381 /* Setup free-running counter for clocksource */
 382 static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 383 {
 384         int ret;
 385         struct device_node *np = NULL;
 386         struct omap_hwmod *oh;
 387         void __iomem *vbase;
 388         const char *oh_name = "counter_32k";
 389
 390         /*
 391          * If device-tree is present, then search the DT blob
 392          * to see if the 32kHz counter is supported.
 393          */
 394         if (of_have_populated_dt()) {
 395                 np = omap_get_timer_dt(omap_counter_match, NULL);
 396                 if (!np)
 397                         return -ENODEV;
 398
 399                 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
 400                 if (!oh_name)
 401                         return -ENODEV;
 402         }
 403
 404         /*
 405          * First check hwmod data is available for sync32k counter
 406          */
 407         oh = omap_hwmod_lookup(oh_name);
 408         if (!oh || oh->slaves_cnt == 0)
 409                 return -ENODEV;
 410
 411         omap_hwmod_setup_one(oh_name);
 412
 413         if (np) {
 414                 vbase = of_iomap(np, 0);
 415                 of_node_put(np);
 416         } else {
 417                 vbase = omap_hwmod_get_mpu_rt_va(oh);
 418         }
 419
 420         if (!vbase) {
 421                 pr_warn("%s: failed to get counter_32k resource\n", __func__);
 422                 return -ENXIO;
 423         }
 424
 425         ret = omap_hwmod_enable(oh);
 426         if (ret) {
 427                 pr_warn("%s: failed to enable counter_32k module (%d)\n",
 428                                                         __func__, ret);
 429                 return ret;
 430         }
 431
 432         ret = omap_init_clocksource_32k(vbase);
 433         if (ret) {
 434                 pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
 435                                                         __func__, ret);
 436                 omap_hwmod_idle(oh);
 437         }
 438
 439         return ret;
 440 }
 441
 442 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
 443                                                   const char *fck_source,
 444                                                   const char *property)
 445 {
 446         int res;
 447
 448         clksrc.id = gptimer_id;
 449         clksrc.errata = omap_dm_timer_get_errata();
 450
 451         res = omap_dm_timer_init_one(&clksrc, fck_source, property,
 452                                      &clocksource_gpt.name,
 453                                      OMAP_TIMER_NONPOSTED);
 454         BUG_ON(res);
 455
 456         __omap_dm_timer_load_start(&clksrc,
 457                                    OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
 458                                    OMAP_TIMER_NONPOSTED);
 459         setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 460
 461         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
 462                 pr_err("Could not register clocksource %s\n",
 463                         clocksource_gpt.name);
 464         else
 465                 pr_info("OMAP clocksource: %s at %lu Hz\n",
 466                         clocksource_gpt.name, clksrc.rate);
 467 }
 468
 469 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 470 /*
 471  * The realtime counter also called master counter, is a free-running
 472  * counter, which is related to real time. It produces the count used
 473  * by the CPU local timer peripherals in the MPU cluster. The timer counts
 474  * at a rate of 6.144 MHz. Because the device operates on different clocks
 475  * in different power modes, the master counter shifts operation between
 476  * clocks, adjusting the increment per clock in hardware accordingly to
 477  * maintain a constant count rate.
 478  */
 479 static void __init realtime_counter_init(void)
 480 {
 481         void __iomem *base;
 482         static struct clk *sys_clk;
 483         unsigned long rate;
 484         unsigned int reg, num, den;
 485
 486         base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
 487         if (!base) {
 488                 pr_err("%s: ioremap failed\n", __func__);
 489                 return;
 490         }
 491         sys_clk = clk_get(NULL, "sys_clkin");
 492         if (IS_ERR(sys_clk)) {
 493                 pr_err("%s: failed to get system clock handle\n", __func__);
 494                 iounmap(base);
 495                 return;
 496         }
 497
 498         rate = clk_get_rate(sys_clk);
 499         /* Numerator/denumerator values refer TRM Realtime Counter section */
 500         switch (rate) {
 501         case 1200000:
 502                 num = 64;
 503                 den = 125;
 504                 break;
 505         case 1300000:
 506                 num = 768;
 507                 den = 1625;
 508                 break;
 509         case 19200000:
 510                 num = 8;
 511                 den = 25;
 512                 break;
 513         case 2600000:
 514                 num = 384;
 515                 den = 1625;
 516                 break;
 517         case 2700000:
 518                 num = 256;
 519                 den = 1125;
 520                 break;
 521         case 38400000:
 522         default:
 523                 /* Program it for 38.4 MHz */
 524                 num = 4;
 525                 den = 25;
 526                 break;
 527         }
 528
 529         /* Program numerator and denumerator registers */
 530         reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
 531                         NUMERATOR_DENUMERATOR_MASK;
 532         reg |= num;
 533         __raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
 534
 535         reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
 536                         NUMERATOR_DENUMERATOR_MASK;
 537         reg |= den;
 538         __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
 539
 540         iounmap(base);
 541 }
 542 #else
 543 static inline void __init realtime_counter_init(void)
 544 {}
 545 #endif
 546
 547 #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
 548                                clksrc_nr, clksrc_src, clksrc_prop)      \
 549 void __init omap##name##_gptimer_timer_init(void)                       \
 550 {                                                                       \
 551         omap_dmtimer_init();                                            \
 552         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
 553         omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src,         \
 554                                         clksrc_prop);                   \
 555 }
 556
 557 #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
 558                                 clksrc_nr, clksrc_src, clksrc_prop)     \
 559 void __init omap##name##_sync32k_timer_init(void)               \
 560 {                                                                       \
 561         omap_dmtimer_init();                                            \
 562         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
 563         /* Enable the use of clocksource="gp_timer" kernel parameter */ \
 564         if (use_gptimer_clksrc)                                         \
 565                 omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
 566                                                 clksrc_prop);           \
 567         else                                                            \
 568                 omap2_sync32k_clocksource_init();                       \
 569 }
 570
 571 #ifdef CONFIG_ARCH_OMAP2
 572 OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
 573                         2, "timer_sys_ck", NULL);
 574 #endif /* CONFIG_ARCH_OMAP2 */
 575
 576 #ifdef CONFIG_ARCH_OMAP3
 577 OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
 578                         2, "timer_sys_ck", NULL);
 579 OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
 580                         2, "timer_sys_ck", NULL);
 581 #endif /* CONFIG_ARCH_OMAP3 */
 582
 583 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
 584 OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
 585                        1, "timer_sys_ck", "ti,timer-alwon");
 586 #endif
 587
 588 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
 589 static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
 590                                2, "sys_clkin_ck", NULL);
 591 #endif
 592
 593 #ifdef CONFIG_ARCH_OMAP4
 594 #ifdef CONFIG_LOCAL_TIMERS
 595 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
 596 void __init omap4_local_timer_init(void)
 597 {
 598         omap4_sync32k_timer_init();
 599         /* Local timers are not supprted on OMAP4430 ES1.0 */
 600         if (omap_rev() != OMAP4430_REV_ES1_0) {
 601                 int err;
 602
 603                 if (of_have_populated_dt()) {
 604                         clocksource_of_init();
 605                         return;
 606                 }
 607
 608                 err = twd_local_timer_register(&twd_local_timer);
 609                 if (err)
 610                         pr_err("twd_local_timer_register failed %d\n", err);
 611         }
 612 }
 613 #else /* CONFIG_LOCAL_TIMERS */
 614 void __init omap4_local_timer_init(void)
 615 {
 616         omap4_sync32k_timer_init();
 617 }
 618 #endif /* CONFIG_LOCAL_TIMERS */
 619 #endif /* CONFIG_ARCH_OMAP4 */
 620
 621 #ifdef CONFIG_SOC_OMAP5
 622 void __init omap5_realtime_timer_init(void)
 623 {
 624         int err;
 625
 626         omap4_sync32k_timer_init();
 627         realtime_counter_init();
 628
 629         clocksource_of_init();
 630 }
 631 #endif /* CONFIG_SOC_OMAP5 */
 632
 633 /**
 634  * omap_timer_init - build and register timer device with an
 635  * associated timer hwmod
 636  * @oh: timer hwmod pointer to be used to build timer device
 637  * @user:       parameter that can be passed from calling hwmod API
 638  *
 639  * Called by omap_hwmod_for_each_by_class to register each of the timer
 640  * devices present in the system. The number of timer devices is known
 641  * by parsing through the hwmod database for a given class name. At the
 642  * end of function call memory is allocated for timer device and it is
 643  * registered to the framework ready to be proved by the driver.
 644  */
 645 static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
 646 {
 647         int id;
 648         int ret = 0;
 649         char *name = "omap_timer";
 650         struct dmtimer_platform_data *pdata;
 651         struct platform_device *pdev;
 652         struct omap_timer_capability_dev_attr *timer_dev_attr;
 653
 654         pr_debug("%s: %s\n", __func__, oh->name);
 655
 656         /* on secure device, do not register secure timer */
 657         timer_dev_attr = oh->dev_attr;
 658         if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
 659                 if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
 660                         return ret;
 661
 662         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 663         if (!pdata) {
 664                 pr_err("%s: No memory for [%s]\n", __func__, oh->name);
 665                 return -ENOMEM;
 666         }
 667
 668         /*
 669          * Extract the IDs from name field in hwmod database
 670          * and use the same for constructing ids' for the
 671          * timer devices. In a way, we are avoiding usage of
 672          * static variable witin the function to do the same.
 673          * CAUTION: We have to be careful and make sure the
 674          * name in hwmod database does not change in which case
 675          * we might either make corresponding change here or
 676          * switch back static variable mechanism.
 677          */
 678         sscanf(oh->name, "timer%2d", &id);
 679
 680         if (timer_dev_attr)
 681                 pdata->timer_capability = timer_dev_attr->timer_capability;
 682
 683         pdata->timer_errata = omap_dm_timer_get_errata();
 684         pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
 685
 686         pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata));
 687
 688         if (IS_ERR(pdev)) {
 689                 pr_err("%s: Can't build omap_device for %s: %s.\n",
 690                         __func__, name, oh->name);
 691                 ret = -EINVAL;
 692         }
 693
 694         kfree(pdata);
 695
 696         return ret;
 697 }
 698
 699 /**
 700  * omap2_dm_timer_init - top level regular device initialization
 701  *
 702  * Uses dedicated hwmod api to parse through hwmod database for
 703  * given class name and then build and register the timer device.
 704  */
 705 static int __init omap2_dm_timer_init(void)
 706 {
 707         int ret;
 708
 709         /* If dtb is there, the devices will be created dynamically */
 710         if (of_have_populated_dt())
 711                 return -ENODEV;
 712
 713         ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
 714         if (unlikely(ret)) {
 715                 pr_err("%s: device registration failed.\n", __func__);
 716                 return -EINVAL;
 717         }
 718
 719         return 0;
 720 }
 721 omap_arch_initcall(omap2_dm_timer_init);
 722
 723 /**
 724  * omap2_override_clocksource - clocksource override with user configuration
 725  *
 726  * Allows user to override default clocksource, using kernel parameter
 727  *   clocksource="gp_timer"     (For all OMAP2PLUS architectures)
 728  *
 729  * Note that, here we are using same standard kernel parameter "clocksource=",
 730  * and not introducing any OMAP specific interface.
 731  */
 732 static int __init omap2_override_clocksource(char *str)
 733 {
 734         if (!str)
 735                 return 0;
 736         /*
 737          * For OMAP architecture, we only have two options
 738          *    - sync_32k (default)
 739          *    - gp_timer (sys_clk based)
 740          */
 741         if (!strcmp(str, "gp_timer"))
 742                 use_gptimer_clksrc = true;
 743
 744         return 0;
 745 }
 746 early_param("clocksource", omap2_override_clocksource);