arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17
  18 #include <asm/cputype.h>
  19 #include <asm/io.h>
  20
  21 #include <mach/control.h>
  22 #include <mach/cpu.h>
  23
  24 #if defined(CONFIG_ARCH_OMAP2420)
  25 #define TAP_BASE        io_p2v(0x48014000)
  26 #elif defined(CONFIG_ARCH_OMAP2430)
  27 #define TAP_BASE        io_p2v(0x4900A000)
  28 #elif defined(CONFIG_ARCH_OMAP34XX)
  29 #define TAP_BASE        io_p2v(0x4830A000)
  30 #endif
  31
  32 #define OMAP_TAP_IDCODE         0x0204
  33 #if defined(CONFIG_ARCH_OMAP34XX)
  34 #define OMAP_TAP_PROD_ID        0x0210
  35 #else
  36 #define OMAP_TAP_PROD_ID        0x0208
  37 #endif
  38
  39 #define OMAP_TAP_DIE_ID_0       0x0218
  40 #define OMAP_TAP_DIE_ID_1       0x021C
  41 #define OMAP_TAP_DIE_ID_2       0x0220
  42 #define OMAP_TAP_DIE_ID_3       0x0224
  43
  44 /* system_rev fields for OMAP2 processors:
  45  *   CPU id bits     [31:16],
  46  *   CPU device type [15:12], (unprg,normal,POP)
  47  *   CPU revision    [11:08]
  48  *   CPU class bits  [07:00]
  49  */
  50
  51 struct omap_id {
  52         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  53         u8      dev;            /* Device type from production_id reg */
  54         u32     type;           /* combined type id copied to system_rev */
  55 };
  56
  57 /* Register values to detect the OMAP version */
  58 static struct omap_id omap_ids[] __initdata = {
  59         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
  60         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
  61         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
  62         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
  63         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
  64         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
  65 };
  66
  67 static struct omap_chip_id omap_chip;
  68
  69 /**
  70  * omap_chip_is - test whether currently running OMAP matches a chip type
  71  * @oc: omap_chip_t to test against
  72  *
  73  * Test whether the currently-running OMAP chip matches the supplied
  74  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  75  */
  76 int omap_chip_is(struct omap_chip_id oci)
  77 {
  78         return (oci.oc & omap_chip.oc) ? 1 : 0;
  79 }
  80 EXPORT_SYMBOL(omap_chip_is);
  81
  82 static u32 __init read_tap_reg(int reg)
  83 {
  84         unsigned int regval = 0;
  85         u32 cpuid;
  86
  87         /* Reading the IDCODE register on 3430 ES1 results in a
  88          * data abort as the register is not exposed on the OCP
  89          * Hence reading the Cortex Rev
  90          */
  91         cpuid = read_cpuid(CPUID_ID);
  92
  93         /* If the processor type is Cortex-A8 and the revision is 0x0
  94          * it means its Cortex r0p0 which is 3430 ES1
  95          */
  96         if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
  97                 switch (reg) {
  98                 case OMAP_TAP_IDCODE  : regval = 0x0B7AE02F; break;
  99                 /* Making DevType as 0xF in ES1 to differ from ES2 */
 100                 case OMAP_TAP_PROD_ID : regval = 0x000F00F0; break;
 101                 case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
 102                 case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
 103                 case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
 104                 case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
 105                 }
 106         } else
 107                 regval = __raw_readl(TAP_BASE + reg);
 108
 109         return regval;
 110
 111 }
 112
 113 /*
 114  * _set_system_rev - set the system_rev global based on current OMAP chip type
 115  *
 116  * Set the system_rev global.  This is primarily used by the cpu_is_omapxxxx()
 117  * macros.
 118  */
 119 static void __init _set_system_rev(u32 type, u8 rev)
 120 {
 121         u32 i, ctrl_status;
 122
 123         /*
 124          * system_rev encoding is as follows
 125          * system_rev & 0xff000000 -> Omap Class (24xx/34xx)
 126          * system_rev & 0xfff00000 -> Omap Sub Class (242x/343x)
 127          * system_rev & 0xffff0000 -> Omap type (2420/2422/2423/2430/3430)
 128          * system_rev & 0x0000f000 -> Silicon revision (ES1, ES2 )
 129          * system_rev & 0x00000700 -> Device Type ( EMU/HS/GP/BAD )
 130          * system_rev & 0x000000c0 -> IDCODE revision[6:7]
 131          * system_rev & 0x0000003f -> sys_boot[0:5]
 132          */
 133         /* Embedding the ES revision info in type field */
 134         system_rev = type;
 135         /* Also add IDCODE revision info only two lower bits */
 136         system_rev |= ((rev & 0x3) << 6);
 137
 138         /* Add in the device type and sys_boot fields (see above) */
 139         if (cpu_is_omap24xx()) {
 140                 i = OMAP24XX_CONTROL_STATUS;
 141         } else if (cpu_is_omap343x()) {
 142                 i = OMAP343X_CONTROL_STATUS;
 143         } else {
 144                 printk(KERN_ERR "id: unknown CPU type\n");
 145                 BUG();
 146         }
 147         ctrl_status = omap_ctrl_readl(i);
 148         system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK |
 149                                       OMAP2_SYSBOOT_4_MASK |
 150                                       OMAP2_SYSBOOT_3_MASK |
 151                                       OMAP2_SYSBOOT_2_MASK |
 152                                       OMAP2_SYSBOOT_1_MASK |
 153                                       OMAP2_SYSBOOT_0_MASK));
 154         system_rev |= (ctrl_status & OMAP2_DEVICETYPE_MASK);
 155 }
 156
 157
 158 /*
 159  * _set_omap_chip - set the omap_chip global based on OMAP chip type
 160  *
 161  * Build the omap_chip bits.  This variable is used by powerdomain and
 162  * clockdomain code to indicate whether structures are applicable for
 163  * the current OMAP chip type by ANDing it against a 'platform' bitfield
 164  * in the structure.
 165  */
 166 static void __init _set_omap_chip(void)
 167 {
 168         if (cpu_is_omap343x()) {
 169
 170                 omap_chip.oc = CHIP_IS_OMAP3430;
 171                 if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
 172                         omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 173                 else if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0))
 174                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 175
 176         } else if (cpu_is_omap243x()) {
 177
 178                 /* Currently only supports 2430ES2.1 and 2430-all */
 179                 omap_chip.oc |= CHIP_IS_OMAP2430;
 180
 181         } else if (cpu_is_omap242x()) {
 182
 183                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 184                 omap_chip.oc |= CHIP_IS_OMAP2420;
 185
 186         } else {
 187
 188                 /* Current CPU not supported by this code. */
 189                 printk(KERN_WARNING "OMAP chip type code does not yet support "
 190                        "this CPU type.\n");
 191                 WARN_ON(1);
 192
 193         }
 194
 195 }
 196
 197 void __init omap2_check_revision(void)
 198 {
 199         int i, j;
 200         u32 idcode;
 201         u32 prod_id;
 202         u16 hawkeye;
 203         u8  dev_type;
 204         u8  rev;
 205
 206         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 207         prod_id = read_tap_reg(OMAP_TAP_PROD_ID);
 208         hawkeye = (idcode >> 12) & 0xffff;
 209         rev = (idcode >> 28) & 0x0f;
 210         dev_type = (prod_id >> 16) & 0x0f;
 211
 212         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 213                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 214         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
 215                  read_tap_reg(OMAP_TAP_DIE_ID_0));
 216         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 217                  read_tap_reg(OMAP_TAP_DIE_ID_1),
 218                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 219         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 220                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 221         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 222                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 223         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 224                  prod_id, dev_type);
 225
 226         /*
 227          * Detection for 34xx ES2.0 and above can be done with just
 228          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 229          * Note that rev cannot be used directly as ES1.0 uses value 0.
 230          */
 231         if (hawkeye == 0xb7ae) {
 232                 system_rev = 0x34300000 | ((1 + rev) << 12);
 233                 pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev);
 234                 _set_omap_chip();
 235                 return;
 236         }
 237
 238         /* Check hawkeye ids */
 239         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 240                 if (hawkeye == omap_ids[i].hawkeye)
 241                         break;
 242         }
 243
 244         if (i == ARRAY_SIZE(omap_ids)) {
 245                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 246                 return;
 247         }
 248
 249         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 250                 if (dev_type == omap_ids[j].dev)
 251                         break;
 252         }
 253
 254         if (j == ARRAY_SIZE(omap_ids)) {
 255                 printk(KERN_ERR "Unknown OMAP device type. "
 256                                 "Handling it as OMAP%04x\n",
 257                                 omap_ids[i].type >> 16);
 258                 j = i;
 259         }
 260
 261         _set_system_rev(omap_ids[j].type, rev);
 262
 263         _set_omap_chip();
 264
 265         pr_info("OMAP%04x", system_rev >> 16);
 266         if ((system_rev >> 8) & 0x0f)
 267                 pr_info("ES%x", (system_rev >> 12) & 0xf);
 268         pr_info("\n");
 269
 270 }
 271