Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / common.h
1 /*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
28
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/i2c-omap.h>
34
35 #include <asm/proc-fns.h>
36
37 #include "i2c.h"
38 #include "serial.h"
39
40 #include "usb.h"
41
42 #define OMAP_INTC_START NR_IRQS
43
44 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
45 int omap2_pm_init(void);
46 #else
47 static inline int omap2_pm_init(void)
48 {
49 return 0;
50 }
51 #endif
52
53 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
54 int omap3_pm_init(void);
55 #else
56 static inline int omap3_pm_init(void)
57 {
58 return 0;
59 }
60 #endif
61
62 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
63 int omap4_pm_init(void);
64 #else
65 static inline int omap4_pm_init(void)
66 {
67 return 0;
68 }
69 #endif
70
71 #ifdef CONFIG_OMAP_MUX
72 int omap_mux_late_init(void);
73 #else
74 static inline int omap_mux_late_init(void)
75 {
76 return 0;
77 }
78 #endif
79
80 extern void omap2_init_common_infrastructure(void);
81
82 extern void omap2_sync32k_timer_init(void);
83 extern void omap3_sync32k_timer_init(void);
84 extern void omap3_secure_sync32k_timer_init(void);
85 extern void omap3_gp_gptimer_timer_init(void);
86 extern void omap3_am33xx_gptimer_timer_init(void);
87 extern void omap4_local_timer_init(void);
88 extern void omap5_realtime_timer_init(void);
89
90 void omap2420_init_early(void);
91 void omap2430_init_early(void);
92 void omap3430_init_early(void);
93 void omap35xx_init_early(void);
94 void omap3630_init_early(void);
95 void omap3_init_early(void); /* Do not use this one */
96 void am33xx_init_early(void);
97 void am35xx_init_early(void);
98 void ti81xx_init_early(void);
99 void am33xx_init_early(void);
100 void omap4430_init_early(void);
101 void omap5_init_early(void);
102 void omap3_init_late(void); /* Do not use this one */
103 void omap4430_init_late(void);
104 void omap2420_init_late(void);
105 void omap2430_init_late(void);
106 void omap3430_init_late(void);
107 void omap35xx_init_late(void);
108 void omap3630_init_late(void);
109 void am35xx_init_late(void);
110 void ti81xx_init_late(void);
111 int omap2_common_pm_late_init(void);
112
113 #ifdef CONFIG_SOC_BUS
114 void omap_soc_device_init(void);
115 #else
116 static inline void omap_soc_device_init(void)
117 {
118 }
119 #endif
120
121 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
122 void omap2xxx_restart(char mode, const char *cmd);
123 #else
124 static inline void omap2xxx_restart(char mode, const char *cmd)
125 {
126 }
127 #endif
128
129 #ifdef CONFIG_SOC_AM33XX
130 void am33xx_restart(char mode, const char *cmd);
131 #else
132 static inline void am33xx_restart(char mode, const char *cmd)
133 {
134 }
135 #endif
136
137 #ifdef CONFIG_ARCH_OMAP3
138 void omap3xxx_restart(char mode, const char *cmd);
139 #else
140 static inline void omap3xxx_restart(char mode, const char *cmd)
141 {
142 }
143 #endif
144
145 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
146 void omap44xx_restart(char mode, const char *cmd);
147 #else
148 static inline void omap44xx_restart(char mode, const char *cmd)
149 {
150 }
151 #endif
152
153 /* This gets called from mach-omap2/io.c, do not call this */
154 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
155
156 void __init omap242x_map_io(void);
157 void __init omap243x_map_io(void);
158 void __init omap3_map_io(void);
159 void __init am33xx_map_io(void);
160 void __init omap4_map_io(void);
161 void __init omap5_map_io(void);
162 void __init ti81xx_map_io(void);
163
164 /* omap_barriers_init() is OMAP4 only */
165 void omap_barriers_init(void);
166
167 /**
168 * omap_test_timeout - busy-loop, testing a condition
169 * @cond: condition to test until it evaluates to true
170 * @timeout: maximum number of microseconds in the timeout
171 * @index: loop index (integer)
172 *
173 * Loop waiting for @cond to become true or until at least @timeout
174 * microseconds have passed. To use, define some integer @index in the
175 * calling code. After running, if @index == @timeout, then the loop has
176 * timed out.
177 */
178 #define omap_test_timeout(cond, timeout, index) \
179 ({ \
180 for (index = 0; index < timeout; index++) { \
181 if (cond) \
182 break; \
183 udelay(1); \
184 } \
185 })
186
187 extern struct device *omap2_get_mpuss_device(void);
188 extern struct device *omap2_get_iva_device(void);
189 extern struct device *omap2_get_l3_device(void);
190 extern struct device *omap4_get_dsp_device(void);
191
192 void omap2_init_irq(void);
193 void omap3_init_irq(void);
194 void ti81xx_init_irq(void);
195 extern int omap_irq_pending(void);
196 void omap_intc_save_context(void);
197 void omap_intc_restore_context(void);
198 void omap3_intc_suspend(void);
199 void omap3_intc_prepare_idle(void);
200 void omap3_intc_resume_idle(void);
201 void omap2_intc_handle_irq(struct pt_regs *regs);
202 void omap3_intc_handle_irq(struct pt_regs *regs);
203 void omap_intc_of_init(void);
204 void omap_gic_of_init(void);
205
206 #ifdef CONFIG_CACHE_L2X0
207 extern void __iomem *omap4_get_l2cache_base(void);
208 #endif
209
210 struct device_node;
211 #ifdef CONFIG_OF
212 int __init intc_of_init(struct device_node *node,
213 struct device_node *parent);
214 #else
215 int __init intc_of_init(struct device_node *node,
216 struct device_node *parent)
217 {
218 return 0;
219 }
220 #endif
221
222 #ifdef CONFIG_SMP
223 extern void __iomem *omap4_get_scu_base(void);
224 #else
225 static inline void __iomem *omap4_get_scu_base(void)
226 {
227 return NULL;
228 }
229 #endif
230
231 extern void __init gic_init_irq(void);
232 extern void gic_dist_disable(void);
233 extern bool gic_dist_disabled(void);
234 extern void gic_timer_retrigger(void);
235 extern void omap_smc1(u32 fn, u32 arg);
236 extern void __iomem *omap4_get_sar_ram_base(void);
237 extern void omap_do_wfi(void);
238
239 #ifdef CONFIG_SMP
240 /* Needed for secondary core boot */
241 extern void omap_secondary_startup(void);
242 extern void omap_secondary_startup_4460(void);
243 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
244 extern void omap_auxcoreboot_addr(u32 cpu_addr);
245 extern u32 omap_read_auxcoreboot0(void);
246
247 extern void omap4_cpu_die(unsigned int cpu);
248
249 extern struct smp_operations omap4_smp_ops;
250
251 extern void omap5_secondary_startup(void);
252 #endif
253
254 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
255 extern int omap4_mpuss_init(void);
256 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
257 extern int omap4_finish_suspend(unsigned long cpu_state);
258 extern void omap4_cpu_resume(void);
259 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
260 #else
261 static inline int omap4_enter_lowpower(unsigned int cpu,
262 unsigned int power_state)
263 {
264 cpu_do_idle();
265 return 0;
266 }
267
268 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
269 {
270 cpu_do_idle();
271 return 0;
272 }
273
274 static inline int omap4_mpuss_init(void)
275 {
276 return 0;
277 }
278
279 static inline int omap4_finish_suspend(unsigned long cpu_state)
280 {
281 return 0;
282 }
283
284 static inline void omap4_cpu_resume(void)
285 {}
286
287 #endif
288
289 struct omap_sdrc_params;
290 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
291 struct omap_sdrc_params *sdrc_cs1);
292 struct omap2_hsmmc_info;
293 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
294 extern void omap_reserve(void);
295
296 struct omap_hwmod;
297 extern int omap_dss_reset(struct omap_hwmod *);
298
299 /* SoC specific clock initializer */
300 extern int (*omap_clk_init)(void);
301
302 #endif /* __ASSEMBLER__ */
303 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */