arch/arm/mach-mx3/mach-mx31_3ds.c

   1 /*
   2  *  Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/types.h>
  17 #include <linux/init.h>
  18 #include <linux/clk.h>
  19 #include <linux/irq.h>
  20 #include <linux/gpio.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/mc13783.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/regulator/machine.h>
  25 #include <linux/fsl_devices.h>
  26 #include <linux/input/matrix_keypad.h>
  27
  28 #include <mach/hardware.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/time.h>
  32 #include <asm/memory.h>
  33 #include <asm/mach/map.h>
  34 #include <mach/common.h>
  35 #include <mach/iomux-mx3.h>
  36 #include <mach/3ds_debugboard.h>
  37
  38 #include "devices-imx31.h"
  39 #include "devices.h"
  40
  41 /* CPLD IRQ line for external uart, external ethernet etc */
  42 #define EXPIO_PARENT_INT        IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
  43
  44 /*
  45  * This file contains the board-specific initialization routines.
  46  */
  47
  48 static int mx31_3ds_pins[] = {
  49         /* UART1 */
  50         MX31_PIN_CTS1__CTS1,
  51         MX31_PIN_RTS1__RTS1,
  52         MX31_PIN_TXD1__TXD1,
  53         MX31_PIN_RXD1__RXD1,
  54         IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  55         /* SPI 1 */
  56         MX31_PIN_CSPI2_SCLK__SCLK,
  57         MX31_PIN_CSPI2_MOSI__MOSI,
  58         MX31_PIN_CSPI2_MISO__MISO,
  59         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  60         MX31_PIN_CSPI2_SS0__SS0,
  61         MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  62         /* MC13783 IRQ */
  63         IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  64         /* USB OTG reset */
  65         IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  66         /* USB OTG */
  67         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  68         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  69         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  70         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  71         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  72         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  73         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  74         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  75         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  76         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  77         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  78         MX31_PIN_USBOTG_STP__USBOTG_STP,
  79         /*Keyboard*/
  80         MX31_PIN_KEY_ROW0_KEY_ROW0,
  81         MX31_PIN_KEY_ROW1_KEY_ROW1,
  82         MX31_PIN_KEY_ROW2_KEY_ROW2,
  83         MX31_PIN_KEY_COL0_KEY_COL0,
  84         MX31_PIN_KEY_COL1_KEY_COL1,
  85         MX31_PIN_KEY_COL2_KEY_COL2,
  86         MX31_PIN_KEY_COL3_KEY_COL3,
  87 };
  88
  89 /*
  90  * Matrix keyboard
  91  */
  92
  93 static const uint32_t mx31_3ds_keymap[] = {
  94         KEY(0, 0, KEY_UP),
  95         KEY(0, 1, KEY_DOWN),
  96         KEY(1, 0, KEY_RIGHT),
  97         KEY(1, 1, KEY_LEFT),
  98         KEY(1, 2, KEY_ENTER),
  99         KEY(2, 0, KEY_F6),
 100         KEY(2, 1, KEY_F8),
 101         KEY(2, 2, KEY_F9),
 102         KEY(2, 3, KEY_F10),
 103 };
 104
 105 static struct matrix_keymap_data mx31_3ds_keymap_data = {
 106         .keymap         = mx31_3ds_keymap,
 107         .keymap_size    = ARRAY_SIZE(mx31_3ds_keymap),
 108 };
 109
 110 /* Regulators */
 111 static struct regulator_init_data pwgtx_init = {
 112         .constraints = {
 113                 .boot_on        = 1,
 114                 .always_on      = 1,
 115         },
 116 };
 117
 118 static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
 119         {
 120                 .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
 121                 .init_data = &pwgtx_init,
 122         }, {
 123                 .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
 124                 .init_data = &pwgtx_init,
 125         },
 126 };
 127
 128 /* MC13783 */
 129 static struct mc13783_platform_data mc13783_pdata __initdata = {
 130         .regulators = mx31_3ds_regulators,
 131         .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
 132         .flags  = MC13783_USE_REGULATOR,
 133 };
 134
 135 /* SPI */
 136 static int spi1_internal_chipselect[] = {
 137         MXC_SPI_CS(0),
 138         MXC_SPI_CS(2),
 139 };
 140
 141 static const struct spi_imx_master spi1_pdata __initconst = {
 142         .chipselect     = spi1_internal_chipselect,
 143         .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
 144 };
 145
 146 static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
 147         {
 148                 .modalias       = "mc13783",
 149                 .max_speed_hz   = 1000000,
 150                 .bus_num        = 1,
 151                 .chip_select    = 1, /* SS2 */
 152                 .platform_data  = &mc13783_pdata,
 153                 .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
 154                 .mode = SPI_CS_HIGH,
 155         },
 156 };
 157
 158 /*
 159  * NAND Flash
 160  */
 161 static const struct mxc_nand_platform_data
 162 mx31_3ds_nand_board_info __initconst = {
 163         .width          = 1,
 164         .hw_ecc         = 1,
 165 #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
 166         .flash_bbt      = 1,
 167 #endif
 168 };
 169
 170 /*
 171  * USB OTG
 172  */
 173
 174 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 175                      PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 176
 177 #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
 178
 179 static int mx31_3ds_usbotg_init(void)
 180 {
 181         int err;
 182
 183         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
 184         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
 185         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
 186         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
 187         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
 188         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
 189         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
 190         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
 191         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
 192         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
 193         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
 194         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
 195
 196         err = gpio_request(USBOTG_RST_B, "otgusb-reset");
 197         if (err) {
 198                 pr_err("Failed to request the USB OTG reset gpio\n");
 199                 return err;
 200         }
 201
 202         err = gpio_direction_output(USBOTG_RST_B, 0);
 203         if (err) {
 204                 pr_err("Failed to drive the USB OTG reset gpio\n");
 205                 goto usbotg_free_reset;
 206         }
 207
 208         mdelay(1);
 209         gpio_set_value(USBOTG_RST_B, 1);
 210         return 0;
 211
 212 usbotg_free_reset:
 213         gpio_free(USBOTG_RST_B);
 214         return err;
 215 }
 216
 217 static struct fsl_usb2_platform_data usbotg_pdata = {
 218         .operating_mode = FSL_USB2_DR_DEVICE,
 219         .phy_mode       = FSL_USB2_PHY_ULPI,
 220 };
 221
 222 static const struct imxuart_platform_data uart_pdata __initconst = {
 223         .flags = IMXUART_HAVE_RTSCTS,
 224 };
 225
 226 /*
 227  * Set up static virtual mappings.
 228  */
 229 static void __init mx31_3ds_map_io(void)
 230 {
 231         mx31_map_io();
 232 }
 233
 234 /*!
 235  * Board specific initialization.
 236  */
 237 static void __init mxc_board_init(void)
 238 {
 239         mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
 240                                       "mx31_3ds");
 241
 242         imx31_add_imx_uart0(&uart_pdata);
 243         imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
 244
 245         imx31_add_spi_imx1(&spi1_pdata);
 246         spi_register_board_info(mx31_3ds_spi_devs,
 247                                                 ARRAY_SIZE(mx31_3ds_spi_devs));
 248
 249         mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data);
 250
 251         mx31_3ds_usbotg_init();
 252         mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata);
 253
 254         if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
 255                 printk(KERN_WARNING "Init of the debug board failed, all "
 256                                     "devices on the debug board are unusable.\n");
 257 }
 258
 259 static void __init mx31_3ds_timer_init(void)
 260 {
 261         mx31_clocks_init(26000000);
 262 }
 263
 264 static struct sys_timer mx31_3ds_timer = {
 265         .init   = mx31_3ds_timer_init,
 266 };
 267
 268 /*
 269  * The following uses standard kernel macros defined in arch.h in order to
 270  * initialize __mach_desc_MX31_3DS data structure.
 271  */
 272 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
 273         /* Maintainer: Freescale Semiconductor, Inc. */
 274         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 275         .map_io         = mx31_3ds_map_io,
 276         .init_irq       = mx31_init_irq,
 277         .init_machine   = mxc_board_init,
 278         .timer          = &mx31_3ds_timer,
 279 MACHINE_END