arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/ata_platform.h>
  16 #include <linux/mtd/nand.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/clk-provider.h>
  19 #include <linux/spinlock.h>
  20 #include <net/dsa.h>
  21 #include <asm/page.h>
  22 #include <asm/timex.h>
  23 #include <asm/kexec.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/time.h>
  26 #include <mach/kirkwood.h>
  27 #include <mach/bridge-regs.h>
  28 #include <plat/audio.h>
  29 #include <plat/cache-feroceon-l2.h>
  30 #include <plat/mvsdio.h>
  31 #include <plat/orion_nand.h>
  32 #include <plat/ehci-orion.h>
  33 #include <plat/common.h>
  34 #include <plat/time.h>
  35 #include <plat/addr-map.h>
  36 #include <plat/mv_xor.h>
  37 #include "common.h"
  38
  39 /*****************************************************************************
  40  * I/O Address Mapping
  41  ****************************************************************************/
  42 static struct map_desc kirkwood_io_desc[] __initdata = {
  43         {
  44                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  46                 .length         = KIRKWOOD_PCIE_IO_SIZE,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
  50                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
  51                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
  52                 .type           = MT_DEVICE,
  53         }, {
  54                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  55                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  56                 .length         = KIRKWOOD_REGS_SIZE,
  57                 .type           = MT_DEVICE,
  58         },
  59 };
  60
  61 void __init kirkwood_map_io(void)
  62 {
  63         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  64 }
  65
  66 /*****************************************************************************
  67  * CLK tree
  68  ****************************************************************************/
  69
  70 static void disable_sata0(void)
  71 {
  72         /* Disable PLL and IVREF */
  73         writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  74         /* Disable PHY */
  75         writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  76 }
  77
  78 static void disable_sata1(void)
  79 {
  80         /* Disable PLL and IVREF */
  81         writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  82         /* Disable PHY */
  83         writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  84 }
  85
  86 static void disable_pcie0(void)
  87 {
  88         writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  89         while (1)
  90                 if (readl(PCIE_STATUS) & 0x1)
  91                         break;
  92         writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
  93 }
  94
  95 static void disable_pcie1(void)
  96 {
  97         u32 dev, rev;
  98
  99         kirkwood_pcie_id(&dev, &rev);
 100
 101         if (dev == MV88F6282_DEV_ID) {
 102                 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 103                 while (1)
 104                         if (readl(PCIE1_STATUS) & 0x1)
 105                                 break;
 106                 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 107         }
 108 }
 109
 110 /* An extended version of the gated clk. This calls fn() before
 111  * disabling the clock. We use this to turn off PHYs etc. */
 112 struct clk_gate_fn {
 113         struct clk_gate gate;
 114         void (*fn)(void);
 115 };
 116
 117 #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
 118 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
 119
 120 static void clk_gate_fn_disable(struct clk_hw *hw)
 121 {
 122         struct clk_gate *gate = to_clk_gate(hw);
 123         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 124
 125         if (gate_fn->fn)
 126                 gate_fn->fn();
 127
 128         clk_gate_ops.disable(hw);
 129 }
 130
 131 static struct clk_ops clk_gate_fn_ops;
 132
 133 static struct clk __init *clk_register_gate_fn(struct device *dev,
 134                 const char *name,
 135                 const char *parent_name, unsigned long flags,
 136                 void __iomem *reg, u8 bit_idx,
 137                 u8 clk_gate_flags, spinlock_t *lock,
 138                 void (*fn)(void))
 139 {
 140         struct clk_gate_fn *gate_fn;
 141         struct clk *clk;
 142         struct clk_init_data init;
 143
 144         gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
 145         if (!gate_fn) {
 146                 pr_err("%s: could not allocate gated clk\n", __func__);
 147                 return ERR_PTR(-ENOMEM);
 148         }
 149
 150         init.name = name;
 151         init.ops = &clk_gate_fn_ops;
 152         init.flags = flags;
 153         init.parent_names = (parent_name ? &parent_name : NULL);
 154         init.num_parents = (parent_name ? 1 : 0);
 155
 156         /* struct clk_gate assignments */
 157         gate_fn->gate.reg = reg;
 158         gate_fn->gate.bit_idx = bit_idx;
 159         gate_fn->gate.flags = clk_gate_flags;
 160         gate_fn->gate.lock = lock;
 161         gate_fn->gate.hw.init = &init;
 162
 163         /* ops is the gate ops, but with our disable function */
 164         if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
 165                 clk_gate_fn_ops = clk_gate_ops;
 166                 clk_gate_fn_ops.disable = clk_gate_fn_disable;
 167         }
 168
 169         clk = clk_register(dev, &gate_fn->gate.hw);
 170
 171         if (IS_ERR(clk))
 172                 kfree(gate_fn);
 173
 174         return clk;
 175 }
 176
 177 static DEFINE_SPINLOCK(gating_lock);
 178 static struct clk *tclk;
 179
 180 static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
 181 {
 182         return clk_register_gate(NULL, name, "tclk", 0,
 183                                  (void __iomem *)CLOCK_GATING_CTRL,
 184                                  bit_idx, 0, &gating_lock);
 185 }
 186
 187 static struct clk __init *kirkwood_register_gate_fn(const char *name,
 188                                                     u8 bit_idx,
 189                                                     void (*fn)(void))
 190 {
 191         return clk_register_gate_fn(NULL, name, "tclk", 0,
 192                                     (void __iomem *)CLOCK_GATING_CTRL,
 193                                     bit_idx, 0, &gating_lock, fn);
 194 }
 195
 196 void __init kirkwood_clk_init(void)
 197 {
 198         struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
 199         struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
 200
 201         tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
 202                                        CLK_IS_ROOT, kirkwood_tclk);
 203
 204         runit = kirkwood_register_gate("runit",  CGC_BIT_RUNIT);
 205         ge0 = kirkwood_register_gate("ge0",    CGC_BIT_GE0);
 206         ge1 = kirkwood_register_gate("ge1",    CGC_BIT_GE1);
 207         sata0 = kirkwood_register_gate_fn("sata0",  CGC_BIT_SATA0,
 208                                           disable_sata0);
 209         sata1 = kirkwood_register_gate_fn("sata1",  CGC_BIT_SATA1,
 210                                           disable_sata1);
 211         usb0 = kirkwood_register_gate("usb0",   CGC_BIT_USB0);
 212         sdio = kirkwood_register_gate("sdio",   CGC_BIT_SDIO);
 213         crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
 214         xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);
 215         xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);
 216         pex0 = kirkwood_register_gate_fn("pex0",   CGC_BIT_PEX0,
 217                                          disable_pcie0);
 218         pex1 = kirkwood_register_gate_fn("pex1",   CGC_BIT_PEX1,
 219                                          disable_pcie1);
 220         audio = kirkwood_register_gate("audio",  CGC_BIT_AUDIO);
 221         kirkwood_register_gate("tdm",    CGC_BIT_TDM);
 222         kirkwood_register_gate("tsu",    CGC_BIT_TSU);
 223
 224         /* clkdev entries, mapping clks to devices */
 225         orion_clkdev_add(NULL, "orion_spi.0", runit);
 226         orion_clkdev_add(NULL, "orion_spi.1", runit);
 227         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
 228         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
 229         orion_clkdev_add(NULL, "orion_wdt", tclk);
 230         orion_clkdev_add("0", "sata_mv.0", sata0);
 231         orion_clkdev_add("1", "sata_mv.0", sata1);
 232         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 233         orion_clkdev_add(NULL, "orion_nand", runit);
 234         orion_clkdev_add(NULL, "mvsdio", sdio);
 235         orion_clkdev_add(NULL, "mv_crypto", crypto);
 236         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
 237         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
 238         orion_clkdev_add("0", "pcie", pex0);
 239         orion_clkdev_add("1", "pcie", pex1);
 240         orion_clkdev_add(NULL, "kirkwood-i2s", audio);
 241 }
 242
 243 /*****************************************************************************
 244  * EHCI0
 245  ****************************************************************************/
 246 void __init kirkwood_ehci_init(void)
 247 {
 248         orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
 249 }
 250
 251
 252 /*****************************************************************************
 253  * GE00
 254  ****************************************************************************/
 255 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 256 {
 257         orion_ge00_init(eth_data,
 258                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 259                         IRQ_KIRKWOOD_GE00_ERR);
 260 }
 261
 262
 263 /*****************************************************************************
 264  * GE01
 265  ****************************************************************************/
 266 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 267 {
 268         orion_ge01_init(eth_data,
 269                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 270                         IRQ_KIRKWOOD_GE01_ERR);
 271 }
 272
 273
 274 /*****************************************************************************
 275  * Ethernet switch
 276  ****************************************************************************/
 277 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 278 {
 279         orion_ge00_switch_init(d, irq);
 280 }
 281
 282
 283 /*****************************************************************************
 284  * NAND flash
 285  ****************************************************************************/
 286 static struct resource kirkwood_nand_resource = {
 287         .flags          = IORESOURCE_MEM,
 288         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 289         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 290                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 291 };
 292
 293 static struct orion_nand_data kirkwood_nand_data = {
 294         .cle            = 0,
 295         .ale            = 1,
 296         .width          = 8,
 297 };
 298
 299 static struct platform_device kirkwood_nand_flash = {
 300         .name           = "orion_nand",
 301         .id             = -1,
 302         .dev            = {
 303                 .platform_data  = &kirkwood_nand_data,
 304         },
 305         .resource       = &kirkwood_nand_resource,
 306         .num_resources  = 1,
 307 };
 308
 309 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 310                                int chip_delay)
 311 {
 312         kirkwood_nand_data.parts = parts;
 313         kirkwood_nand_data.nr_parts = nr_parts;
 314         kirkwood_nand_data.chip_delay = chip_delay;
 315         platform_device_register(&kirkwood_nand_flash);
 316 }
 317
 318 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 319                                    int (*dev_ready)(struct mtd_info *))
 320 {
 321         kirkwood_nand_data.parts = parts;
 322         kirkwood_nand_data.nr_parts = nr_parts;
 323         kirkwood_nand_data.dev_ready = dev_ready;
 324         platform_device_register(&kirkwood_nand_flash);
 325 }
 326
 327 /*****************************************************************************
 328  * SoC RTC
 329  ****************************************************************************/
 330 static void __init kirkwood_rtc_init(void)
 331 {
 332         orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
 333 }
 334
 335
 336 /*****************************************************************************
 337  * SATA
 338  ****************************************************************************/
 339 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 340 {
 341         orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 342 }
 343
 344
 345 /*****************************************************************************
 346  * SD/SDIO/MMC
 347  ****************************************************************************/
 348 static struct resource mvsdio_resources[] = {
 349         [0] = {
 350                 .start  = SDIO_PHYS_BASE,
 351                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 352                 .flags  = IORESOURCE_MEM,
 353         },
 354         [1] = {
 355                 .start  = IRQ_KIRKWOOD_SDIO,
 356                 .end    = IRQ_KIRKWOOD_SDIO,
 357                 .flags  = IORESOURCE_IRQ,
 358         },
 359 };
 360
 361 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 362
 363 static struct platform_device kirkwood_sdio = {
 364         .name           = "mvsdio",
 365         .id             = -1,
 366         .dev            = {
 367                 .dma_mask = &mvsdio_dmamask,
 368                 .coherent_dma_mask = DMA_BIT_MASK(32),
 369         },
 370         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 371         .resource       = mvsdio_resources,
 372 };
 373
 374 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 375 {
 376         u32 dev, rev;
 377
 378         kirkwood_pcie_id(&dev, &rev);
 379         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 380                 mvsdio_data->clock = 100000000;
 381         else
 382                 mvsdio_data->clock = 200000000;
 383         kirkwood_sdio.dev.platform_data = mvsdio_data;
 384         platform_device_register(&kirkwood_sdio);
 385 }
 386
 387
 388 /*****************************************************************************
 389  * SPI
 390  ****************************************************************************/
 391 void __init kirkwood_spi_init()
 392 {
 393         orion_spi_init(SPI_PHYS_BASE);
 394 }
 395
 396
 397 /*****************************************************************************
 398  * I2C
 399  ****************************************************************************/
 400 void __init kirkwood_i2c_init(void)
 401 {
 402         orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
 403 }
 404
 405
 406 /*****************************************************************************
 407  * UART0
 408  ****************************************************************************/
 409
 410 void __init kirkwood_uart0_init(void)
 411 {
 412         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 413                          IRQ_KIRKWOOD_UART_0, tclk);
 414 }
 415
 416
 417 /*****************************************************************************
 418  * UART1
 419  ****************************************************************************/
 420 void __init kirkwood_uart1_init(void)
 421 {
 422         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 423                          IRQ_KIRKWOOD_UART_1, tclk);
 424 }
 425
 426 /*****************************************************************************
 427  * Cryptographic Engines and Security Accelerator (CESA)
 428  ****************************************************************************/
 429 void __init kirkwood_crypto_init(void)
 430 {
 431         orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
 432                           KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
 433 }
 434
 435
 436 /*****************************************************************************
 437  * XOR0
 438  ****************************************************************************/
 439 void __init kirkwood_xor0_init(void)
 440 {
 441         orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 442                         IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 443 }
 444
 445
 446 /*****************************************************************************
 447  * XOR1
 448  ****************************************************************************/
 449 void __init kirkwood_xor1_init(void)
 450 {
 451         orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
 452                         IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
 453 }
 454
 455
 456 /*****************************************************************************
 457  * Watchdog
 458  ****************************************************************************/
 459 void __init kirkwood_wdt_init(void)
 460 {
 461         orion_wdt_init();
 462 }
 463
 464
 465 /*****************************************************************************
 466  * Time handling
 467  ****************************************************************************/
 468 void __init kirkwood_init_early(void)
 469 {
 470         orion_time_set_base(TIMER_VIRT_BASE);
 471 }
 472
 473 int kirkwood_tclk;
 474
 475 static int __init kirkwood_find_tclk(void)
 476 {
 477         u32 dev, rev;
 478
 479         kirkwood_pcie_id(&dev, &rev);
 480
 481         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 482                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 483                         return 200000000;
 484
 485         return 166666667;
 486 }
 487
 488 static void __init kirkwood_timer_init(void)
 489 {
 490         kirkwood_tclk = kirkwood_find_tclk();
 491
 492         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 493                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 494 }
 495
 496 struct sys_timer kirkwood_timer = {
 497         .init = kirkwood_timer_init,
 498 };
 499
 500 /*****************************************************************************
 501  * Audio
 502  ****************************************************************************/
 503 static struct resource kirkwood_i2s_resources[] = {
 504         [0] = {
 505                 .start  = AUDIO_PHYS_BASE,
 506                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 507                 .flags  = IORESOURCE_MEM,
 508         },
 509         [1] = {
 510                 .start  = IRQ_KIRKWOOD_I2S,
 511                 .end    = IRQ_KIRKWOOD_I2S,
 512                 .flags  = IORESOURCE_IRQ,
 513         },
 514 };
 515
 516 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 517         .burst       = 128,
 518 };
 519
 520 static struct platform_device kirkwood_i2s_device = {
 521         .name           = "kirkwood-i2s",
 522         .id             = -1,
 523         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 524         .resource       = kirkwood_i2s_resources,
 525         .dev            = {
 526                 .platform_data  = &kirkwood_i2s_data,
 527         },
 528 };
 529
 530 static struct platform_device kirkwood_pcm_device = {
 531         .name           = "kirkwood-pcm-audio",
 532         .id             = -1,
 533 };
 534
 535 void __init kirkwood_audio_init(void)
 536 {
 537         platform_device_register(&kirkwood_i2s_device);
 538         platform_device_register(&kirkwood_pcm_device);
 539 }
 540
 541 /*****************************************************************************
 542  * General
 543  ****************************************************************************/
 544 /*
 545  * Identify device ID and revision.
 546  */
 547 char * __init kirkwood_id(void)
 548 {
 549         u32 dev, rev;
 550
 551         kirkwood_pcie_id(&dev, &rev);
 552
 553         if (dev == MV88F6281_DEV_ID) {
 554                 if (rev == MV88F6281_REV_Z0)
 555                         return "MV88F6281-Z0";
 556                 else if (rev == MV88F6281_REV_A0)
 557                         return "MV88F6281-A0";
 558                 else if (rev == MV88F6281_REV_A1)
 559                         return "MV88F6281-A1";
 560                 else
 561                         return "MV88F6281-Rev-Unsupported";
 562         } else if (dev == MV88F6192_DEV_ID) {
 563                 if (rev == MV88F6192_REV_Z0)
 564                         return "MV88F6192-Z0";
 565                 else if (rev == MV88F6192_REV_A0)
 566                         return "MV88F6192-A0";
 567                 else if (rev == MV88F6192_REV_A1)
 568                         return "MV88F6192-A1";
 569                 else
 570                         return "MV88F6192-Rev-Unsupported";
 571         } else if (dev == MV88F6180_DEV_ID) {
 572                 if (rev == MV88F6180_REV_A0)
 573                         return "MV88F6180-Rev-A0";
 574                 else if (rev == MV88F6180_REV_A1)
 575                         return "MV88F6180-Rev-A1";
 576                 else
 577                         return "MV88F6180-Rev-Unsupported";
 578         } else if (dev == MV88F6282_DEV_ID) {
 579                 if (rev == MV88F6282_REV_A0)
 580                         return "MV88F6282-Rev-A0";
 581                 else if (rev == MV88F6282_REV_A1)
 582                         return "MV88F6282-Rev-A1";
 583                 else
 584                         return "MV88F6282-Rev-Unsupported";
 585         } else {
 586                 return "Device-Unknown";
 587         }
 588 }
 589
 590 void __init kirkwood_l2_init(void)
 591 {
 592 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 593         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 594         feroceon_l2_init(1);
 595 #else
 596         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 597         feroceon_l2_init(0);
 598 #endif
 599 }
 600
 601 void __init kirkwood_init(void)
 602 {
 603         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 604                 kirkwood_id(), kirkwood_tclk);
 605
 606         /*
 607          * Disable propagation of mbus errors to the CPU local bus,
 608          * as this causes mbus errors (which can occur for example
 609          * for PCI aborts) to throw CPU aborts, which we're not set
 610          * up to deal with.
 611          */
 612         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 613
 614         kirkwood_setup_cpu_mbus();
 615
 616 #ifdef CONFIG_CACHE_FEROCEON_L2
 617         kirkwood_l2_init();
 618 #endif
 619
 620         /* Setup root of clk tree */
 621         kirkwood_clk_init();
 622
 623         /* internal devices that every board has */
 624         kirkwood_rtc_init();
 625         kirkwood_wdt_init();
 626         kirkwood_xor0_init();
 627         kirkwood_xor1_init();
 628         kirkwood_crypto_init();
 629
 630 #ifdef CONFIG_KEXEC
 631         kexec_reinit = kirkwood_enable_pcie;
 632 #endif
 633 }
 634
 635 void kirkwood_restart(char mode, const char *cmd)
 636 {
 637         /*
 638          * Enable soft reset to assert RSTOUTn.
 639          */
 640         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 641
 642         /*
 643          * Assert soft reset.
 644          */
 645         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 646
 647         while (1)
 648                 ;
 649 }