arch/arm/mach-imx/platsmp.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/smp.h>
  15 #include <asm/page.h>
  16 #include <asm/smp_scu.h>
  17 #include <asm/mach/map.h>
  18
  19 #include "common.h"
  20 #include "hardware.h"
  21
  22 #define SCU_STANDBY_ENABLE      (1 << 5)
  23
  24 static void __iomem *scu_base;
  25
  26 static struct map_desc scu_io_desc __initdata = {
  27         /* .virtual and .pfn are run-time assigned */
  28         .length         = SZ_4K,
  29         .type           = MT_DEVICE,
  30 };
  31
  32 void __init imx_scu_map_io(void)
  33 {
  34         unsigned long base;
  35
  36         /* Get SCU base */
  37         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  38
  39         scu_io_desc.virtual = IMX_IO_P2V(base);
  40         scu_io_desc.pfn = __phys_to_pfn(base);
  41         iotable_init(&scu_io_desc, 1);
  42
  43         scu_base = IMX_IO_ADDRESS(base);
  44 }
  45
  46 void imx_scu_standby_enable(void)
  47 {
  48         u32 val = readl_relaxed(scu_base);
  49
  50         val |= SCU_STANDBY_ENABLE;
  51         writel_relaxed(val, scu_base);
  52 }
  53
  54 static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
  55 {
  56         imx_set_cpu_jump(cpu, v7_secondary_startup);
  57         imx_enable_cpu(cpu, true);
  58         return 0;
  59 }
  60
  61 /*
  62  * Initialise the CPU possible map early - this describes the CPUs
  63  * which may be present or become present in the system.
  64  */
  65 static void __init imx_smp_init_cpus(void)
  66 {
  67         int i, ncores;
  68
  69         ncores = scu_get_core_count(scu_base);
  70
  71         for (i = ncores; i < NR_CPUS; i++)
  72                 set_cpu_possible(i, false);
  73 }
  74
  75 void imx_smp_prepare(void)
  76 {
  77         scu_enable(scu_base);
  78 }
  79
  80 static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
  81 {
  82         imx_smp_prepare();
  83 }
  84
  85 struct smp_operations  imx_smp_ops __initdata = {
  86         .smp_init_cpus          = imx_smp_init_cpus,
  87         .smp_prepare_cpus       = imx_smp_prepare_cpus,
  88         .smp_boot_secondary     = imx_boot_secondary,
  89 #ifdef CONFIG_HOTPLUG_CPU
  90         .cpu_die                = imx_cpu_die,
  91         .cpu_kill               = imx_cpu_kill,
  92 #endif
  93 };