1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26 #include <linux/platform_data/i2c-s3c2410.h>
27 #include <linux/platform_data/mipi-csis.h>
28 #include <linux/platform_data/s3c-hsotg.h>
29 #include <drm/exynos_drm.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach-types.h>
34 #include <video/samsung_fimd.h>
35 #include <plat/regs-serial.h>
36 #include <plat/clock.h>
38 #include <plat/devs.h>
39 #include <plat/gpio-cfg.h>
42 #include <plat/sdhci.h>
43 #include <plat/fimc-core.h>
44 #include <plat/camport.h>
48 #include <media/v4l2-mediabus.h>
49 #include <media/s5p_fimc.h>
50 #include <media/m5mols.h>
51 #include <media/s5k6aa.h>
55 /* Following are default values for UCON, ULCON and UFCON UART registers */
56 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
57 S3C2410_UCON_RXILEVEL | \
58 S3C2410_UCON_TXIRQMODE | \
59 S3C2410_UCON_RXIRQMODE | \
60 S3C2410_UCON_RXFIFO_TOI | \
61 S3C2443_UCON_RXERR_IRQEN)
63 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
65 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
66 S5PV210_UFCON_TXTRIG256 | \
67 S5PV210_UFCON_RXTRIG256)
69 static struct s3c2410_uartcfg universal_uartcfgs
[] __initdata
= {
72 .ucon
= UNIVERSAL_UCON_DEFAULT
,
73 .ulcon
= UNIVERSAL_ULCON_DEFAULT
,
74 .ufcon
= UNIVERSAL_UFCON_DEFAULT
,
78 .ucon
= UNIVERSAL_UCON_DEFAULT
,
79 .ulcon
= UNIVERSAL_ULCON_DEFAULT
,
80 .ufcon
= UNIVERSAL_UFCON_DEFAULT
,
84 .ucon
= UNIVERSAL_UCON_DEFAULT
,
85 .ulcon
= UNIVERSAL_ULCON_DEFAULT
,
86 .ufcon
= UNIVERSAL_UFCON_DEFAULT
,
90 .ucon
= UNIVERSAL_UCON_DEFAULT
,
91 .ulcon
= UNIVERSAL_ULCON_DEFAULT
,
92 .ufcon
= UNIVERSAL_UFCON_DEFAULT
,
96 static struct regulator_consumer_supply max8952_consumer
=
97 REGULATOR_SUPPLY("vdd_arm", NULL
);
99 static struct regulator_init_data universal_max8952_reg_data
= {
104 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
108 .num_consumer_supplies
= 1,
109 .consumer_supplies
= &max8952_consumer
,
112 static struct max8952_platform_data universal_max8952_pdata __initdata
= {
113 .gpio_vid0
= EXYNOS4_GPX0(3),
114 .gpio_vid1
= EXYNOS4_GPX0(4),
115 .gpio_en
= -1, /* Not controllable, set "Always High" */
116 .default_mode
= 0, /* vid0 = 0, vid1 = 0 */
117 .dvs_mode
= { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
118 .sync_freq
= 0, /* default: fastest */
119 .ramp_speed
= 0, /* default: fastest */
120 .reg_data
= &universal_max8952_reg_data
,
123 static struct regulator_consumer_supply lp3974_buck1_consumer
=
124 REGULATOR_SUPPLY("vdd_int", NULL
);
126 static struct regulator_consumer_supply lp3974_buck2_consumer
=
127 REGULATOR_SUPPLY("vddg3d", NULL
);
129 static struct regulator_consumer_supply lp3974_buck3_consumer
[] = {
130 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
131 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
134 static struct regulator_init_data lp3974_buck1_data
= {
139 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
140 REGULATOR_CHANGE_STATUS
,
146 .num_consumer_supplies
= 1,
147 .consumer_supplies
= &lp3974_buck1_consumer
,
150 static struct regulator_init_data lp3974_buck2_data
= {
155 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
156 REGULATOR_CHANGE_STATUS
,
162 .num_consumer_supplies
= 1,
163 .consumer_supplies
= &lp3974_buck2_consumer
,
166 static struct regulator_init_data lp3974_buck3_data
= {
177 .num_consumer_supplies
= ARRAY_SIZE(lp3974_buck3_consumer
),
178 .consumer_supplies
= lp3974_buck3_consumer
,
181 static struct regulator_init_data lp3974_buck4_data
= {
186 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
194 static struct regulator_init_data lp3974_ldo2_data
= {
196 .name
= "VALIVE_1.2V",
207 static struct regulator_consumer_supply lp3974_ldo3_consumer
[] = {
208 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
209 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
210 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
211 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
214 static struct regulator_init_data lp3974_ldo3_data
= {
216 .name
= "VUSB+MIPI_1.1V",
220 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
225 .num_consumer_supplies
= ARRAY_SIZE(lp3974_ldo3_consumer
),
226 .consumer_supplies
= lp3974_ldo3_consumer
,
229 static struct regulator_consumer_supply lp3974_ldo4_consumer
[] = {
230 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
233 static struct regulator_init_data lp3974_ldo4_data
= {
239 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
244 .num_consumer_supplies
= ARRAY_SIZE(lp3974_ldo4_consumer
),
245 .consumer_supplies
= lp3974_ldo4_consumer
,
248 static struct regulator_init_data lp3974_ldo5_data
= {
254 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
261 static struct regulator_init_data lp3974_ldo6_data
= {
267 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
274 static struct regulator_consumer_supply lp3974_ldo7_consumer
[] = {
275 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
278 static struct regulator_init_data lp3974_ldo7_data
= {
280 .name
= "VLCD+VMIPI_1.8V",
284 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
289 .num_consumer_supplies
= ARRAY_SIZE(lp3974_ldo7_consumer
),
290 .consumer_supplies
= lp3974_ldo7_consumer
,
293 static struct regulator_consumer_supply lp3974_ldo8_consumer
[] = {
294 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
295 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
298 static struct regulator_init_data lp3974_ldo8_data
= {
300 .name
= "VUSB+VDAC_3.3V",
304 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
309 .num_consumer_supplies
= ARRAY_SIZE(lp3974_ldo8_consumer
),
310 .consumer_supplies
= lp3974_ldo8_consumer
,
313 static struct regulator_consumer_supply lp3974_ldo9_consumer
=
314 REGULATOR_SUPPLY("vddio", "0-003c");
316 static struct regulator_init_data lp3974_ldo9_data
= {
327 .num_consumer_supplies
= 1,
328 .consumer_supplies
= &lp3974_ldo9_consumer
,
331 static struct regulator_init_data lp3974_ldo10_data
= {
338 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
345 static struct regulator_consumer_supply lp3974_ldo11_consumer
=
346 REGULATOR_SUPPLY("dig_28", "0-001f");
348 static struct regulator_init_data lp3974_ldo11_data
= {
350 .name
= "CAM_AF_3.3V",
354 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
359 .num_consumer_supplies
= 1,
360 .consumer_supplies
= &lp3974_ldo11_consumer
,
363 static struct regulator_init_data lp3974_ldo12_data
= {
369 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
376 static struct regulator_init_data lp3974_ldo13_data
= {
382 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
389 static struct regulator_consumer_supply lp3974_ldo14_consumer
=
390 REGULATOR_SUPPLY("dig_18", "0-001f");
392 static struct regulator_init_data lp3974_ldo14_data
= {
394 .name
= "CAM_I_HOST_1.8V",
398 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
403 .num_consumer_supplies
= 1,
404 .consumer_supplies
= &lp3974_ldo14_consumer
,
408 static struct regulator_consumer_supply lp3974_ldo15_consumer
=
409 REGULATOR_SUPPLY("dig_12", "0-001f");
411 static struct regulator_init_data lp3974_ldo15_data
= {
413 .name
= "CAM_S_DIG+FM33_CORE_1.2V",
417 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
422 .num_consumer_supplies
= 1,
423 .consumer_supplies
= &lp3974_ldo15_consumer
,
426 static struct regulator_consumer_supply lp3974_ldo16_consumer
[] = {
427 REGULATOR_SUPPLY("vdda", "0-003c"),
428 REGULATOR_SUPPLY("a_sensor", "0-001f"),
431 static struct regulator_init_data lp3974_ldo16_data
= {
433 .name
= "CAM_S_ANA_2.8V",
437 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
442 .num_consumer_supplies
= ARRAY_SIZE(lp3974_ldo16_consumer
),
443 .consumer_supplies
= lp3974_ldo16_consumer
,
446 static struct regulator_init_data lp3974_ldo17_data
= {
448 .name
= "VCC_3.0V_LCD",
452 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
460 static struct regulator_init_data lp3974_32khz_ap_data
= {
470 static struct regulator_init_data lp3974_32khz_cp_data
= {
479 static struct regulator_init_data lp3974_vichg_data
= {
488 static struct regulator_init_data lp3974_esafeout1_data
= {
493 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
501 static struct regulator_init_data lp3974_esafeout2_data
= {
505 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
512 static struct max8998_regulator_data lp3974_regulators
[] = {
513 { MAX8998_LDO2
, &lp3974_ldo2_data
},
514 { MAX8998_LDO3
, &lp3974_ldo3_data
},
515 { MAX8998_LDO4
, &lp3974_ldo4_data
},
516 { MAX8998_LDO5
, &lp3974_ldo5_data
},
517 { MAX8998_LDO6
, &lp3974_ldo6_data
},
518 { MAX8998_LDO7
, &lp3974_ldo7_data
},
519 { MAX8998_LDO8
, &lp3974_ldo8_data
},
520 { MAX8998_LDO9
, &lp3974_ldo9_data
},
521 { MAX8998_LDO10
, &lp3974_ldo10_data
},
522 { MAX8998_LDO11
, &lp3974_ldo11_data
},
523 { MAX8998_LDO12
, &lp3974_ldo12_data
},
524 { MAX8998_LDO13
, &lp3974_ldo13_data
},
525 { MAX8998_LDO14
, &lp3974_ldo14_data
},
526 { MAX8998_LDO15
, &lp3974_ldo15_data
},
527 { MAX8998_LDO16
, &lp3974_ldo16_data
},
528 { MAX8998_LDO17
, &lp3974_ldo17_data
},
529 { MAX8998_BUCK1
, &lp3974_buck1_data
},
530 { MAX8998_BUCK2
, &lp3974_buck2_data
},
531 { MAX8998_BUCK3
, &lp3974_buck3_data
},
532 { MAX8998_BUCK4
, &lp3974_buck4_data
},
533 { MAX8998_EN32KHZ_AP
, &lp3974_32khz_ap_data
},
534 { MAX8998_EN32KHZ_CP
, &lp3974_32khz_cp_data
},
535 { MAX8998_ENVICHG
, &lp3974_vichg_data
},
536 { MAX8998_ESAFEOUT1
, &lp3974_esafeout1_data
},
537 { MAX8998_ESAFEOUT2
, &lp3974_esafeout2_data
},
540 static struct max8998_platform_data universal_lp3974_pdata
= {
541 .num_regulators
= ARRAY_SIZE(lp3974_regulators
),
542 .regulators
= lp3974_regulators
,
543 .buck1_voltage1
= 1100000, /* INT */
544 .buck1_voltage2
= 1000000,
545 .buck1_voltage3
= 1100000,
546 .buck1_voltage4
= 1000000,
547 .buck1_set1
= EXYNOS4_GPX0(5),
548 .buck1_set2
= EXYNOS4_GPX0(6),
549 .buck2_voltage1
= 1200000, /* G3D */
550 .buck2_voltage2
= 1100000,
551 .buck1_default_idx
= 0,
552 .buck2_set3
= EXYNOS4_GPE2(0),
553 .buck2_default_idx
= 0,
558 enum fixed_regulator_id
{
560 FIXED_REG_ID_HDMI_5V
,
561 FIXED_REG_ID_CAM_S_IF
,
562 FIXED_REG_ID_CAM_I_CORE
,
563 FIXED_REG_ID_CAM_VT_DIO
,
566 static struct regulator_consumer_supply hdmi_fixed_consumer
=
567 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
569 static struct regulator_init_data hdmi_fixed_voltage_init_data
= {
572 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
574 .num_consumer_supplies
= 1,
575 .consumer_supplies
= &hdmi_fixed_consumer
,
578 static struct fixed_voltage_config hdmi_fixed_voltage_config
= {
579 .supply_name
= "HDMI_EN1",
580 .microvolts
= 5000000,
581 .gpio
= EXYNOS4_GPE0(1),
583 .init_data
= &hdmi_fixed_voltage_init_data
,
586 static struct platform_device hdmi_fixed_voltage
= {
587 .name
= "reg-fixed-voltage",
588 .id
= FIXED_REG_ID_HDMI_5V
,
590 .platform_data
= &hdmi_fixed_voltage_config
,
594 /* GPIO I2C 5 (PMIC) */
595 static struct i2c_board_info i2c5_devs
[] __initdata
= {
597 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
598 .platform_data
= &universal_max8952_pdata
,
600 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
601 .platform_data
= &universal_lp3974_pdata
,
606 static struct mxt_platform_data qt602240_platform_data
= {
613 .voltage
= 2800000, /* 2.8V */
614 .orient
= MXT_DIAGONAL
,
615 .irqflags
= IRQF_TRIGGER_FALLING
,
618 static struct i2c_board_info i2c3_devs
[] __initdata
= {
620 I2C_BOARD_INFO("qt602240_ts", 0x4a),
621 .platform_data
= &qt602240_platform_data
,
625 static void __init
universal_tsp_init(void)
629 /* TSP_LDO_ON: XMDMADDR_11 */
630 gpio
= EXYNOS4_GPE2(3);
631 gpio_request_one(gpio
, GPIOF_OUT_INIT_HIGH
, "TSP_LDO_ON");
632 gpio_export(gpio
, 0);
634 /* TSP_INT: XMDMADDR_7 */
635 gpio
= EXYNOS4_GPE1(7);
636 gpio_request(gpio
, "TSP_INT");
638 s5p_register_gpio_interrupt(gpio
);
639 s3c_gpio_cfgpin(gpio
, S3C_GPIO_SFN(0xf));
640 s3c_gpio_setpull(gpio
, S3C_GPIO_PULL_UP
);
641 i2c3_devs
[0].irq
= gpio_to_irq(gpio
);
645 /* GPIO I2C 12 (3 Touchkey) */
646 static uint32_t touchkey_keymap
[] = {
647 /* MCS_KEY_MAP(value, keycode) */
648 MCS_KEY_MAP(0, KEY_MENU
), /* KEY_SEND */
649 MCS_KEY_MAP(1, KEY_BACK
), /* KEY_END */
652 static struct mcs_platform_data touchkey_data
= {
653 .keymap
= touchkey_keymap
,
654 .keymap_size
= ARRAY_SIZE(touchkey_keymap
),
658 /* GPIO I2C 3_TOUCH 2.8V */
659 #define I2C_GPIO_BUS_12 12
660 static struct i2c_gpio_platform_data i2c_gpio12_data
= {
661 .sda_pin
= EXYNOS4_GPE4(0), /* XMDMDATA_8 */
662 .scl_pin
= EXYNOS4_GPE4(1), /* XMDMDATA_9 */
665 static struct platform_device i2c_gpio12
= {
667 .id
= I2C_GPIO_BUS_12
,
669 .platform_data
= &i2c_gpio12_data
,
673 static struct i2c_board_info i2c_gpio12_devs
[] __initdata
= {
675 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
676 .platform_data
= &touchkey_data
,
680 static void __init
universal_touchkey_init(void)
684 gpio
= EXYNOS4_GPE3(7); /* XMDMDATA_7 */
685 gpio_request(gpio
, "3_TOUCH_INT");
686 s5p_register_gpio_interrupt(gpio
);
687 s3c_gpio_cfgpin(gpio
, S3C_GPIO_SFN(0xf));
688 i2c_gpio12_devs
[0].irq
= gpio_to_irq(gpio
);
690 gpio
= EXYNOS4_GPE3(3); /* XMDMDATA_3 */
691 gpio_request_one(gpio
, GPIOF_OUT_INIT_HIGH
, "3_TOUCH_EN");
694 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata
= {
695 .frequency
= 300 * 1000,
700 static struct gpio_keys_button universal_gpio_keys_tables
[] = {
702 .code
= KEY_VOLUMEUP
,
703 .gpio
= EXYNOS4_GPX2(0), /* XEINT16 */
704 .desc
= "gpio-keys: KEY_VOLUMEUP",
707 .debounce_interval
= 1,
709 .code
= KEY_VOLUMEDOWN
,
710 .gpio
= EXYNOS4_GPX2(1), /* XEINT17 */
711 .desc
= "gpio-keys: KEY_VOLUMEDOWN",
714 .debounce_interval
= 1,
717 .gpio
= EXYNOS4_GPX2(2), /* XEINT18 */
718 .desc
= "gpio-keys: KEY_CONFIG",
721 .debounce_interval
= 1,
724 .gpio
= EXYNOS4_GPX2(3), /* XEINT19 */
725 .desc
= "gpio-keys: KEY_CAMERA",
728 .debounce_interval
= 1,
731 .gpio
= EXYNOS4_GPX3(5), /* XEINT29 */
732 .desc
= "gpio-keys: KEY_OK",
735 .debounce_interval
= 1,
739 static struct gpio_keys_platform_data universal_gpio_keys_data
= {
740 .buttons
= universal_gpio_keys_tables
,
741 .nbuttons
= ARRAY_SIZE(universal_gpio_keys_tables
),
744 static struct platform_device universal_gpio_keys
= {
747 .platform_data
= &universal_gpio_keys_data
,
752 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata
= {
754 .host_caps
= (MMC_CAP_8_BIT_DATA
| MMC_CAP_4_BIT_DATA
|
755 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
756 .cd_type
= S3C_SDHCI_CD_PERMANENT
,
759 static struct regulator_consumer_supply mmc0_supplies
[] = {
760 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
763 static struct regulator_init_data mmc0_fixed_voltage_init_data
= {
765 .name
= "VMEM_VDD_2.8V",
766 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
768 .num_consumer_supplies
= ARRAY_SIZE(mmc0_supplies
),
769 .consumer_supplies
= mmc0_supplies
,
772 static struct fixed_voltage_config mmc0_fixed_voltage_config
= {
773 .supply_name
= "MASSMEMORY_EN",
774 .microvolts
= 2800000,
775 .gpio
= EXYNOS4_GPE1(3),
777 .init_data
= &mmc0_fixed_voltage_init_data
,
780 static struct platform_device mmc0_fixed_voltage
= {
781 .name
= "reg-fixed-voltage",
782 .id
= FIXED_REG_ID_MMC0
,
784 .platform_data
= &mmc0_fixed_voltage_config
,
789 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata
= {
791 .host_caps
= MMC_CAP_4_BIT_DATA
|
792 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
,
793 .ext_cd_gpio
= EXYNOS4_GPX3(4), /* XEINT_28 */
794 .ext_cd_gpio_invert
= 1,
795 .cd_type
= S3C_SDHCI_CD_GPIO
,
799 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata
= {
801 .host_caps
= MMC_CAP_4_BIT_DATA
|
802 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
,
803 .cd_type
= S3C_SDHCI_CD_EXTERNAL
,
806 static void __init
universal_sdhci_init(void)
808 s3c_sdhci0_set_platdata(&universal_hsmmc0_data
);
809 s3c_sdhci2_set_platdata(&universal_hsmmc2_data
);
810 s3c_sdhci3_set_platdata(&universal_hsmmc3_data
);
814 static struct i2c_board_info i2c1_devs
[] __initdata
= {
815 /* Gyro, To be updated */
818 #ifdef CONFIG_DRM_EXYNOS
819 static struct exynos_drm_fimd_pdata drm_fimd_pdata
= {
833 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
|
835 .vidcon1
= VIDCON1_INV_VCLK
| VIDCON1_INV_VDEN
836 | VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
842 static struct s3c_fb_pd_win universal_fb_win0
= {
848 .virtual_y
= 2 * 800,
851 static struct fb_videomode universal_lcd_timing
= {
863 static struct s3c_fb_platdata universal_lcd_pdata __initdata
= {
864 .win
[0] = &universal_fb_win0
,
865 .vtiming
= &universal_lcd_timing
,
866 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
|
868 .vidcon1
= VIDCON1_INV_VCLK
| VIDCON1_INV_VDEN
869 | VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
870 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
874 static struct regulator_consumer_supply cam_vt_dio_supply
=
875 REGULATOR_SUPPLY("vdd_core", "0-003c");
877 static struct regulator_init_data cam_vt_dio_reg_init_data
= {
878 .constraints
= { .valid_ops_mask
= REGULATOR_CHANGE_STATUS
},
879 .num_consumer_supplies
= 1,
880 .consumer_supplies
= &cam_vt_dio_supply
,
883 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg
= {
884 .supply_name
= "CAM_VT_D_IO",
885 .microvolts
= 2800000,
886 .gpio
= EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
888 .init_data
= &cam_vt_dio_reg_init_data
,
891 static struct platform_device cam_vt_dio_fixed_reg_dev
= {
892 .name
= "reg-fixed-voltage", .id
= FIXED_REG_ID_CAM_VT_DIO
,
893 .dev
= { .platform_data
= &cam_vt_dio_fixed_voltage_cfg
},
896 static struct regulator_consumer_supply cam_i_core_supply
=
897 REGULATOR_SUPPLY("core", "0-001f");
899 static struct regulator_init_data cam_i_core_reg_init_data
= {
900 .constraints
= { .valid_ops_mask
= REGULATOR_CHANGE_STATUS
},
901 .num_consumer_supplies
= 1,
902 .consumer_supplies
= &cam_i_core_supply
,
905 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg
= {
906 .supply_name
= "CAM_I_CORE_1.2V",
907 .microvolts
= 1200000,
908 .gpio
= EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
910 .init_data
= &cam_i_core_reg_init_data
,
913 static struct platform_device cam_i_core_fixed_reg_dev
= {
914 .name
= "reg-fixed-voltage", .id
= FIXED_REG_ID_CAM_I_CORE
,
915 .dev
= { .platform_data
= &cam_i_core_fixed_voltage_cfg
},
918 static struct regulator_consumer_supply cam_s_if_supply
=
919 REGULATOR_SUPPLY("d_sensor", "0-001f");
921 static struct regulator_init_data cam_s_if_reg_init_data
= {
922 .constraints
= { .valid_ops_mask
= REGULATOR_CHANGE_STATUS
},
923 .num_consumer_supplies
= 1,
924 .consumer_supplies
= &cam_s_if_supply
,
927 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg
= {
928 .supply_name
= "CAM_S_IF_1.8V",
929 .microvolts
= 1800000,
930 .gpio
= EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
932 .init_data
= &cam_s_if_reg_init_data
,
935 static struct platform_device cam_s_if_fixed_reg_dev
= {
936 .name
= "reg-fixed-voltage", .id
= FIXED_REG_ID_CAM_S_IF
,
937 .dev
= { .platform_data
= &cam_s_if_fixed_voltage_cfg
},
940 static struct s5p_platform_mipi_csis mipi_csis_platdata
= {
941 .clk_rate
= 166000000UL,
946 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
947 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
948 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
949 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
950 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
952 static int s5k6aa_set_power(int on
)
954 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on
);
958 static struct s5k6aa_platform_data s5k6aa_platdata
= {
959 .mclk_frequency
= 21600000UL,
960 .gpio_reset
= { GPIO_CAM_VGA_NRST
, 0 },
961 .gpio_stby
= { GPIO_CAM_VGA_NSTBY
, 0 },
962 .bus_type
= V4L2_MBUS_PARALLEL
,
964 .set_power
= s5k6aa_set_power
,
967 static struct i2c_board_info s5k6aa_board_info
= {
968 I2C_BOARD_INFO("S5K6AA", 0x3C),
969 .platform_data
= &s5k6aa_platdata
,
972 static int m5mols_set_power(struct device
*dev
, int on
)
974 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on
);
975 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on
);
979 static struct m5mols_platform_data m5mols_platdata
= {
980 .gpio_reset
= GPIO_CAM_MEGA_nRST
,
982 .set_power
= m5mols_set_power
,
985 static struct i2c_board_info m5mols_board_info
= {
986 I2C_BOARD_INFO("M5MOLS", 0x1F),
987 .platform_data
= &m5mols_platdata
,
990 static struct fimc_source_info universal_camera_sensors
[] = {
993 .flags
= V4L2_MBUS_PCLK_SAMPLE_FALLING
|
994 V4L2_MBUS_VSYNC_ACTIVE_LOW
,
995 .fimc_bus_type
= FIMC_BUS_TYPE_ITU_601
,
996 .board_info
= &s5k6aa_board_info
,
998 .clk_frequency
= 24000000UL,
1001 .flags
= V4L2_MBUS_PCLK_SAMPLE_FALLING
|
1002 V4L2_MBUS_VSYNC_ACTIVE_LOW
,
1003 .fimc_bus_type
= FIMC_BUS_TYPE_MIPI_CSI2
,
1004 .board_info
= &m5mols_board_info
,
1006 .clk_frequency
= 24000000UL,
1010 static struct s5p_platform_fimc fimc_md_platdata
= {
1011 .source_info
= universal_camera_sensors
,
1012 .num_clients
= ARRAY_SIZE(universal_camera_sensors
),
1015 static struct gpio universal_camera_gpios
[] = {
1016 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH
, "CAM_LVL_EN1" },
1017 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW
, "CAM_LVL_EN2" },
1018 { GPIO_CAM_8M_ISP_INT
, GPIOF_IN
, "8M_ISP_INT" },
1019 { GPIO_CAM_MEGA_nRST
, GPIOF_OUT_INIT_LOW
, "CAM_8M_NRST" },
1020 { GPIO_CAM_VGA_NRST
, GPIOF_OUT_INIT_LOW
, "CAM_VGA_NRST" },
1021 { GPIO_CAM_VGA_NSTBY
, GPIOF_OUT_INIT_LOW
, "CAM_VGA_NSTBY" },
1025 static struct s3c_hsotg_plat universal_hsotg_pdata
;
1027 static void __init
universal_camera_init(void)
1029 s3c_set_platdata(&mipi_csis_platdata
, sizeof(mipi_csis_platdata
),
1030 &s5p_device_mipi_csis0
);
1031 s3c_set_platdata(&fimc_md_platdata
, sizeof(fimc_md_platdata
),
1032 &s5p_device_fimc_md
);
1034 if (gpio_request_array(universal_camera_gpios
,
1035 ARRAY_SIZE(universal_camera_gpios
))) {
1036 pr_err("%s: GPIO request failed\n", __func__
);
1040 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT
, S3C_GPIO_SFN(0xf)))
1041 m5mols_board_info
.irq
= gpio_to_irq(GPIO_CAM_8M_ISP_INT
);
1043 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1045 /* Free GPIOs controlled directly by the sensor drivers. */
1046 gpio_free(GPIO_CAM_MEGA_nRST
);
1047 gpio_free(GPIO_CAM_8M_ISP_INT
);
1048 gpio_free(GPIO_CAM_VGA_NRST
);
1049 gpio_free(GPIO_CAM_VGA_NSTBY
);
1051 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A
))
1052 pr_err("Camera port A setup failed\n");
1055 static struct platform_device
*universal_devices
[] __initdata
= {
1056 /* Samsung Platform Devices */
1057 &s5p_device_mipi_csis0
,
1063 &mmc0_fixed_voltage
,
1070 &s5p_device_i2c_hdmiphy
,
1071 &hdmi_fixed_voltage
,
1076 /* Universal Devices */
1078 &universal_gpio_keys
,
1079 &s5p_device_onenand
,
1082 &s3c_device_usb_hsotg
,
1086 &cam_vt_dio_fixed_reg_dev
,
1087 &cam_i_core_fixed_reg_dev
,
1088 &cam_s_if_fixed_reg_dev
,
1089 &s5p_device_fimc_md
,
1092 static void __init
universal_map_io(void)
1094 exynos_init_io(NULL
, 0);
1095 s3c24xx_init_uarts(universal_uartcfgs
, ARRAY_SIZE(universal_uartcfgs
));
1096 exynos_set_timer_source(BIT(2) | BIT(4));
1098 xusbxti_f
= 24000000;
1101 static void s5p_tv_setup(void)
1103 /* direct HPD to HDMI chip */
1104 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
1105 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1106 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
1109 static void __init
universal_reserve(void)
1111 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1114 static void __init
universal_machine_init(void)
1116 universal_sdhci_init();
1119 s3c_i2c0_set_platdata(&universal_i2c0_platdata
);
1120 i2c_register_board_info(1, i2c1_devs
, ARRAY_SIZE(i2c1_devs
));
1122 universal_tsp_init();
1123 s3c_i2c3_set_platdata(NULL
);
1124 i2c_register_board_info(3, i2c3_devs
, ARRAY_SIZE(i2c3_devs
));
1126 s3c_i2c5_set_platdata(NULL
);
1127 s5p_i2c_hdmiphy_set_platdata(NULL
);
1128 i2c_register_board_info(5, i2c5_devs
, ARRAY_SIZE(i2c5_devs
));
1130 #ifdef CONFIG_DRM_EXYNOS
1131 s5p_device_fimd0
.dev
.platform_data
= &drm_fimd_pdata
;
1132 exynos4_fimd0_gpio_setup_24bpp();
1134 s5p_fimd0_set_platdata(&universal_lcd_pdata
);
1137 universal_touchkey_init();
1138 i2c_register_board_info(I2C_GPIO_BUS_12
, i2c_gpio12_devs
,
1139 ARRAY_SIZE(i2c_gpio12_devs
));
1141 s3c_hsotg_set_platdata(&universal_hsotg_pdata
);
1142 universal_camera_init();
1145 platform_add_devices(universal_devices
, ARRAY_SIZE(universal_devices
));
1148 MACHINE_START(UNIVERSAL_C210
, "UNIVERSAL_C210")
1149 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1150 .atag_offset
= 0x100,
1151 .smp
= smp_ops(exynos_smp_ops
),
1152 .init_irq
= exynos4_init_irq
,
1153 .map_io
= universal_map_io
,
1154 .init_machine
= universal_machine_init
,
1155 .init_late
= exynos_init_late
,
1156 .init_time
= exynos_init_time
,
1157 .reserve
= &universal_reserve
,
1158 .restart
= exynos4_restart
,