Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-exynos / mach-exynos5-dt.c
1 /*
2 * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/of_platform.h>
13 #include <linux/of_fdt.h>
14 #include <linux/serial_core.h>
15 #include <linux/memblock.h>
16 #include <linux/io.h>
17 #include <linux/clocksource.h>
18
19 #include <asm/mach/arch.h>
20 #include <mach/map.h>
21 #include <mach/regs-pmu.h>
22
23 #include <plat/cpu.h>
24 #include <plat/regs-serial.h>
25 #include <plat/mfc.h>
26
27 #include "common.h"
28
29 /*
30 * The following lookup table is used to override device names when devices
31 * are registered from device tree. This is temporarily added to enable
32 * device tree support addition for the EXYNOS5 architecture.
33 *
34 * For drivers that require platform data to be provided from the machine
35 * file, a platform data pointer can also be supplied along with the
36 * devices names. Usually, the platform data elements that cannot be parsed
37 * from the device tree by the drivers (example: function pointers) are
38 * supplied. But it should be noted that this is a temporary mechanism and
39 * at some point, the drivers should be capable of parsing all the platform
40 * data from the device tree.
41 */
42 static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
43 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
44 "exynos4210-uart.0", NULL),
45 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
46 "exynos4210-uart.1", NULL),
47 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
48 "exynos4210-uart.2", NULL),
49 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
50 "exynos4210-uart.3", NULL),
51 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
52 "s3c2440-i2c.0", NULL),
53 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
54 "s3c2440-i2c.1", NULL),
55 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
56 "s3c2440-i2c.2", NULL),
57 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
58 "s3c2440-i2c.3", NULL),
59 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
60 "s3c2440-i2c.4", NULL),
61 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
62 "s3c2440-i2c.5", NULL),
63 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
64 "s3c2440-i2c.6", NULL),
65 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
66 "s3c2440-i2c.7", NULL),
67 OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
68 "s3c2440-hdmiphy-i2c", NULL),
69 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
70 "dw_mmc.0", NULL),
71 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
72 "dw_mmc.1", NULL),
73 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
74 "dw_mmc.2", NULL),
75 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
76 "dw_mmc.3", NULL),
77 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
78 "exynos4210-spi.0", NULL),
79 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
80 "exynos4210-spi.1", NULL),
81 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
82 "exynos4210-spi.2", NULL),
83 OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
84 "exynos5-sata", NULL),
85 OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
86 "exynos5-sata-phy", NULL),
87 OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
88 "exynos5-sata-phy-i2c", NULL),
89 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
90 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
91 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
92 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
93 "exynos-gsc.0", NULL),
94 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
95 "exynos-gsc.1", NULL),
96 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
97 "exynos-gsc.2", NULL),
98 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
99 "exynos-gsc.3", NULL),
100 OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
101 "exynos5-hdmi", NULL),
102 OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
103 "exynos5-mixer", NULL),
104 OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
105 OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
106 "exynos-tmu", NULL),
107 OF_DEV_AUXDATA("samsung,i2s-v5", 0x03830000,
108 "samsung-i2s.0", NULL),
109 OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D60000,
110 "samsung-i2s.1", NULL),
111 OF_DEV_AUXDATA("samsung,i2s-v5", 0x12D70000,
112 "samsung-i2s.2", NULL),
113 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11210000,
114 "exynos-sysmmu.0", "mfc"), /* MFC_L */
115 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11200000,
116 "exynos-sysmmu.1", "mfc"), /* MFC_R */
117 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14650000,
118 "exynos-sysmmu.2", NULL), /* TV */
119 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11F20000,
120 "exynos-sysmmu.3", "jpeg"), /* JPEG */
121 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x11D40000,
122 "exynos-sysmmu.4", NULL), /* ROTATOR */
123 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E80000,
124 "exynos-sysmmu.5", "gscl"), /* GSCL0 */
125 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13E90000,
126 "exynos-sysmmu.6", "gscl"), /* GSCL1 */
127 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EA0000,
128 "exynos-sysmmu.7", "gscl"), /* GSCL2 */
129 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13EB0000,
130 "exynos-sysmmu.8", "gscl"), /* GSCL3 */
131 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13260000,
132 "exynos-sysmmu.9", NULL), /* FIMC-IS0 */
133 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x132C0000,
134 "exynos-sysmmu.10", NULL), /* FIMC-IS1 */
135 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x14640000,
136 "exynos-sysmmu.11", NULL), /* FIMD1 */
137 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C40000,
138 "exynos-sysmmu.12", NULL), /* FIMC-LITE0 */
139 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x13C50000,
140 "exynos-sysmmu.13", NULL), /* FIMC-LITE1 */
141 OF_DEV_AUXDATA("samsung,exynos-sysmmu", 0x10A60000,
142 "exynos-sysmmu.14", NULL), /* G2D */
143 {},
144 };
145
146 static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
147 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
148 "exynos4210-uart.0", NULL),
149 {},
150 };
151
152 static void __init exynos5_dt_map_io(void)
153 {
154 unsigned long root = of_get_flat_dt_root();
155
156 exynos_init_io(NULL, 0);
157
158 if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
159 s3c24xx_init_clocks(24000000);
160 }
161
162 static void __init exynos5_dt_machine_init(void)
163 {
164 struct device_node *i2c_np;
165 const char *i2c_compat = "samsung,s3c2440-i2c";
166 unsigned int tmp;
167
168 /*
169 * Exynos5's legacy i2c controller and new high speed i2c
170 * controller have muxed interrupt sources. By default the
171 * interrupts for 4-channel HS-I2C controller are enabled.
172 * If node for first four channels of legacy i2c controller
173 * are available then re-configure the interrupts via the
174 * system register.
175 */
176 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
177 if (of_device_is_available(i2c_np)) {
178 if (of_alias_get_id(i2c_np, "i2c") < 4) {
179 tmp = readl(EXYNOS5_SYS_I2C_CFG);
180 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
181 EXYNOS5_SYS_I2C_CFG);
182 }
183 }
184 }
185
186 if (of_machine_is_compatible("samsung,exynos5250"))
187 of_platform_populate(NULL, of_default_bus_match_table,
188 exynos5250_auxdata_lookup, NULL);
189 else if (of_machine_is_compatible("samsung,exynos5440"))
190 of_platform_populate(NULL, of_default_bus_match_table,
191 exynos5440_auxdata_lookup, NULL);
192 }
193
194 static char const *exynos5_dt_compat[] __initdata = {
195 "samsung,exynos5250",
196 "samsung,exynos5440",
197 NULL
198 };
199
200 static void __init exynos5_reserve(void)
201 {
202 #ifdef CONFIG_S5P_DEV_MFC
203 struct s5p_mfc_dt_meminfo mfc_mem;
204
205 /* Reserve memory for MFC only if it's available */
206 mfc_mem.compatible = "samsung,mfc-v6";
207 if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
208 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
209 mfc_mem.lsize);
210 #endif
211 }
212
213 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
214 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
215 .init_irq = exynos5_init_irq,
216 .smp = smp_ops(exynos_smp_ops),
217 .map_io = exynos5_dt_map_io,
218 .init_machine = exynos5_dt_machine_init,
219 .init_late = exynos_init_late,
220 .dt_compat = exynos5_dt_compat,
221 .restart = exynos5_restart,
222 .reserve = exynos5_reserve,
223 MACHINE_END