arch/arm/kernel/head.S

   1 /*
   2  *  linux/arch/arm/kernel/head.S
   3  *
   4  *  Copyright (C) 1994-2002 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  Kernel startup code for all 32-bit CPUs
  11  */
  12 #include <linux/config.h>
  13 #include <linux/linkage.h>
  14 #include <linux/init.h>
  15
  16 #include <asm/assembler.h>
  17 #include <asm/domain.h>
  18 #include <asm/mach-types.h>
  19 #include <asm/procinfo.h>
  20 #include <asm/ptrace.h>
  21 #include <asm/constants.h>
  22 #include <asm/system.h>
  23
  24 #define PROCINFO_MMUFLAGS       8
  25 #define PROCINFO_INITFUNC       12
  26
  27 #define MACHINFO_TYPE           0
  28 #define MACHINFO_PHYSRAM        4
  29 #define MACHINFO_PHYSIO         8
  30 #define MACHINFO_PGOFFIO        12
  31 #define MACHINFO_NAME           16
  32
  33 #ifndef CONFIG_XIP_KERNEL
  34 /*
  35  * We place the page tables 16K below TEXTADDR.  Therefore, we must make sure
  36  * that TEXTADDR is correctly set.  Currently, we expect the least significant
  37  * 16 bits to be 0x8000, but we could probably relax this restriction to
  38  * TEXTADDR >= PAGE_OFFSET + 0x4000
  39  *
  40  * Note that swapper_pg_dir is the virtual address of the page tables, and
  41  * pgtbl gives us a position-independent reference to these tables.  We can
  42  * do this because stext == TEXTADDR
  43  */
  44 #if (TEXTADDR & 0xffff) != 0x8000
  45 #error TEXTADDR must start at 0xXXXX8000
  46 #endif
  47
  48         .globl  swapper_pg_dir
  49         .equ    swapper_pg_dir, TEXTADDR - 0x4000
  50
  51         .macro  pgtbl, rd, phys
  52         adr     \rd, stext
  53         sub     \rd, \rd, #0x4000
  54         .endm
  55 #else
  56 /*
  57  * XIP Kernel:
  58  *
  59  * We place the page tables 16K below DATAADDR.  Therefore, we must make sure
  60  * that DATAADDR is correctly set.  Currently, we expect the least significant
  61  * 16 bits to be 0x8000, but we could probably relax this restriction to
  62  * DATAADDR >= PAGE_OFFSET + 0x4000
  63  *
  64  * Note that pgtbl is meant to return the physical address of swapper_pg_dir.
  65  * We can't make it relative to the kernel position in this case since
  66  * the kernel can physically be anywhere.
  67  */
  68 #if (DATAADDR & 0xffff) != 0x8000
  69 #error DATAADDR must start at 0xXXXX8000
  70 #endif
  71
  72         .globl  swapper_pg_dir
  73         .equ    swapper_pg_dir, DATAADDR - 0x4000
  74
  75         .macro  pgtbl, rd, phys
  76         ldr     \rd, =((DATAADDR - 0x4000) - VIRT_OFFSET)
  77         add     \rd, \rd, \phys
  78         .endm
  79 #endif
  80
  81 /*
  82  * Kernel startup entry point.
  83  * ---------------------------
  84  *
  85  * This is normally called from the decompressor code.  The requirements
  86  * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
  87  * r1 = machine nr.
  88  *
  89  * This code is mostly position independent, so if you link the kernel at
  90  * 0xc0008000, you call this at __pa(0xc0008000).
  91  *
  92  * See linux/arch/arm/tools/mach-types for the complete list of machine
  93  * numbers for r1.
  94  *
  95  * We're trying to keep crap to a minimum; DO NOT add any machine specific
  96  * crap here - that's what the boot loader (or in extreme, well justified
  97  * circumstances, zImage) is for.
  98  */
  99         __INIT
 100         .type   stext, %function
 101 ENTRY(stext)
 102         msr     cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
 103                                                 @ and irqs disabled
 104         bl      __lookup_processor_type         @ r5=procinfo r9=cpuid
 105         movs    r10, r5                         @ invalid processor (r5=0)?
 106         beq     __error_p                               @ yes, error 'p'
 107         bl      __lookup_machine_type           @ r5=machinfo
 108         movs    r8, r5                          @ invalid machine (r5=0)?
 109         beq     __error_a                       @ yes, error 'a'
 110         bl      __create_page_tables
 111
 112         /*
 113          * The following calls CPU specific code in a position independent
 114          * manner.  See arch/arm/mm/proc-*.S for details.  r10 = base of
 115          * xxx_proc_info structure selected by __lookup_machine_type
 116          * above.  On return, the CPU will be ready for the MMU to be
 117          * turned on, and r0 will hold the CPU control register value.
 118          */
 119         ldr     r13, __switch_data              @ address to jump to after
 120                                                 @ mmu has been enabled
 121         adr     lr, __enable_mmu                @ return (PIC) address
 122         add     pc, r10, #PROCINFO_INITFUNC
 123
 124         .type   __switch_data, %object
 125 __switch_data:
 126         .long   __mmap_switched
 127         .long   __data_loc                      @ r4
 128         .long   __data_start                    @ r5
 129         .long   __bss_start                     @ r6
 130         .long   _end                            @ r7
 131         .long   processor_id                    @ r4
 132         .long   __machine_arch_type             @ r5
 133         .long   cr_alignment                    @ r6
 134         .long   init_thread_union+8192          @ sp
 135
 136 /*
 137  * The following fragment of code is executed with the MMU on, and uses
 138  * absolute addresses; this is not position independent.
 139  *
 140  *  r0  = cp#15 control register
 141  *  r1  = machine ID
 142  *  r9  = processor ID
 143  */
 144         .type   __mmap_switched, %function
 145 __mmap_switched:
 146         adr     r3, __switch_data + 4
 147
 148         ldmia   r3!, {r4, r5, r6, r7}
 149         cmp     r4, r5                          @ Copy data segment if needed
 150 1:      cmpne   r5, r6
 151         ldrne   fp, [r4], #4
 152         strne   fp, [r5], #4
 153         bne     1b
 154
 155         mov     fp, #0                          @ Clear BSS (and zero fp)
 156 1:      cmp     r6, r7
 157         strcc   fp, [r6],#4
 158         bcc     1b
 159
 160         ldmia   r3, {r4, r5, r6, sp}
 161         str     r9, [r4]                        @ Save processor ID
 162         str     r1, [r5]                        @ Save machine type
 163         bic     r4, r0, #CR_A                   @ Clear 'A' bit
 164         stmia   r6, {r0, r4}                    @ Save control register values
 165         b       start_kernel
 166
 167
 168
 169 /*
 170  * Setup common bits before finally enabling the MMU.  Essentially
 171  * this is just loading the page table pointer and domain access
 172  * registers.
 173  */
 174         .type   __enable_mmu, %function
 175 __enable_mmu:
 176 #ifdef CONFIG_ALIGNMENT_TRAP
 177         orr     r0, r0, #CR_A
 178 #else
 179         bic     r0, r0, #CR_A
 180 #endif
 181 #ifdef CONFIG_CPU_DCACHE_DISABLE
 182         bic     r0, r0, #CR_C
 183 #endif
 184 #ifdef CONFIG_CPU_BPREDICT_DISABLE
 185         bic     r0, r0, #CR_Z
 186 #endif
 187 #ifdef CONFIG_CPU_ICACHE_DISABLE
 188         bic     r0, r0, #CR_I
 189 #endif
 190         mov     r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
 191                       domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
 192                       domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
 193                       domain_val(DOMAIN_IO, DOMAIN_CLIENT))
 194         mcr     p15, 0, r5, c3, c0, 0           @ load domain access register
 195         mcr     p15, 0, r4, c2, c0, 0           @ load page table pointer
 196         b       __turn_mmu_on
 197
 198 /*
 199  * Enable the MMU.  This completely changes the structure of the visible
 200  * memory space.  You will not be able to trace execution through this.
 201  * If you have an enquiry about this, *please* check the linux-arm-kernel
 202  * mailing list archives BEFORE sending another post to the list.
 203  *
 204  *  r0  = cp#15 control register
 205  *  r13 = *virtual* address to jump to upon completion
 206  *
 207  * other registers depend on the function called upon completion
 208  */
 209         .align  5
 210         .type   __turn_mmu_on, %function
 211 __turn_mmu_on:
 212         mov     r0, r0
 213         mcr     p15, 0, r0, c1, c0, 0           @ write control reg
 214         mrc     p15, 0, r3, c0, c0, 0           @ read id reg
 215         mov     r3, r3
 216         mov     r3, r3
 217         mov     pc, r13
 218
 219
 220
 221 /*
 222  * Setup the initial page tables.  We only setup the barest
 223  * amount which are required to get the kernel running, which
 224  * generally means mapping in the kernel code.
 225  *
 226  * r8  = machinfo
 227  * r9  = cpuid
 228  * r10 = procinfo
 229  *
 230  * Returns:
 231  *  r0, r3, r5, r6, r7 corrupted
 232  *  r4 = physical page table address
 233  */
 234         .type   __create_page_tables, %function
 235 __create_page_tables:
 236         ldr     r5, [r8, #MACHINFO_PHYSRAM]     @ physram
 237         pgtbl   r4, r5                          @ page table address
 238
 239         /*
 240          * Clear the 16K level 1 swapper page table
 241          */
 242         mov     r0, r4
 243         mov     r3, #0
 244         add     r6, r0, #0x4000
 245 1:      str     r3, [r0], #4
 246         str     r3, [r0], #4
 247         str     r3, [r0], #4
 248         str     r3, [r0], #4
 249         teq     r0, r6
 250         bne     1b
 251
 252         ldr     r7, [r10, #PROCINFO_MMUFLAGS]   @ mmuflags
 253
 254         /*
 255          * Create identity mapping for first MB of kernel to
 256          * cater for the MMU enable.  This identity mapping
 257          * will be removed by paging_init().  We use our current program
 258          * counter to determine corresponding section base address.
 259          */
 260         mov     r6, pc, lsr #20                 @ start of kernel section
 261         orr     r3, r7, r6, lsl #20             @ flags + kernel base
 262         str     r3, [r4, r6, lsl #2]            @ identity mapping
 263
 264         /*
 265          * Now setup the pagetables for our kernel direct
 266          * mapped region.  We round TEXTADDR down to the
 267          * nearest megabyte boundary.  It is assumed that
 268          * the kernel fits within 4 contigous 1MB sections.
 269          */
 270         add     r0, r4,  #(TEXTADDR & 0xff000000) >> 18 @ start of kernel
 271         str     r3, [r0, #(TEXTADDR & 0x00f00000) >> 18]!
 272         add     r3, r3, #1 << 20
 273         str     r3, [r0, #4]!                   @ KERNEL + 1MB
 274         add     r3, r3, #1 << 20
 275         str     r3, [r0, #4]!                   @ KERNEL + 2MB
 276         add     r3, r3, #1 << 20
 277         str     r3, [r0, #4]                    @ KERNEL + 3MB
 278
 279         /*
 280          * Then map first 1MB of ram in case it contains our boot params.
 281          */
 282         add     r0, r4, #VIRT_OFFSET >> 18
 283         orr     r6, r5, r7
 284         str     r6, [r0]
 285
 286 #ifdef CONFIG_XIP_KERNEL
 287         /*
 288          * Map some ram to cover our .data and .bss areas.
 289          * Mapping 3MB should be plenty.
 290          */
 291         sub     r3, r4, r5
 292         mov     r3, r3, lsr #20
 293         add     r0, r0, r3, lsl #2
 294         add     r6, r6, r3, lsl #20
 295         str     r6, [r0], #4
 296         add     r6, r6, #(1 << 20)
 297         str     r6, [r0], #4
 298         add     r6, r6, #(1 << 20)
 299         str     r6, [r0]
 300 #endif
 301
 302         bic     r7, r7, #0x0c                   @ turn off cacheable
 303                                                 @ and bufferable bits
 304 #ifdef CONFIG_DEBUG_LL
 305         /*
 306          * Map in IO space for serial debugging.
 307          * This allows debug messages to be output
 308          * via a serial console before paging_init.
 309          */
 310         ldr     r3, [r8, #MACHINFO_PGOFFIO]
 311         add     r0, r4, r3
 312         rsb     r3, r3, #0x4000                 @ PTRS_PER_PGD*sizeof(long)
 313         cmp     r3, #0x0800                     @ limit to 512MB
 314         movhi   r3, #0x0800
 315         add     r6, r0, r3
 316         ldr     r3, [r8, #MACHINFO_PHYSIO]
 317         orr     r3, r3, r7
 318 1:      str     r3, [r0], #4
 319         add     r3, r3, #1 << 20
 320         teq     r0, r6
 321         bne     1b
 322 #if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
 323         /*
 324          * If we're using the NetWinder, we need to map in
 325          * the 16550-type serial port for the debug messages
 326          */
 327         teq     r1, #MACH_TYPE_NETWINDER
 328         teqne   r1, #MACH_TYPE_CATS
 329         bne     1f
 330         add     r0, r4, #0x3fc0                 @ ff000000
 331         mov     r3, #0x7c000000
 332         orr     r3, r3, r7
 333         str     r3, [r0], #4
 334         add     r3, r3, #1 << 20
 335         str     r3, [r0], #4
 336 1:
 337 #endif
 338 #endif
 339 #ifdef CONFIG_ARCH_RPC
 340         /*
 341          * Map in screen at 0x02000000 & SCREEN2_BASE
 342          * Similar reasons here - for debug.  This is
 343          * only for Acorn RiscPC architectures.
 344          */
 345         add     r0, r4, #0x80                   @ 02000000
 346         mov     r3, #0x02000000
 347         orr     r3, r3, r7
 348         str     r3, [r0]
 349         add     r0, r4, #0x3600                 @ d8000000
 350         str     r3, [r0]
 351 #endif
 352         mov     pc, lr
 353         .ltorg
 354
 355
 356
 357 /*
 358  * Exception handling.  Something went wrong and we can't proceed.  We
 359  * ought to tell the user, but since we don't have any guarantee that
 360  * we're even running on the right architecture, we do virtually nothing.
 361  *
 362  * If CONFIG_DEBUG_LL is set we try to print out something about the error
 363  * and hope for the best (useful if bootloader fails to pass a proper
 364  * machine ID for example).
 365  */
 366
 367         .type   __error_p, %function
 368 __error_p:
 369 #ifdef CONFIG_DEBUG_LL
 370         adr     r0, str_p1
 371         bl      printascii
 372         b       __error
 373 str_p1: .asciz  "\nError: unrecognized/unsupported processor variant.\n"
 374         .align
 375 #endif
 376
 377         .type   __error_a, %function
 378 __error_a:
 379 #ifdef CONFIG_DEBUG_LL
 380         mov     r4, r1                          @ preserve machine ID
 381         adr     r0, str_a1
 382         bl      printascii
 383         mov     r0, r4
 384         bl      printhex8
 385         adr     r0, str_a2
 386         bl      printascii
 387         adr     r3, 3f
 388         ldmia   r3, {r4, r5, r6}                @ get machine desc list
 389         sub     r4, r3, r4                      @ get offset between virt&phys
 390         add     r5, r5, r4                      @ convert virt addresses to
 391         add     r6, r6, r4                      @ physical address space
 392 1:      ldr     r0, [r5, #MACHINFO_TYPE]        @ get machine type
 393         bl      printhex8
 394         mov     r0, #'\t'
 395         bl      printch
 396         ldr     r0, [r5, #MACHINFO_NAME]        @ get machine name
 397         add     r0, r0, r4
 398         bl      printascii
 399         mov     r0, #'\n'
 400         bl      printch
 401         add     r5, r5, #SIZEOF_MACHINE_DESC    @ next machine_desc
 402         cmp     r5, r6
 403         blo     1b
 404         adr     r0, str_a3
 405         bl      printascii
 406         b       __error
 407 str_a1: .asciz  "\nError: unrecognized/unsupported machine ID (r1 = 0x"
 408 str_a2: .asciz  ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
 409 str_a3: .asciz  "\nPlease check your kernel config and/or bootloader.\n"
 410         .align
 411 #endif
 412
 413         .type   __error, %function
 414 __error:
 415 #ifdef CONFIG_ARCH_RPC
 416 /*
 417  * Turn the screen red on a error - RiscPC only.
 418  */
 419         mov     r0, #0x02000000
 420         mov     r3, #0x11
 421         orr     r3, r3, r3, lsl #8
 422         orr     r3, r3, r3, lsl #16
 423         str     r3, [r0], #4
 424         str     r3, [r0], #4
 425         str     r3, [r0], #4
 426         str     r3, [r0], #4
 427 #endif
 428 1:      mov     r0, r0
 429         b       1b
 430
 431
 432 /*
 433  * Read processor ID register (CP#15, CR0), and look up in the linker-built
 434  * supported processor list.  Note that we can't use the absolute addresses
 435  * for the __proc_info lists since we aren't running with the MMU on
 436  * (and therefore, we are not in the correct address space).  We have to
 437  * calculate the offset.
 438  *
 439  * Returns:
 440  *      r3, r4, r6 corrupted
 441  *      r5 = proc_info pointer in physical address space
 442  *      r9 = cpuid
 443  */
 444         .type   __lookup_processor_type, %function
 445 __lookup_processor_type:
 446         adr     r3, 3f
 447         ldmda   r3, {r5, r6, r9}
 448         sub     r3, r3, r9                      @ get offset between virt&phys
 449         add     r5, r5, r3                      @ convert virt addresses to
 450         add     r6, r6, r3                      @ physical address space
 451         mrc     p15, 0, r9, c0, c0              @ get processor id
 452 1:      ldmia   r5, {r3, r4}                    @ value, mask
 453         and     r4, r4, r9                      @ mask wanted bits
 454         teq     r3, r4
 455         beq     2f
 456         add     r5, r5, #PROC_INFO_SZ           @ sizeof(proc_info_list)
 457         cmp     r5, r6
 458         blo     1b
 459         mov     r5, #0                          @ unknown processor
 460 2:      mov     pc, lr
 461
 462 /*
 463  * This provides a C-API version of the above function.
 464  */
 465 ENTRY(lookup_processor_type)
 466         stmfd   sp!, {r4 - r6, r9, lr}
 467         bl      __lookup_processor_type
 468         mov     r0, r5
 469         ldmfd   sp!, {r4 - r6, r9, pc}
 470
 471 /*
 472  * Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
 473  * more information about the __proc_info and __arch_info structures.
 474  */
 475         .long   __proc_info_begin
 476         .long   __proc_info_end
 477 3:      .long   .
 478         .long   __arch_info_begin
 479         .long   __arch_info_end
 480
 481 /*
 482  * Lookup machine architecture in the linker-build list of architectures.
 483  * Note that we can't use the absolute addresses for the __arch_info
 484  * lists since we aren't running with the MMU on (and therefore, we are
 485  * not in the correct address space).  We have to calculate the offset.
 486  *
 487  *  r1 = machine architecture number
 488  * Returns:
 489  *  r3, r4, r6 corrupted
 490  *  r5 = mach_info pointer in physical address space
 491  */
 492         .type   __lookup_machine_type, %function
 493 __lookup_machine_type:
 494         adr     r3, 3b
 495         ldmia   r3, {r4, r5, r6}
 496         sub     r3, r3, r4                      @ get offset between virt&phys
 497         add     r5, r5, r3                      @ convert virt addresses to
 498         add     r6, r6, r3                      @ physical address space
 499 1:      ldr     r3, [r5, #MACHINFO_TYPE]        @ get machine type
 500         teq     r3, r1                          @ matches loader number?
 501         beq     2f                              @ found
 502         add     r5, r5, #SIZEOF_MACHINE_DESC    @ next machine_desc
 503         cmp     r5, r6
 504         blo     1b
 505         mov     r5, #0                          @ unknown machine
 506 2:      mov     pc, lr
 507
 508 /*
 509  * This provides a C-API version of the above function.
 510  */
 511 ENTRY(lookup_machine_type)
 512         stmfd   sp!, {r4 - r6, lr}
 513         mov     r1, r0
 514         bl      __lookup_machine_type
 515         mov     r0, r5
 516         ldmfd   sp!, {r4 - r6, pc}