arch/arm/include/asm/cputype.h

   1 #ifndef __ASM_ARM_CPUTYPE_H
   2 #define __ASM_ARM_CPUTYPE_H
   3
   4 #include <linux/stringify.h>
   5 #include <linux/kernel.h>
   6
   7 #define CPUID_ID        0
   8 #define CPUID_CACHETYPE 1
   9 #define CPUID_TCM       2
  10 #define CPUID_TLBTYPE   3
  11 #define CPUID_MPIDR     5
  12
  13 #define CPUID_EXT_PFR0  "c1, 0"
  14 #define CPUID_EXT_PFR1  "c1, 1"
  15 #define CPUID_EXT_DFR0  "c1, 2"
  16 #define CPUID_EXT_AFR0  "c1, 3"
  17 #define CPUID_EXT_MMFR0 "c1, 4"
  18 #define CPUID_EXT_MMFR1 "c1, 5"
  19 #define CPUID_EXT_MMFR2 "c1, 6"
  20 #define CPUID_EXT_MMFR3 "c1, 7"
  21 #define CPUID_EXT_ISAR0 "c2, 0"
  22 #define CPUID_EXT_ISAR1 "c2, 1"
  23 #define CPUID_EXT_ISAR2 "c2, 2"
  24 #define CPUID_EXT_ISAR3 "c2, 3"
  25 #define CPUID_EXT_ISAR4 "c2, 4"
  26 #define CPUID_EXT_ISAR5 "c2, 5"
  27
  28 #define MPIDR_SMP_BITMASK (0x3 << 30)
  29 #define MPIDR_SMP_VALUE (0x2 << 30)
  30
  31 #define MPIDR_MT_BITMASK (0x1 << 24)
  32
  33 #define MPIDR_HWID_BITMASK 0xFFFFFF
  34
  35 #define MPIDR_LEVEL_BITS 8
  36 #define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
  37
  38 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
  39         ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
  40
  41 #define ARM_CPU_IMP_ARM                 0x41
  42 #define ARM_CPU_IMP_INTEL               0x69
  43
  44 #define ARM_CPU_PART_ARM1136            0xB360
  45 #define ARM_CPU_PART_ARM1156            0xB560
  46 #define ARM_CPU_PART_ARM1176            0xB760
  47 #define ARM_CPU_PART_ARM11MPCORE        0xB020
  48 #define ARM_CPU_PART_CORTEX_A8          0xC080
  49 #define ARM_CPU_PART_CORTEX_A9          0xC090
  50 #define ARM_CPU_PART_CORTEX_A5          0xC050
  51 #define ARM_CPU_PART_CORTEX_A15         0xC0F0
  52 #define ARM_CPU_PART_CORTEX_A7          0xC070
  53
  54 #define ARM_CPU_XSCALE_ARCH_MASK        0xe000
  55 #define ARM_CPU_XSCALE_ARCH_V1          0x2000
  56 #define ARM_CPU_XSCALE_ARCH_V2          0x4000
  57 #define ARM_CPU_XSCALE_ARCH_V3          0x6000
  58
  59 extern unsigned int processor_id;
  60
  61 #ifdef CONFIG_CPU_CP15
  62 #define read_cpuid(reg)                                                 \
  63         ({                                                              \
  64                 unsigned int __val;                                     \
  65                 asm("mrc        p15, 0, %0, c0, c0, " __stringify(reg)  \
  66                     : "=r" (__val)                                      \
  67                     :                                                   \
  68                     : "cc");                                            \
  69                 __val;                                                  \
  70         })
  71
  72 #define read_cpuid_ext(ext_reg)                                         \
  73         ({                                                              \
  74                 unsigned int __val;                                     \
  75                 asm("mrc        p15, 0, %0, c0, " ext_reg               \
  76                     : "=r" (__val)                                      \
  77                     :                                                   \
  78                     : "cc");                                            \
  79                 __val;                                                  \
  80         })
  81
  82 #else /* ifdef CONFIG_CPU_CP15 */
  83
  84 /*
  85  * read_cpuid and read_cpuid_ext should only ever be called on machines that
  86  * have cp15 so warn on other usages.
  87  */
  88 #define read_cpuid(reg)                                                 \
  89         ({                                                              \
  90                 WARN_ON_ONCE(1);                                        \
  91                 0;                                                      \
  92         })
  93
  94 #define read_cpuid_ext(reg) read_cpuid(reg)
  95
  96 #endif /* ifdef CONFIG_CPU_CP15 / else */
  97
  98 #ifdef CONFIG_CPU_CP15
  99 /*
 100  * The CPU ID never changes at run time, so we might as well tell the
 101  * compiler that it's constant.  Use this function to read the CPU ID
 102  * rather than directly reading processor_id or read_cpuid() directly.
 103  */
 104 static inline unsigned int __attribute_const__ read_cpuid_id(void)
 105 {
 106         return read_cpuid(CPUID_ID);
 107 }
 108
 109 #else /* ifdef CONFIG_CPU_CP15 */
 110
 111 static inline unsigned int __attribute_const__ read_cpuid_id(void)
 112 {
 113         return processor_id;
 114 }
 115
 116 #endif /* ifdef CONFIG_CPU_CP15 / else */
 117
 118 static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
 119 {
 120         return (read_cpuid_id() & 0xFF000000) >> 24;
 121 }
 122
 123 static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
 124 {
 125         return read_cpuid_id() & 0xFFF0;
 126 }
 127
 128 static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void)
 129 {
 130         return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK;
 131 }
 132
 133 static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
 134 {
 135         return read_cpuid(CPUID_CACHETYPE);
 136 }
 137
 138 static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
 139 {
 140         return read_cpuid(CPUID_TCM);
 141 }
 142
 143 static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
 144 {
 145         return read_cpuid(CPUID_MPIDR);
 146 }
 147
 148 /*
 149  * Intel's XScale3 core supports some v6 features (supersections, L2)
 150  * but advertises itself as v5 as it does not support the v6 ISA.  For
 151  * this reason, we need a way to explicitly test for this type of CPU.
 152  */
 153 #ifndef CONFIG_CPU_XSC3
 154 #define cpu_is_xsc3()   0
 155 #else
 156 static inline int cpu_is_xsc3(void)
 157 {
 158         unsigned int id;
 159         id = read_cpuid_id() & 0xffffe000;
 160         /* It covers both Intel ID and Marvell ID */
 161         if ((id == 0x69056000) || (id == 0x56056000))
 162                 return 1;
 163
 164         return 0;
 165 }
 166 #endif
 167
 168 #if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
 169 #define cpu_is_xscale() 0
 170 #else
 171 #define cpu_is_xscale() 1
 172 #endif
 173
 174 #endif