arch/arm/boot/dts/vt8500.dtsi

   1 /*
   2  * vt8500.dtsi - Device tree file for VIA VT8500 SoC
   3  *
   4  * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
   5  *
   6  * Licensed under GPLv2 or later
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         compatible = "via,vt8500";
  13
  14         soc {
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 compatible = "simple-bus";
  18                 ranges;
  19                 interrupt-parent = <&intc>;
  20
  21                 intc: interrupt-controller@d8140000 {
  22                         compatible = "via,vt8500-intc";
  23                         interrupt-controller;
  24                         reg = <0xd8140000 0x10000>;
  25                         #interrupt-cells = <1>;
  26                 };
  27
  28                 pinctrl: pinctrl@d8110000 {
  29                         compatible = "via,vt8500-pinctrl";
  30                         reg = <0xd8110000 0x10000>;
  31                         interrupt-controller;
  32                         #interrupt-cells = <2>;
  33                         gpio-controller;
  34                         #gpio-cells = <2>;
  35                 };
  36
  37                 pmc@d8130000 {
  38                         compatible = "via,vt8500-pmc";
  39                         reg = <0xd8130000 0x1000>;
  40
  41                         clocks {
  42                                 #address-cells = <1>;
  43                                 #size-cells = <0>;
  44
  45                                 ref24: ref24M {
  46                                         #clock-cells = <0>;
  47                                         compatible = "fixed-clock";
  48                                         clock-frequency = <24000000>;
  49                                 };
  50
  51                                 clkuart0: uart0 {
  52                                         #clock-cells = <0>;
  53                                         compatible = "via,vt8500-device-clock";
  54                                         clocks = <&ref24>;
  55                                         enable-reg = <0x250>;
  56                                         enable-bit = <1>;
  57                                 };
  58
  59                                 clkuart1: uart1 {
  60                                         #clock-cells = <0>;
  61                                         compatible = "via,vt8500-device-clock";
  62                                         clocks = <&ref24>;
  63                                         enable-reg = <0x250>;
  64                                         enable-bit = <2>;
  65                                 };
  66
  67                                 clkuart2: uart2 {
  68                                         #clock-cells = <0>;
  69                                         compatible = "via,vt8500-device-clock";
  70                                         clocks = <&ref24>;
  71                                         enable-reg = <0x250>;
  72                                         enable-bit = <3>;
  73                                 };
  74
  75                                 clkuart3: uart3 {
  76                                         #clock-cells = <0>;
  77                                         compatible = "via,vt8500-device-clock";
  78                                         clocks = <&ref24>;
  79                                         enable-reg = <0x250>;
  80                                         enable-bit = <4>;
  81                                 };
  82                         };
  83                 };
  84
  85                 timer@d8130100 {
  86                         compatible = "via,vt8500-timer";
  87                         reg = <0xd8130100 0x28>;
  88                         interrupts = <36>;
  89                 };
  90
  91                 ehci@d8007900 {
  92                         compatible = "via,vt8500-ehci";
  93                         reg = <0xd8007900 0x200>;
  94                         interrupts = <43>;
  95                 };
  96
  97                 uhci@d8007b00 {
  98                         compatible = "platform-uhci";
  99                         reg = <0xd8007b00 0x200>;
 100                         interrupts = <43>;
 101                 };
 102
 103                 fb@d800e400 {
 104                         compatible = "via,vt8500-fb";
 105                         reg = <0xd800e400 0x400>;
 106                         interrupts = <12>;
 107                         display = <&display>;
 108                         default-mode = <&mode0>;
 109                 };
 110
 111                 ge_rops@d8050400 {
 112                         compatible = "wm,prizm-ge-rops";
 113                         reg = <0xd8050400 0x100>;
 114                 };
 115
 116                 uart@d8200000 {
 117                         compatible = "via,vt8500-uart";
 118                         reg = <0xd8200000 0x1040>;
 119                         interrupts = <32>;
 120                         clocks = <&clkuart0>;
 121                 };
 122
 123                 uart@d82b0000 {
 124                         compatible = "via,vt8500-uart";
 125                         reg = <0xd82b0000 0x1040>;
 126                         interrupts = <33>;
 127                         clocks = <&clkuart1>;
 128                 };
 129
 130                 uart@d8210000 {
 131                         compatible = "via,vt8500-uart";
 132                         reg = <0xd8210000 0x1040>;
 133                         interrupts = <47>;
 134                         clocks = <&clkuart2>;
 135                 };
 136
 137                 uart@d82c0000 {
 138                         compatible = "via,vt8500-uart";
 139                         reg = <0xd82c0000 0x1040>;
 140                         interrupts = <50>;
 141                         clocks = <&clkuart3>;
 142                 };
 143
 144                 rtc@d8100000 {
 145                         compatible = "via,vt8500-rtc";
 146                         reg = <0xd8100000 0x10000>;
 147                         interrupts = <48>;
 148                 };
 149         };
 150 };