5222625b6ce0c9bfb03e22c091fe41e3e8af87af
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / boot / dts / at91sam9g45.dtsi
1 /*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
34 };
35 cpus {
36 cpu@0 {
37 compatible = "arm,arm926ejs";
38 };
39 };
40
41 memory {
42 reg = <0x70000000 0x10000000>;
43 };
44
45 ahb {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
50
51 apb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
60 interrupt-controller;
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
63 };
64
65 ramc0: ramc@ffffe400 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe400 0x200
68 0xffffe600 0x200>;
69 };
70
71 pmc: pmc@fffffc00 {
72 compatible = "atmel,at91rm9200-pmc";
73 reg = <0xfffffc00 0x100>;
74 };
75
76 rstc@fffffd00 {
77 compatible = "atmel,at91sam9g45-rstc";
78 reg = <0xfffffd00 0x10>;
79 };
80
81 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
84 interrupts = <1 4 7>;
85 };
86
87
88 shdwc@fffffd10 {
89 compatible = "atmel,at91sam9rl-shdwc";
90 reg = <0xfffffd10 0x10>;
91 };
92
93 tcb0: timer@fff7c000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfff7c000 0x100>;
96 interrupts = <18 4 0>;
97 };
98
99 tcb1: timer@fffd4000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfffd4000 0x100>;
102 interrupts = <18 4 0>;
103 };
104
105 dma: dma-controller@ffffec00 {
106 compatible = "atmel,at91sam9g45-dma";
107 reg = <0xffffec00 0x200>;
108 interrupts = <21 4 0>;
109 };
110
111 pinctrl@fffff200 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 ranges = <0xfffff200 0xfffff200 0xa00>;
116
117 atmel,mux-mask = <
118 /* A B */
119 0xffffffff 0xffc003ff /* pioA */
120 0xffffffff 0x800f8f00 /* pioB */
121 0xffffffff 0x00000e00 /* pioC */
122 0xffffffff 0xff0c1381 /* pioD */
123 0xffffffff 0x81ffff81 /* pioE */
124 >;
125
126 /* shared pinctrl settings */
127
128 pioA: gpio@fffff200 {
129 compatible = "atmel,at91rm9200-gpio";
130 reg = <0xfffff200 0x200>;
131 interrupts = <2 4 1>;
132 #gpio-cells = <2>;
133 gpio-controller;
134 interrupt-controller;
135 #interrupt-cells = <2>;
136 };
137
138 pioB: gpio@fffff400 {
139 compatible = "atmel,at91rm9200-gpio";
140 reg = <0xfffff400 0x200>;
141 interrupts = <3 4 1>;
142 #gpio-cells = <2>;
143 gpio-controller;
144 interrupt-controller;
145 #interrupt-cells = <2>;
146 };
147
148 pioC: gpio@fffff600 {
149 compatible = "atmel,at91rm9200-gpio";
150 reg = <0xfffff600 0x200>;
151 interrupts = <4 4 1>;
152 #gpio-cells = <2>;
153 gpio-controller;
154 interrupt-controller;
155 #interrupt-cells = <2>;
156 };
157
158 pioD: gpio@fffff800 {
159 compatible = "atmel,at91rm9200-gpio";
160 reg = <0xfffff800 0x200>;
161 interrupts = <5 4 1>;
162 #gpio-cells = <2>;
163 gpio-controller;
164 interrupt-controller;
165 #interrupt-cells = <2>;
166 };
167
168 pioE: gpio@fffffa00 {
169 compatible = "atmel,at91rm9200-gpio";
170 reg = <0xfffffa00 0x200>;
171 interrupts = <5 4 1>;
172 #gpio-cells = <2>;
173 gpio-controller;
174 interrupt-controller;
175 #interrupt-cells = <2>;
176 };
177 };
178
179 dbgu: serial@ffffee00 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xffffee00 0x200>;
182 interrupts = <1 4 7>;
183 status = "disabled";
184 };
185
186 usart0: serial@fff8c000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xfff8c000 0x200>;
189 interrupts = <7 4 5>;
190 atmel,use-dma-rx;
191 atmel,use-dma-tx;
192 status = "disabled";
193 };
194
195 usart1: serial@fff90000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xfff90000 0x200>;
198 interrupts = <8 4 5>;
199 atmel,use-dma-rx;
200 atmel,use-dma-tx;
201 status = "disabled";
202 };
203
204 usart2: serial@fff94000 {
205 compatible = "atmel,at91sam9260-usart";
206 reg = <0xfff94000 0x200>;
207 interrupts = <9 4 5>;
208 atmel,use-dma-rx;
209 atmel,use-dma-tx;
210 status = "disabled";
211 };
212
213 usart3: serial@fff98000 {
214 compatible = "atmel,at91sam9260-usart";
215 reg = <0xfff98000 0x200>;
216 interrupts = <10 4 5>;
217 atmel,use-dma-rx;
218 atmel,use-dma-tx;
219 status = "disabled";
220 };
221
222 macb0: ethernet@fffbc000 {
223 compatible = "cdns,at32ap7000-macb", "cdns,macb";
224 reg = <0xfffbc000 0x100>;
225 interrupts = <25 4 3>;
226 status = "disabled";
227 };
228
229 i2c0: i2c@fff84000 {
230 compatible = "atmel,at91sam9g10-i2c";
231 reg = <0xfff84000 0x100>;
232 interrupts = <12 4 6>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 status = "disabled";
236 };
237
238 i2c1: i2c@fff88000 {
239 compatible = "atmel,at91sam9g10-i2c";
240 reg = <0xfff88000 0x100>;
241 interrupts = <13 4 6>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 status = "disabled";
245 };
246
247 adc0: adc@fffb0000 {
248 compatible = "atmel,at91sam9260-adc";
249 reg = <0xfffb0000 0x100>;
250 interrupts = <20 4 0>;
251 atmel,adc-use-external-triggers;
252 atmel,adc-channels-used = <0xff>;
253 atmel,adc-vref = <3300>;
254 atmel,adc-num-channels = <8>;
255 atmel,adc-startup-time = <40>;
256 atmel,adc-channel-base = <0x30>;
257 atmel,adc-drdy-mask = <0x10000>;
258 atmel,adc-status-register = <0x1c>;
259 atmel,adc-trigger-register = <0x08>;
260
261 trigger@0 {
262 trigger-name = "external-rising";
263 trigger-value = <0x1>;
264 trigger-external;
265 };
266 trigger@1 {
267 trigger-name = "external-falling";
268 trigger-value = <0x2>;
269 trigger-external;
270 };
271
272 trigger@2 {
273 trigger-name = "external-any";
274 trigger-value = <0x3>;
275 trigger-external;
276 };
277
278 trigger@3 {
279 trigger-name = "continuous";
280 trigger-value = <0x6>;
281 };
282 };
283 };
284
285 nand0: nand@40000000 {
286 compatible = "atmel,at91rm9200-nand";
287 #address-cells = <1>;
288 #size-cells = <1>;
289 reg = <0x40000000 0x10000000
290 0xffffe200 0x200
291 >;
292 atmel,nand-addr-offset = <21>;
293 atmel,nand-cmd-offset = <22>;
294 gpios = <&pioC 8 0
295 &pioC 14 0
296 0
297 >;
298 status = "disabled";
299 };
300
301 usb0: ohci@00700000 {
302 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
303 reg = <0x00700000 0x100000>;
304 interrupts = <22 4 2>;
305 status = "disabled";
306 };
307
308 usb1: ehci@00800000 {
309 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
310 reg = <0x00800000 0x100000>;
311 interrupts = <22 4 2>;
312 status = "disabled";
313 };
314 };
315
316 i2c@0 {
317 compatible = "i2c-gpio";
318 gpios = <&pioA 20 0 /* sda */
319 &pioA 21 0 /* scl */
320 >;
321 i2c-gpio,sda-open-drain;
322 i2c-gpio,scl-open-drain;
323 i2c-gpio,delay-us = <5>; /* ~100 kHz */
324 #address-cells = <1>;
325 #size-cells = <0>;
326 status = "disabled";
327 };
328 };