spi: Move mailing list to vger
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / boot / dts / armada-370-xp.dtsi
1 /*
2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
17 */
18
19 /include/ "skeleton64.dtsi"
20
21 / {
22 model = "Marvell Armada 370 and XP SoC";
23 compatible = "marvell,armada-370-xp";
24
25 cpus {
26 cpu@0 {
27 compatible = "marvell,sheeva-v7";
28 };
29 };
30
31 soc {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 compatible = "simple-bus";
35 interrupt-parent = <&mpic>;
36 ranges = <0 0 0xd0000000 0x100000>;
37
38 internal-regs {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 ranges;
43
44 mpic: interrupt-controller@20000 {
45 compatible = "marvell,mpic";
46 #interrupt-cells = <1>;
47 #size-cells = <1>;
48 interrupt-controller;
49 };
50
51 coherency-fabric@20200 {
52 compatible = "marvell,coherency-fabric";
53 reg = <0x20200 0xb0>, <0x21810 0x1c>;
54 };
55
56 serial@12000 {
57 compatible = "snps,dw-apb-uart";
58 reg = <0x12000 0x100>;
59 reg-shift = <2>;
60 interrupts = <41>;
61 reg-io-width = <1>;
62 status = "disabled";
63 };
64 serial@12100 {
65 compatible = "snps,dw-apb-uart";
66 reg = <0x12100 0x100>;
67 reg-shift = <2>;
68 interrupts = <42>;
69 reg-io-width = <1>;
70 status = "disabled";
71 };
72
73 timer@20300 {
74 compatible = "marvell,armada-370-xp-timer";
75 reg = <0x20300 0x30>, <0x21040 0x30>;
76 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
77 clocks = <&coreclk 2>;
78 };
79
80 sata@a0000 {
81 compatible = "marvell,orion-sata";
82 reg = <0xa0000 0x2400>;
83 interrupts = <55>;
84 clocks = <&gateclk 15>, <&gateclk 30>;
85 clock-names = "0", "1";
86 status = "disabled";
87 };
88
89 mdio {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "marvell,orion-mdio";
93 reg = <0x72004 0x4>;
94 };
95
96 ethernet@70000 {
97 compatible = "marvell,armada-370-neta";
98 reg = <0x70000 0x2500>;
99 interrupts = <8>;
100 clocks = <&gateclk 4>;
101 status = "disabled";
102 };
103
104 ethernet@74000 {
105 compatible = "marvell,armada-370-neta";
106 reg = <0x74000 0x2500>;
107 interrupts = <10>;
108 clocks = <&gateclk 3>;
109 status = "disabled";
110 };
111
112 i2c0: i2c@11000 {
113 compatible = "marvell,mv64xxx-i2c";
114 reg = <0x11000 0x20>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 interrupts = <31>;
118 timeout-ms = <1000>;
119 clocks = <&coreclk 0>;
120 status = "disabled";
121 };
122
123 i2c1: i2c@11100 {
124 compatible = "marvell,mv64xxx-i2c";
125 reg = <0x11100 0x20>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 interrupts = <32>;
129 timeout-ms = <1000>;
130 clocks = <&coreclk 0>;
131 status = "disabled";
132 };
133
134 rtc@10300 {
135 compatible = "marvell,orion-rtc";
136 reg = <0x10300 0x20>;
137 interrupts = <50>;
138 };
139
140 mvsdio@d4000 {
141 compatible = "marvell,orion-sdio";
142 reg = <0xd4000 0x200>;
143 interrupts = <54>;
144 clocks = <&gateclk 17>;
145 status = "disabled";
146 };
147
148 usb@50000 {
149 compatible = "marvell,orion-ehci";
150 reg = <0x50000 0x500>;
151 interrupts = <45>;
152 status = "disabled";
153 };
154
155 usb@51000 {
156 compatible = "marvell,orion-ehci";
157 reg = <0x51000 0x500>;
158 interrupts = <46>;
159 status = "disabled";
160 };
161
162 spi0: spi@10600 {
163 compatible = "marvell,orion-spi";
164 reg = <0x10600 0x28>;
165 #address-cells = <1>;
166 #size-cells = <0>;
167 cell-index = <0>;
168 interrupts = <30>;
169 clocks = <&coreclk 0>;
170 status = "disabled";
171 };
172
173 spi1: spi@10680 {
174 compatible = "marvell,orion-spi";
175 reg = <0x10680 0x28>;
176 #address-cells = <1>;
177 #size-cells = <0>;
178 cell-index = <1>;
179 interrupts = <92>;
180 clocks = <&coreclk 0>;
181 status = "disabled";
182 };
183
184 devbus-bootcs@10400 {
185 compatible = "marvell,mvebu-devbus";
186 reg = <0x10400 0x8>;
187 #address-cells = <1>;
188 #size-cells = <1>;
189 clocks = <&coreclk 0>;
190 status = "disabled";
191 };
192
193 devbus-cs0@10408 {
194 compatible = "marvell,mvebu-devbus";
195 reg = <0x10408 0x8>;
196 #address-cells = <1>;
197 #size-cells = <1>;
198 clocks = <&coreclk 0>;
199 status = "disabled";
200 };
201
202 devbus-cs1@10410 {
203 compatible = "marvell,mvebu-devbus";
204 reg = <0x10410 0x8>;
205 #address-cells = <1>;
206 #size-cells = <1>;
207 clocks = <&coreclk 0>;
208 status = "disabled";
209 };
210
211 devbus-cs2@10418 {
212 compatible = "marvell,mvebu-devbus";
213 reg = <0x10418 0x8>;
214 #address-cells = <1>;
215 #size-cells = <1>;
216 clocks = <&coreclk 0>;
217 status = "disabled";
218 };
219
220 devbus-cs3@10420 {
221 compatible = "marvell,mvebu-devbus";
222 reg = <0x10420 0x8>;
223 #address-cells = <1>;
224 #size-cells = <1>;
225 clocks = <&coreclk 0>;
226 status = "disabled";
227 };
228 };
229 };
230 };